[PATCH] D58980: [ARC] Add more load/store variants and simple pass to generate postincrement instructions

[Sergey Yakushkin via Phabricator via llvm-commits]

yakush accepted this revision.
yakush added inline comments.
This revision is now accepted and ready to land.


================
Comment at: llvm/lib/Target/ARC/ARCOptAddrMode.cpp:10
+/// \file
+/// This pass folds LD/ST + ADD pairs into Pre/Post-increment form  of
+/// load/store instructions.
----------------
add comment that pass is function level (requires Global ISEL)?
otherwise for BB-level ISel getPostIndexedAddressParts would be enough.


================
Comment at: llvm/lib/Target/ARC/ARCOptAddrMode.cpp:431
+      continue;
+    if (MI->mayStore() || MI->isCall() || MI->isInlineAsm() ||
+        MI->hasUnmodeledSideEffects())
----------------
add TODO: to use alias here?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D58980/new/

https://reviews.llvm.org/D58980