[PATCH] D59036: Memory writes overlap in the pipelined loop

[Brendon Cahoon via Phabricator via llvm-commits]

bcahoon added a comment.

Hi Yan,

Thanks for the patch!  I agree that the change is needed. Let me see if I can generate a Hexagon test case also.

Thanks,
Brendon



================
Comment at: lib/CodeGen/MachinePipeliner.cpp:3135
+  if (!(DI->mayStore() && SI->mayLoad()) &&
+      !(DI->mayStore() && SI->mayStore()))
     return false;
----------------
I think the following is equivalent:

if (!DI->mayStore())
  return false;


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D59036/new/

https://reviews.llvm.org/D59036