[llvm] r355496 - [X86][NFC] Autogenerate check lines in cmovcmov.ll test
Roman Lebedev via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 6 03:47:44 PST 2019
Author: lebedevri
Date: Wed Mar 6 03:47:43 2019
New Revision: 355496
URL: http://llvm.org/viewvc/llvm-project?rev=355496&view=rev
Log:
[X86][NFC] Autogenerate check lines in cmovcmov.ll test
Investigating 8-bit cmov promotion, this test comes up.
Modified:
llvm/trunk/test/CodeGen/X86/cmovcmov.ll
Modified: llvm/trunk/test/CodeGen/X86/cmovcmov.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/cmovcmov.ll?rev=355496&r1=355495&r2=355496&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/cmovcmov.ll (original)
+++ llvm/trunk/test/CodeGen/X86/cmovcmov.ll Wed Mar 6 03:47:43 2019
@@ -1,5 +1,6 @@
-; RUN: llc < %s -asm-verbose=false -mtriple=x86_64-unknown-linux | FileCheck %s --check-prefix=CHECK --check-prefix=CMOV
-; RUN: llc < %s -asm-verbose=false -mtriple=i686-unknown-linux | FileCheck %s --check-prefix=CHECK --check-prefix=NOCMOV
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-unknown-linux | FileCheck %s --check-prefix=CHECK --check-prefix=CMOV
+; RUN: llc < %s -mtriple=i686-unknown-linux | FileCheck %s --check-prefix=CHECK --check-prefix=NOCMOV
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
@@ -7,168 +8,203 @@ target datalayout = "e-m:o-i64:64-f80:12
; One way to do that is with (select (fcmp une/oeq)), which gets
; legalized to setp/setne.
-; CHECK-LABEL: test_select_fcmp_oeq_i32:
-
-; CMOV-NEXT: movl %edi, %eax
-; CMOV-NEXT: ucomiss %xmm1, %xmm0
-; CMOV-NEXT: cmovnel %esi, %eax
-; CMOV-NEXT: cmovpl %esi, %eax
-; CMOV-NEXT: retq
-
-; NOCMOV-NEXT: flds 8(%esp)
-; NOCMOV-NEXT: flds 4(%esp)
-; NOCMOV-NEXT: fucompp
-; NOCMOV-NEXT: fnstsw %ax
-; NOCMOV-NEXT: sahf
-; NOCMOV-NEXT: leal 16(%esp), %eax
-; NOCMOV-NEXT: jne [[TBB:.LBB[0-9_]+]]
-; NOCMOV-NEXT: jp [[TBB]]
-; NOCMOV-NEXT: leal 12(%esp), %eax
-; NOCMOV-NEXT:[[TBB]]:
-; NOCMOV-NEXT: movl (%eax), %eax
-; NOCMOV-NEXT: retl
define i32 @test_select_fcmp_oeq_i32(float %a, float %b, i32 %c, i32 %d) #0 {
+; CMOV-LABEL: test_select_fcmp_oeq_i32:
+; CMOV: # %bb.0: # %entry
+; CMOV-NEXT: movl %edi, %eax
+; CMOV-NEXT: ucomiss %xmm1, %xmm0
+; CMOV-NEXT: cmovnel %esi, %eax
+; CMOV-NEXT: cmovpl %esi, %eax
+; CMOV-NEXT: retq
+;
+; NOCMOV-LABEL: test_select_fcmp_oeq_i32:
+; NOCMOV: # %bb.0: # %entry
+; NOCMOV-NEXT: flds {{[0-9]+}}(%esp)
+; NOCMOV-NEXT: flds {{[0-9]+}}(%esp)
+; NOCMOV-NEXT: fucompp
+; NOCMOV-NEXT: fnstsw %ax
+; NOCMOV-NEXT: # kill: def $ah killed $ah killed $ax
+; NOCMOV-NEXT: sahf
+; NOCMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+; NOCMOV-NEXT: jne .LBB0_3
+; NOCMOV-NEXT: # %bb.1: # %entry
+; NOCMOV-NEXT: jp .LBB0_3
+; NOCMOV-NEXT: # %bb.2: # %entry
+; NOCMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+; NOCMOV-NEXT: .LBB0_3: # %entry
+; NOCMOV-NEXT: movl (%eax), %eax
+; NOCMOV-NEXT: retl
entry:
%cmp = fcmp oeq float %a, %b
%r = select i1 %cmp, i32 %c, i32 %d
ret i32 %r
}
-; CHECK-LABEL: test_select_fcmp_oeq_i64:
-
-; CMOV-NEXT: movq %rdi, %rax
-; CMOV-NEXT: ucomiss %xmm1, %xmm0
-; CMOV-NEXT: cmovneq %rsi, %rax
-; CMOV-NEXT: cmovpq %rsi, %rax
-; CMOV-NEXT: retq
-
-; NOCMOV-NEXT: flds 8(%esp)
-; NOCMOV-NEXT: flds 4(%esp)
-; NOCMOV-NEXT: fucompp
-; NOCMOV-NEXT: fnstsw %ax
-; NOCMOV-NEXT: sahf
-; NOCMOV-NEXT: leal 20(%esp), %ecx
-; NOCMOV-NEXT: jne [[TBB:.LBB[0-9_]+]]
-; NOCMOV-NEXT: jp [[TBB]]
-; NOCMOV-NEXT: leal 12(%esp), %ecx
-; NOCMOV-NEXT: [[TBB]]:
-; NOCMOV-NEXT: movl (%ecx), %eax
-; NOCMOV-NEXT: movl 4(%ecx), %edx
-; NOCMOV-NEXT: retl
define i64 @test_select_fcmp_oeq_i64(float %a, float %b, i64 %c, i64 %d) #0 {
+; CMOV-LABEL: test_select_fcmp_oeq_i64:
+; CMOV: # %bb.0: # %entry
+; CMOV-NEXT: movq %rdi, %rax
+; CMOV-NEXT: ucomiss %xmm1, %xmm0
+; CMOV-NEXT: cmovneq %rsi, %rax
+; CMOV-NEXT: cmovpq %rsi, %rax
+; CMOV-NEXT: retq
+;
+; NOCMOV-LABEL: test_select_fcmp_oeq_i64:
+; NOCMOV: # %bb.0: # %entry
+; NOCMOV-NEXT: flds {{[0-9]+}}(%esp)
+; NOCMOV-NEXT: flds {{[0-9]+}}(%esp)
+; NOCMOV-NEXT: fucompp
+; NOCMOV-NEXT: fnstsw %ax
+; NOCMOV-NEXT: # kill: def $ah killed $ah killed $ax
+; NOCMOV-NEXT: sahf
+; NOCMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+; NOCMOV-NEXT: jne .LBB1_3
+; NOCMOV-NEXT: # %bb.1: # %entry
+; NOCMOV-NEXT: jp .LBB1_3
+; NOCMOV-NEXT: # %bb.2: # %entry
+; NOCMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+; NOCMOV-NEXT: .LBB1_3: # %entry
+; NOCMOV-NEXT: movl (%ecx), %eax
+; NOCMOV-NEXT: movl 4(%ecx), %edx
+; NOCMOV-NEXT: retl
entry:
%cmp = fcmp oeq float %a, %b
%r = select i1 %cmp, i64 %c, i64 %d
ret i64 %r
}
-; CHECK-LABEL: test_select_fcmp_une_i64:
-
-; CMOV-NEXT: movq %rsi, %rax
-; CMOV-NEXT: ucomiss %xmm1, %xmm0
-; CMOV-NEXT: cmovneq %rdi, %rax
-; CMOV-NEXT: cmovpq %rdi, %rax
-; CMOV-NEXT: retq
-
-; NOCMOV-NEXT: flds 8(%esp)
-; NOCMOV-NEXT: flds 4(%esp)
-; NOCMOV-NEXT: fucompp
-; NOCMOV-NEXT: fnstsw %ax
-; NOCMOV-NEXT: sahf
-; NOCMOV-NEXT: leal 12(%esp), %ecx
-; NOCMOV-NEXT: jne [[TBB:.LBB[0-9_]+]]
-; NOCMOV-NEXT: jp [[TBB]]
-; NOCMOV-NEXT: leal 20(%esp), %ecx
-; NOCMOV-NEXT: [[TBB]]:
-; NOCMOV-NEXT: movl (%ecx), %eax
-; NOCMOV-NEXT: movl 4(%ecx), %edx
-; NOCMOV-NEXT: retl
define i64 @test_select_fcmp_une_i64(float %a, float %b, i64 %c, i64 %d) #0 {
+; CMOV-LABEL: test_select_fcmp_une_i64:
+; CMOV: # %bb.0: # %entry
+; CMOV-NEXT: movq %rsi, %rax
+; CMOV-NEXT: ucomiss %xmm1, %xmm0
+; CMOV-NEXT: cmovneq %rdi, %rax
+; CMOV-NEXT: cmovpq %rdi, %rax
+; CMOV-NEXT: retq
+;
+; NOCMOV-LABEL: test_select_fcmp_une_i64:
+; NOCMOV: # %bb.0: # %entry
+; NOCMOV-NEXT: flds {{[0-9]+}}(%esp)
+; NOCMOV-NEXT: flds {{[0-9]+}}(%esp)
+; NOCMOV-NEXT: fucompp
+; NOCMOV-NEXT: fnstsw %ax
+; NOCMOV-NEXT: # kill: def $ah killed $ah killed $ax
+; NOCMOV-NEXT: sahf
+; NOCMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+; NOCMOV-NEXT: jne .LBB2_3
+; NOCMOV-NEXT: # %bb.1: # %entry
+; NOCMOV-NEXT: jp .LBB2_3
+; NOCMOV-NEXT: # %bb.2: # %entry
+; NOCMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+; NOCMOV-NEXT: .LBB2_3: # %entry
+; NOCMOV-NEXT: movl (%ecx), %eax
+; NOCMOV-NEXT: movl 4(%ecx), %edx
+; NOCMOV-NEXT: retl
entry:
%cmp = fcmp une float %a, %b
%r = select i1 %cmp, i64 %c, i64 %d
ret i64 %r
}
-; CHECK-LABEL: test_select_fcmp_oeq_f64:
-
-; CMOV-NEXT: ucomiss %xmm1, %xmm0
-; CMOV-NEXT: jne [[TBB:.LBB[0-9_]+]]
-; CMOV-NEXT: jp [[TBB]]
-; CMOV-NEXT: movaps %xmm2, %xmm3
-; CMOV-NEXT: [[TBB]]:
-; CMOV-NEXT: movaps %xmm3, %xmm0
-; CMOV-NEXT: retq
-
-; NOCMOV-NEXT: flds 8(%esp)
-; NOCMOV-NEXT: flds 4(%esp)
-; NOCMOV-NEXT: fucompp
-; NOCMOV-NEXT: fnstsw %ax
-; NOCMOV-NEXT: sahf
-; NOCMOV-NEXT: leal 20(%esp), %eax
-; NOCMOV-NEXT: jne [[TBB:.LBB[0-9_]+]]
-; NOCMOV-NEXT: jp [[TBB]]
-; NOCMOV-NEXT: leal 12(%esp), %eax
-; NOCMOV-NEXT: [[TBB]]:
-; NOCMOV-NEXT: fldl (%eax)
-; NOCMOV-NEXT: retl
define double @test_select_fcmp_oeq_f64(float %a, float %b, double %c, double %d) #0 {
+; CMOV-LABEL: test_select_fcmp_oeq_f64:
+; CMOV: # %bb.0: # %entry
+; CMOV-NEXT: ucomiss %xmm1, %xmm0
+; CMOV-NEXT: jne .LBB3_3
+; CMOV-NEXT: # %bb.1: # %entry
+; CMOV-NEXT: jp .LBB3_3
+; CMOV-NEXT: # %bb.2: # %entry
+; CMOV-NEXT: movaps %xmm2, %xmm3
+; CMOV-NEXT: .LBB3_3: # %entry
+; CMOV-NEXT: movaps %xmm3, %xmm0
+; CMOV-NEXT: retq
+;
+; NOCMOV-LABEL: test_select_fcmp_oeq_f64:
+; NOCMOV: # %bb.0: # %entry
+; NOCMOV-NEXT: flds {{[0-9]+}}(%esp)
+; NOCMOV-NEXT: flds {{[0-9]+}}(%esp)
+; NOCMOV-NEXT: fucompp
+; NOCMOV-NEXT: fnstsw %ax
+; NOCMOV-NEXT: # kill: def $ah killed $ah killed $ax
+; NOCMOV-NEXT: sahf
+; NOCMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+; NOCMOV-NEXT: jne .LBB3_3
+; NOCMOV-NEXT: # %bb.1: # %entry
+; NOCMOV-NEXT: jp .LBB3_3
+; NOCMOV-NEXT: # %bb.2: # %entry
+; NOCMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+; NOCMOV-NEXT: .LBB3_3: # %entry
+; NOCMOV-NEXT: fldl (%eax)
+; NOCMOV-NEXT: retl
entry:
%cmp = fcmp oeq float %a, %b
%r = select i1 %cmp, double %c, double %d
ret double %r
}
-; CHECK-LABEL: test_select_fcmp_oeq_v4i32:
-
-; CMOV-NEXT: ucomiss %xmm1, %xmm0
-; CMOV-NEXT: jne [[TBB:.LBB[0-9_]+]]
-; CMOV-NEXT: jp [[TBB]]
-; CMOV-NEXT: movaps %xmm2, %xmm3
-; CMOV-NEXT: [[TBB]]:
-; CMOV-NEXT: movaps %xmm3, %xmm0
-; CMOV-NEXT: retq
-
-; NOCMOV-NEXT: pushl %edi
-; NOCMOV-NEXT: pushl %esi
-; NOCMOV-NEXT: flds 20(%esp)
-; NOCMOV-NEXT: flds 16(%esp)
-; NOCMOV-NEXT: fucompp
-; NOCMOV-NEXT: fnstsw %ax
-; NOCMOV-NEXT: sahf
-; NOCMOV-NEXT: leal 40(%esp), %eax
-; NOCMOV-NEXT: jne [[TBB:.LBB[0-9_]+]]
-; NOCMOV-NEXT: jp [[TBB]]
-; NOCMOV-NEXT: leal 24(%esp), %eax
-; NOCMOV-NEXT: [[TBB]]:
-; NOCMOV-NEXT: movl (%eax), %ecx
-; NOCMOV-NEXT: leal 44(%esp), %edx
-; NOCMOV-NEXT: jne [[TBB:.LBB[0-9_]+]]
-; NOCMOV-NEXT: jp [[TBB]]
-; NOCMOV-NEXT: leal 28(%esp), %edx
-; NOCMOV-NEXT: [[TBB]]:
-; NOCMOV-NEXT: movl 12(%esp), %eax
-; NOCMOV-NEXT: movl (%edx), %edx
-; NOCMOV-NEXT: leal 48(%esp), %esi
-; NOCMOV-NEXT: jne [[TBB:.LBB[0-9_]+]]
-; NOCMOV-NEXT: jp [[TBB]]
-; NOCMOV-NEXT: leal 32(%esp), %esi
-; NOCMOV-NEXT: [[TBB]]:
-; NOCMOV-NEXT: movl (%esi), %esi
-; NOCMOV-NEXT: leal 52(%esp), %edi
-; NOCMOV-NEXT: jne [[TBB:.LBB[0-9_]+]]
-; NOCMOV-NEXT: jp [[TBB]]
-; NOCMOV-NEXT: leal 36(%esp), %edi
-; NOCMOV-NEXT: [[TBB]]:
-; NOCMOV-NEXT: movl (%edi), %edi
-; NOCMOV-NEXT: movl %edi, 12(%eax)
-; NOCMOV-NEXT: movl %esi, 8(%eax)
-; NOCMOV-NEXT: movl %edx, 4(%eax)
-; NOCMOV-NEXT: movl %ecx, (%eax)
-; NOCMOV-NEXT: popl %esi
-; NOCMOV-NEXT: popl %edi
-; NOCMOV-NEXT: retl $4
define <4 x i32> @test_select_fcmp_oeq_v4i32(float %a, float %b, <4 x i32> %c, <4 x i32> %d) #0 {
+; CMOV-LABEL: test_select_fcmp_oeq_v4i32:
+; CMOV: # %bb.0: # %entry
+; CMOV-NEXT: ucomiss %xmm1, %xmm0
+; CMOV-NEXT: jne .LBB4_3
+; CMOV-NEXT: # %bb.1: # %entry
+; CMOV-NEXT: jp .LBB4_3
+; CMOV-NEXT: # %bb.2: # %entry
+; CMOV-NEXT: movaps %xmm2, %xmm3
+; CMOV-NEXT: .LBB4_3: # %entry
+; CMOV-NEXT: movaps %xmm3, %xmm0
+; CMOV-NEXT: retq
+;
+; NOCMOV-LABEL: test_select_fcmp_oeq_v4i32:
+; NOCMOV: # %bb.0: # %entry
+; NOCMOV-NEXT: pushl %edi
+; NOCMOV-NEXT: pushl %esi
+; NOCMOV-NEXT: flds {{[0-9]+}}(%esp)
+; NOCMOV-NEXT: flds {{[0-9]+}}(%esp)
+; NOCMOV-NEXT: fucompp
+; NOCMOV-NEXT: fnstsw %ax
+; NOCMOV-NEXT: # kill: def $ah killed $ah killed $ax
+; NOCMOV-NEXT: sahf
+; NOCMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+; NOCMOV-NEXT: jne .LBB4_3
+; NOCMOV-NEXT: # %bb.1: # %entry
+; NOCMOV-NEXT: jp .LBB4_3
+; NOCMOV-NEXT: # %bb.2: # %entry
+; NOCMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+; NOCMOV-NEXT: .LBB4_3: # %entry
+; NOCMOV-NEXT: movl (%eax), %ecx
+; NOCMOV-NEXT: leal {{[0-9]+}}(%esp), %edx
+; NOCMOV-NEXT: jne .LBB4_6
+; NOCMOV-NEXT: # %bb.4: # %entry
+; NOCMOV-NEXT: jp .LBB4_6
+; NOCMOV-NEXT: # %bb.5: # %entry
+; NOCMOV-NEXT: leal {{[0-9]+}}(%esp), %edx
+; NOCMOV-NEXT: .LBB4_6: # %entry
+; NOCMOV-NEXT: movl {{[0-9]+}}(%esp), %eax
+; NOCMOV-NEXT: movl (%edx), %edx
+; NOCMOV-NEXT: leal {{[0-9]+}}(%esp), %esi
+; NOCMOV-NEXT: jne .LBB4_9
+; NOCMOV-NEXT: # %bb.7: # %entry
+; NOCMOV-NEXT: jp .LBB4_9
+; NOCMOV-NEXT: # %bb.8: # %entry
+; NOCMOV-NEXT: leal {{[0-9]+}}(%esp), %esi
+; NOCMOV-NEXT: .LBB4_9: # %entry
+; NOCMOV-NEXT: movl (%esi), %esi
+; NOCMOV-NEXT: leal {{[0-9]+}}(%esp), %edi
+; NOCMOV-NEXT: jne .LBB4_12
+; NOCMOV-NEXT: # %bb.10: # %entry
+; NOCMOV-NEXT: jp .LBB4_12
+; NOCMOV-NEXT: # %bb.11: # %entry
+; NOCMOV-NEXT: leal {{[0-9]+}}(%esp), %edi
+; NOCMOV-NEXT: .LBB4_12: # %entry
+; NOCMOV-NEXT: movl (%edi), %edi
+; NOCMOV-NEXT: movl %edi, 12(%eax)
+; NOCMOV-NEXT: movl %esi, 8(%eax)
+; NOCMOV-NEXT: movl %edx, 4(%eax)
+; NOCMOV-NEXT: movl %ecx, (%eax)
+; NOCMOV-NEXT: popl %esi
+; NOCMOV-NEXT: popl %edi
+; NOCMOV-NEXT: retl $4
entry:
%cmp = fcmp oeq float %a, %b
%r = select i1 %cmp, <4 x i32> %c, <4 x i32> %d
@@ -177,21 +213,42 @@ entry:
; Also make sure we catch the original code-sequence of interest:
-; CMOV: [[ONE_F32_LCPI:.LCPI.*]]:
-; CMOV-NEXT: .long 1065353216
-
-; CHECK-LABEL: test_zext_fcmp_une:
-; CMOV-NEXT: ucomiss %xmm1, %xmm0
-; CMOV-NEXT: movss [[ONE_F32_LCPI]](%rip), %xmm0
-; CMOV-NEXT: jne [[TBB:.LBB[0-9_]+]]
-; CMOV-NEXT: jp [[TBB]]
-; CMOV-NEXT: xorps %xmm0, %xmm0
-; CMOV-NEXT: [[TBB]]:
-; CMOV-NEXT: retq
-
-; NOCMOV: jne
-; NOCMOV-NEXT: jp
define float @test_zext_fcmp_une(float %a, float %b) #0 {
+; CMOV-LABEL: test_zext_fcmp_une:
+; CMOV: # %bb.0: # %entry
+; CMOV-NEXT: ucomiss %xmm1, %xmm0
+; CMOV-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; CMOV-NEXT: jne .LBB5_3
+; CMOV-NEXT: # %bb.1: # %entry
+; CMOV-NEXT: jp .LBB5_3
+; CMOV-NEXT: # %bb.2: # %entry
+; CMOV-NEXT: xorps %xmm0, %xmm0
+; CMOV-NEXT: .LBB5_3: # %entry
+; CMOV-NEXT: retq
+;
+; NOCMOV-LABEL: test_zext_fcmp_une:
+; NOCMOV: # %bb.0: # %entry
+; NOCMOV-NEXT: flds {{[0-9]+}}(%esp)
+; NOCMOV-NEXT: flds {{[0-9]+}}(%esp)
+; NOCMOV-NEXT: fucompp
+; NOCMOV-NEXT: fnstsw %ax
+; NOCMOV-NEXT: # kill: def $ah killed $ah killed $ax
+; NOCMOV-NEXT: sahf
+; NOCMOV-NEXT: fld1
+; NOCMOV-NEXT: fldz
+; NOCMOV-NEXT: jne .LBB5_1
+; NOCMOV-NEXT: # %bb.2: # %entry
+; NOCMOV-NEXT: jp .LBB5_5
+; NOCMOV-NEXT: # %bb.3: # %entry
+; NOCMOV-NEXT: fstp %st(1)
+; NOCMOV-NEXT: jmp .LBB5_4
+; NOCMOV-NEXT: .LBB5_1:
+; NOCMOV-NEXT: fstp %st(0)
+; NOCMOV-NEXT: .LBB5_4: # %entry
+; NOCMOV-NEXT: fldz
+; NOCMOV-NEXT: .LBB5_5: # %entry
+; NOCMOV-NEXT: fstp %st(0)
+; NOCMOV-NEXT: retl
entry:
%cmp = fcmp une float %a, %b
%conv1 = zext i1 %cmp to i32
@@ -199,21 +256,42 @@ entry:
ret float %conv2
}
-; CMOV: [[ONE_F32_LCPI:.LCPI.*]]:
-; CMOV-NEXT: .long 1065353216
-
-; CHECK-LABEL: test_zext_fcmp_oeq:
-; CMOV-NEXT: ucomiss %xmm1, %xmm0
-; CMOV-NEXT: xorps %xmm0, %xmm0
-; CMOV-NEXT: jne [[TBB:.LBB[0-9_]+]]
-; CMOV-NEXT: jp [[TBB]]
-; CMOV-NEXT: movss [[ONE_F32_LCPI]](%rip), %xmm0
-; CMOV-NEXT: [[TBB]]:
-; CMOV-NEXT: retq
-
-; NOCMOV: jne
-; NOCMOV-NEXT: jp
define float @test_zext_fcmp_oeq(float %a, float %b) #0 {
+; CMOV-LABEL: test_zext_fcmp_oeq:
+; CMOV: # %bb.0: # %entry
+; CMOV-NEXT: ucomiss %xmm1, %xmm0
+; CMOV-NEXT: xorps %xmm0, %xmm0
+; CMOV-NEXT: jne .LBB6_3
+; CMOV-NEXT: # %bb.1: # %entry
+; CMOV-NEXT: jp .LBB6_3
+; CMOV-NEXT: # %bb.2: # %entry
+; CMOV-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; CMOV-NEXT: .LBB6_3: # %entry
+; CMOV-NEXT: retq
+;
+; NOCMOV-LABEL: test_zext_fcmp_oeq:
+; NOCMOV: # %bb.0: # %entry
+; NOCMOV-NEXT: flds {{[0-9]+}}(%esp)
+; NOCMOV-NEXT: flds {{[0-9]+}}(%esp)
+; NOCMOV-NEXT: fucompp
+; NOCMOV-NEXT: fnstsw %ax
+; NOCMOV-NEXT: # kill: def $ah killed $ah killed $ax
+; NOCMOV-NEXT: sahf
+; NOCMOV-NEXT: fldz
+; NOCMOV-NEXT: fld1
+; NOCMOV-NEXT: jne .LBB6_1
+; NOCMOV-NEXT: # %bb.2: # %entry
+; NOCMOV-NEXT: jp .LBB6_5
+; NOCMOV-NEXT: # %bb.3: # %entry
+; NOCMOV-NEXT: fstp %st(1)
+; NOCMOV-NEXT: jmp .LBB6_4
+; NOCMOV-NEXT: .LBB6_1:
+; NOCMOV-NEXT: fstp %st(0)
+; NOCMOV-NEXT: .LBB6_4: # %entry
+; NOCMOV-NEXT: fldz
+; NOCMOV-NEXT: .LBB6_5: # %entry
+; NOCMOV-NEXT: fstp %st(0)
+; NOCMOV-NEXT: retl
entry:
%cmp = fcmp oeq float %a, %b
%conv1 = zext i1 %cmp to i32
@@ -243,30 +321,59 @@ attributes #0 = { nounwind }
; %13 = COPY %12
; Which was invalid as %12 is not the same value as %13
-; CHECK-LABEL: no_cascade_opt:
-; CMOV-DAG: cmpl %edx, %esi
-; CMOV-DAG: movb $20, %al
-; CMOV-DAG: movb $20, %dl
-; CMOV: jge [[BB2:.LBB[0-9_]+]]
-; CMOV: jle [[BB3:.LBB[0-9_]+]]
-; CMOV: [[BB0:.LBB[0-9_]+]]
-; CMOV: testl %edi, %edi
-; CMOV: jne [[BB4:.LBB[0-9_]+]]
-; CMOV: [[BB1:.LBB[0-9_]+]]
-; CMOV: movb %al, g8(%rip)
-; CMOV: retq
-; CMOV: [[BB2]]:
-; CMOV: movl %ecx, %edx
-; CMOV: jg [[BB0]]
-; CMOV: [[BB3]]:
-; CMOV: movl %edx, %eax
-; CMOV: testl %edi, %edi
-; CMOV: je [[BB1]]
-; CMOV: [[BB4]]:
-; CMOV: movl %edx, %eax
-; CMOV: movb %al, g8(%rip)
-; CMOV: retq
define void @no_cascade_opt(i32 %v0, i32 %v1, i32 %v2, i32 %v3) {
+; CMOV-LABEL: no_cascade_opt:
+; CMOV: # %bb.0: # %entry
+; CMOV-NEXT: cmpl %edx, %esi
+; CMOV-NEXT: movb $20, %al
+; CMOV-NEXT: movb $20, %dl
+; CMOV-NEXT: jge .LBB7_1
+; CMOV-NEXT: # %bb.2: # %entry
+; CMOV-NEXT: jle .LBB7_3
+; CMOV-NEXT: .LBB7_4: # %entry
+; CMOV-NEXT: testl %edi, %edi
+; CMOV-NEXT: jne .LBB7_5
+; CMOV-NEXT: .LBB7_6: # %entry
+; CMOV-NEXT: movb %al, {{.*}}(%rip)
+; CMOV-NEXT: retq
+; CMOV-NEXT: .LBB7_1: # %entry
+; CMOV-NEXT: movl %ecx, %edx
+; CMOV-NEXT: jg .LBB7_4
+; CMOV-NEXT: .LBB7_3: # %entry
+; CMOV-NEXT: movl %edx, %eax
+; CMOV-NEXT: testl %edi, %edi
+; CMOV-NEXT: je .LBB7_6
+; CMOV-NEXT: .LBB7_5: # %entry
+; CMOV-NEXT: movl %edx, %eax
+; CMOV-NEXT: movb %al, {{.*}}(%rip)
+; CMOV-NEXT: retq
+;
+; NOCMOV-LABEL: no_cascade_opt:
+; NOCMOV: # %bb.0: # %entry
+; NOCMOV-NEXT: movl {{[0-9]+}}(%esp), %eax
+; NOCMOV-NEXT: cmpl {{[0-9]+}}(%esp), %eax
+; NOCMOV-NEXT: movb $20, %al
+; NOCMOV-NEXT: movb $20, %cl
+; NOCMOV-NEXT: jge .LBB7_1
+; NOCMOV-NEXT: # %bb.2: # %entry
+; NOCMOV-NEXT: jle .LBB7_3
+; NOCMOV-NEXT: .LBB7_4: # %entry
+; NOCMOV-NEXT: cmpl $0, {{[0-9]+}}(%esp)
+; NOCMOV-NEXT: jne .LBB7_5
+; NOCMOV-NEXT: .LBB7_6: # %entry
+; NOCMOV-NEXT: movb %al, g8
+; NOCMOV-NEXT: retl
+; NOCMOV-NEXT: .LBB7_1: # %entry
+; NOCMOV-NEXT: movb {{[0-9]+}}(%esp), %cl
+; NOCMOV-NEXT: jg .LBB7_4
+; NOCMOV-NEXT: .LBB7_3: # %entry
+; NOCMOV-NEXT: movl %ecx, %eax
+; NOCMOV-NEXT: cmpl $0, {{[0-9]+}}(%esp)
+; NOCMOV-NEXT: je .LBB7_6
+; NOCMOV-NEXT: .LBB7_5: # %entry
+; NOCMOV-NEXT: movl %ecx, %eax
+; NOCMOV-NEXT: movb %al, g8
+; NOCMOV-NEXT: retl
entry:
%c0 = icmp eq i32 %v0, 0
%c1 = icmp slt i32 %v1, %v2
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