[PATCH] D58980: [ARC] Add more load/store variants and simple pass to generate postincrement instructions

[Pete Couperus via Phabricator via llvm-commits]

petecoup added a comment.

Can you add a few disassembler tests for the new variants here?



================
Comment at: llvm/lib/Target/ARC/ARCOptAddrMode.cpp:140
+                               MachineDominatorTree *MDT,
+                               MachineRegisterInfo *RINFO) {
+
----------------
Other backends seem to use MRI for MachineRegisterInfo, I'd reuse that here too.


================
Comment at: llvm/lib/Target/ARC/ARCOptAddrMode.cpp:272
+  MachineInstr *Last = Ldst;
+  if (MDT->dominates(Ldst, Add)) {
+    std::swap(First, Last);
----------------
Drop braces in single-statement blocks?


================
Comment at: llvm/lib/Target/ARC/ARCOptAddrMode.cpp:339
+  }
+  if (Result && Uses) {
+    *Uses = (Result == Ldst) ? UsesAfterLdst : UsesAfterAdd;
----------------
Drop braces.


================
Comment at: llvm/lib/Target/ARC/ARCOptAddrMode.cpp:383
+      assert(isValidLoadStoreOffset(NewOffset) &&
+             "New offset won't fir into LD/ST");
+    } else {
----------------
Typo: fit


================
Comment at: llvm/lib/Target/ARC/ARCOptAddrMode.cpp:384
+             "New offset won't fir into LD/ST");
+    } else {
+      llvm_unreachable("unexpected instruction");
----------------
Drop braces.


Repository:
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https://reviews.llvm.org/D58980