[PATCH] D58725: GlobalISel: Use multiple returns for intrinsic structs

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Feb 27 09:44:39 PST 2019


arsenm created this revision.
arsenm added reviewers: aemerson, aditya_nandakumar, paquette, rtereshin, qcolombet, t.p.northover.
Herald added subscribers: Petar.Avramovic, volkan, tpr, javed.absar, kristof.beyls, rovka, nhaehnle, wdng, jvesely.

This is consistent with what SelectionDAG does and is much easier to
work with than the extract sequence with an artificial wide register.

      

For the AMDGPU control flow intrinsics, this was producing an s128 for
the i64, i1 tuple return. Any legalization that should apply to a real
 s128 value would badly obscure the direct values that need to be seen.


https://reviews.llvm.org/D58725

Files:
  include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
  lib/CodeGen/GlobalISel/IRTranslator.cpp
  lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
  test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
  test/CodeGen/AMDGPU/GlobalISel/irtranslator-struct-return-intrinsics.ll

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