[PATCH] D58703: [x86] convert anyext of pinsrb scalar op to subreg insert

[Sanjay Patel via Phabricator via llvm-commits]

spatel created this revision.
spatel added reviewers: craig.topper, RKSimon.
Herald added subscribers: hiraditya, mcrosier.
Herald added a project: LLVM.

This is trying to fix one of the potential regressions seen in D58521 <https://reviews.llvm.org/D58521>, but it's a problem independent of that patch as shown in the diffs here.

We are aggressively converting 'anyext' to 'zext' in isel to avoid partial reg stalls, but that shouldn't be a problem for pinsrb because the instruction only uses the low byte of the 32-bit scalar reg. AFAICT, this isn't a problem for pinsrw because we promote all 16-bit ops.

I'm not sure why we don't get load folding with some of the fast-isel tests, but I assume that's as expected or an independent problem.


https://reviews.llvm.org/D58703

Files:
  llvm/lib/Target/X86/X86InstrSSE.td
  llvm/test/CodeGen/X86/avx-intrinsics-fast-isel.ll
  llvm/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll
  llvm/test/CodeGen/X86/sse41-intrinsics-fast-isel.ll
  llvm/test/CodeGen/X86/vec_saddo.ll
  llvm/test/CodeGen/X86/vec_smulo.ll
  llvm/test/CodeGen/X86/vec_ssubo.ll
  llvm/test/CodeGen/X86/vec_uaddo.ll
  llvm/test/CodeGen/X86/vec_umulo.ll
  llvm/test/CodeGen/X86/vec_usubo.ll

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