[PATCH] D58672: [X86] Avoid codegen changes when DBG_VALUE appears between lowered selects

[Jeremy Morse via Phabricator via llvm-commits]

jmorse created this revision.
jmorse added reviewers: craig.topper, andreadb, RKSimon.
Herald added subscribers: llvm-commits, jdoerfert.
Herald added a project: LLVM.

X86TargetLowering::EmitLoweredSelect currently detects sequences of CMOV pseudo instructions without accounting for debug intrinsics. This leads to different codegen with and without option -g, if a DBG_VALUE instruction lands in the middle of several lowered selects, as demonstrated if you run the added test function below with trunk (additional block branching occurs).

Work around this by skipping over debug instructions when looking for CMOV sequences, and sinking those debug insts into the EmitLoweredSelect sunk block. This might slightly shift where variables appear in the instruction sequence, but won't re-order assignments.


Repository:
  rL LLVM

https://reviews.llvm.org/D58672

Files:
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/pseudo_cmov_lower2.ll

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