[PATCH] D57823: [ARM] Make fullfp16 instructions not conditionalisable.

[Simon Tatham via Phabricator via llvm-commits]

simon_tatham updated this revision to Diff 187945.
simon_tatham added a comment.

I'm not as familiar with the NEON FP16 instructions, but in a quick
look I didn't see a corresponding issue with predicating them – e.g.
the vector `vadd.f32` and `vadd.f16` are just as predicable as each
other, unlike the scalar ones.

Here's a revised patch in which I've added checks at disassembly time,
and a couple of tests for them.

I've made the disassembler return SoftFail instead of Fail when it
sees a predicated fp16 instruction (reflecting that the ArmARM defines
them as CONSTRAINED UNPREDICTABLE rather than actually undefined or
meaning something else), and I've only added a token test or two to
make sure the mechanism works (rationale: the other set of tests has
exhaustively checked that the Unpredicable flag is set everywhere it
should be, and this one just needs to check that it's correctly
handled in disassembly).


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D57823/new/

https://reviews.llvm.org/D57823

Files:
  llvm/include/llvm/Target/Target.td
  llvm/lib/Target/ARM/ARMInstrFormats.td
  llvm/lib/Target/ARM/ARMInstrVFP.td
  llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
  llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
  llvm/test/CodeGen/ARM/fp16-no-condition.ll
  llvm/test/MC/ARM/fullfp16-nopred.s
  llvm/test/MC/Disassembler/ARM/fullfp16-arm-nopred.txt
  llvm/test/MC/Disassembler/ARM/fullfp16-thumb-nopred.txt
  llvm/utils/TableGen/CodeGenInstruction.cpp

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