[llvm] r354178 - [X86] Don't set exception mask bits when modifying FPCW to change rounding mode for fp->int conversion
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 15 13:59:33 PST 2019
Author: ctopper
Date: Fri Feb 15 13:59:33 2019
New Revision: 354178
URL: http://llvm.org/viewvc/llvm-project?rev=354178&view=rev
Log:
[X86] Don't set exception mask bits when modifying FPCW to change rounding mode for fp->int conversion
When we need to do an fp->int conversion using x87 instructions, we need to temporarily change the rounding mode to 0b11 and perform a store. To do this we save the old value of the fpcw to the stack, then set the fpcw to 0xc7f, do the store, then restore fpcw. But the 0xc7f value forces the exception mask bits 1. While this is what they would be in the default FP environment, as we move to support changing the FP environments, we shouldn't make this assumption.
This patch changes the code to explicitly OR 0xc00 with the old value so that only the rounding mode is changed. Unfortunately, this requires two stack temporaries instead of one. One to hold the old value and one to hold the new value. Without two stack temporaries we would need an additional GPR. We already need one to do the OR operation in. This is similar to what gcc and icc do for this operation. Though they are both better at reusing the stack temporaries when there are multiple truncates in a function(or at least in a basic block)
Differential Revision: https://reviews.llvm.org/D57788
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
llvm/trunk/test/CodeGen/X86/bswap_tree2.ll
llvm/trunk/test/CodeGen/X86/fp-cvt.ll
llvm/trunk/test/CodeGen/X86/inline-asm-fpstack.ll
llvm/trunk/test/CodeGen/X86/pr34080-2.ll
llvm/trunk/test/CodeGen/X86/pr34080.ll
llvm/trunk/test/CodeGen/X86/pr40529.ll
llvm/trunk/test/CodeGen/X86/scalar-fp-to-i64.ll
llvm/trunk/test/CodeGen/X86/trunc-to-bool.ll
llvm/trunk/test/CodeGen/X86/vec_fp_to_int-widen.ll
llvm/trunk/test/CodeGen/X86/vec_fp_to_int.ll
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=354178&r1=354177&r2=354178&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Fri Feb 15 13:59:33 2019
@@ -30103,27 +30103,37 @@ X86TargetLowering::EmitInstrWithCustomIn
case X86::FP80_TO_INT64_IN_MEM: {
// Change the floating point control register to use "round towards zero"
// mode when truncating to an integer value.
- int CWFrameIdx = MF->getFrameInfo().CreateStackObject(2, 2, false);
+ int OrigCWFrameIdx = MF->getFrameInfo().CreateStackObject(2, 2, false);
addFrameReference(BuildMI(*BB, MI, DL,
- TII->get(X86::FNSTCW16m)), CWFrameIdx);
+ TII->get(X86::FNSTCW16m)), OrigCWFrameIdx);
- // Load the old value of the high byte of the control word...
+ // Load the old value of the control word...
unsigned OldCW =
+ MF->getRegInfo().createVirtualRegister(&X86::GR32RegClass);
+ addFrameReference(BuildMI(*BB, MI, DL, TII->get(X86::MOVZX32rm16), OldCW),
+ OrigCWFrameIdx);
+
+ // OR 0b11 into bit 10 and 11. 0b11 is the encoding for round toward zero.
+ unsigned NewCW =
+ MF->getRegInfo().createVirtualRegister(&X86::GR32RegClass);
+ BuildMI(*BB, MI, DL, TII->get(X86::OR32ri), NewCW)
+ .addReg(OldCW, RegState::Kill).addImm(0xC00);
+
+ // Extract to 16 bits.
+ unsigned NewCW16 =
MF->getRegInfo().createVirtualRegister(&X86::GR16RegClass);
- addFrameReference(BuildMI(*BB, MI, DL, TII->get(X86::MOV16rm), OldCW),
- CWFrameIdx);
+ BuildMI(*BB, MI, DL, TII->get(TargetOpcode::COPY), NewCW16)
+ .addReg(NewCW, RegState::Kill, X86::sub_16bit);
- // Set the high part to be round to zero...
- addFrameReference(BuildMI(*BB, MI, DL, TII->get(X86::MOV16mi)), CWFrameIdx)
- .addImm(0xC7F);
+ // Prepare memory for FLDCW.
+ int NewCWFrameIdx = MF->getFrameInfo().CreateStackObject(2, 2, false);
+ addFrameReference(BuildMI(*BB, MI, DL, TII->get(X86::MOV16mr)),
+ NewCWFrameIdx)
+ .addReg(NewCW16, RegState::Kill);
// Reload the modified control word now...
addFrameReference(BuildMI(*BB, MI, DL,
- TII->get(X86::FLDCW16m)), CWFrameIdx);
-
- // Restore the memory image of control word to original value
- addFrameReference(BuildMI(*BB, MI, DL, TII->get(X86::MOV16mr)), CWFrameIdx)
- .addReg(OldCW);
+ TII->get(X86::FLDCW16m)), NewCWFrameIdx);
// Get the X86 opcode to use.
unsigned Opc;
@@ -30146,7 +30156,7 @@ X86TargetLowering::EmitInstrWithCustomIn
// Reload the original control word now.
addFrameReference(BuildMI(*BB, MI, DL,
- TII->get(X86::FLDCW16m)), CWFrameIdx);
+ TII->get(X86::FLDCW16m)), OrigCWFrameIdx);
MI.eraseFromParent(); // The pseudo instruction is gone now.
return BB;
Modified: llvm/trunk/test/CodeGen/X86/bswap_tree2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bswap_tree2.ll?rev=354178&r1=354177&r2=354178&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bswap_tree2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bswap_tree2.ll Fri Feb 15 13:59:33 2019
@@ -103,13 +103,13 @@ define i32 @test3(float %x) nounwind {
; CHECK: # %bb.0:
; CHECK-NEXT: subl $8, %esp
; CHECK-NEXT: flds {{[0-9]+}}(%esp)
-; CHECK-NEXT: fnstcw {{[0-9]+}}(%esp)
-; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F
-; CHECK-NEXT: fldcw {{[0-9]+}}(%esp)
+; CHECK-NEXT: fnstcw (%esp)
+; CHECK-NEXT: movzwl (%esp), %eax
+; CHECK-NEXT: orl $3072, %eax # imm = 0xC00
; CHECK-NEXT: movw %ax, {{[0-9]+}}(%esp)
-; CHECK-NEXT: fistpl {{[0-9]+}}(%esp)
; CHECK-NEXT: fldcw {{[0-9]+}}(%esp)
+; CHECK-NEXT: fistpl {{[0-9]+}}(%esp)
+; CHECK-NEXT: fldcw (%esp)
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: movl %ecx, %edx
; CHECK-NEXT: shll $8, %edx
Modified: llvm/trunk/test/CodeGen/X86/fp-cvt.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fp-cvt.ll?rev=354178&r1=354177&r2=354178&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fp-cvt.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fp-cvt.ll Fri Feb 15 13:59:33 2019
@@ -10,17 +10,17 @@
define i16 @fptosi_i16_fp80(x86_fp80 %a0) nounwind {
; X86-LABEL: fptosi_i16_fp80:
; X86: # %bb.0:
-; X86-NEXT: pushl %eax
+; X86-NEXT: subl $8, %esp
; X86-NEXT: fldt {{[0-9]+}}(%esp)
-; X86-NEXT: fnstcw (%esp)
-; X86-NEXT: movzwl (%esp), %eax
-; X86-NEXT: movw $3199, (%esp) # imm = 0xC7F
-; X86-NEXT: fldcw (%esp)
-; X86-NEXT: movw %ax, (%esp)
+; X86-NEXT: fnstcw {{[0-9]+}}(%esp)
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: orl $3072, %eax # imm = 0xC00
+; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
+; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: fistps {{[0-9]+}}(%esp)
-; X86-NEXT: fldcw (%esp)
+; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: popl %ecx
+; X86-NEXT: addl $8, %esp
; X86-NEXT: retl
;
; X64-X87-LABEL: fptosi_i16_fp80:
@@ -28,9 +28,9 @@ define i16 @fptosi_i16_fp80(x86_fp80 %a0
; X64-X87-NEXT: fldt {{[0-9]+}}(%rsp)
; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
-; X64-X87-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F
-; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
+; X64-X87-NEXT: orl $3072, %eax # imm = 0xC00
; X64-X87-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
+; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fistps -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
@@ -49,18 +49,18 @@ define i16 @fptosi_i16_fp80(x86_fp80 %a0
define i16 @fptosi_i16_fp80_ld(x86_fp80 *%a0) nounwind {
; X86-LABEL: fptosi_i16_fp80_ld:
; X86: # %bb.0:
-; X86-NEXT: pushl %eax
+; X86-NEXT: subl $8, %esp
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: fldt (%eax)
-; X86-NEXT: fnstcw (%esp)
-; X86-NEXT: movzwl (%esp), %eax
-; X86-NEXT: movw $3199, (%esp) # imm = 0xC7F
-; X86-NEXT: fldcw (%esp)
-; X86-NEXT: movw %ax, (%esp)
+; X86-NEXT: fnstcw {{[0-9]+}}(%esp)
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: orl $3072, %eax # imm = 0xC00
+; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
+; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: fistps {{[0-9]+}}(%esp)
-; X86-NEXT: fldcw (%esp)
+; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: popl %ecx
+; X86-NEXT: addl $8, %esp
; X86-NEXT: retl
;
; X64-X87-LABEL: fptosi_i16_fp80_ld:
@@ -68,9 +68,9 @@ define i16 @fptosi_i16_fp80_ld(x86_fp80
; X64-X87-NEXT: fldt (%rdi)
; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
-; X64-X87-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F
-; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
+; X64-X87-NEXT: orl $3072, %eax # imm = 0xC00
; X64-X87-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
+; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fistps -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
@@ -92,13 +92,13 @@ define i32 @fptosi_i32_fp80(x86_fp80 %a0
; X86: # %bb.0:
; X86-NEXT: subl $8, %esp
; X86-NEXT: fldt {{[0-9]+}}(%esp)
-; X86-NEXT: fnstcw {{[0-9]+}}(%esp)
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F
-; X86-NEXT: fldcw {{[0-9]+}}(%esp)
+; X86-NEXT: fnstcw (%esp)
+; X86-NEXT: movzwl (%esp), %eax
+; X86-NEXT: orl $3072, %eax # imm = 0xC00
; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
-; X86-NEXT: fistpl {{[0-9]+}}(%esp)
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
+; X86-NEXT: fistpl {{[0-9]+}}(%esp)
+; X86-NEXT: fldcw (%esp)
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: addl $8, %esp
; X86-NEXT: retl
@@ -108,9 +108,9 @@ define i32 @fptosi_i32_fp80(x86_fp80 %a0
; X64-X87-NEXT: fldt {{[0-9]+}}(%rsp)
; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
-; X64-X87-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F
-; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
+; X64-X87-NEXT: orl $3072, %eax # imm = 0xC00
; X64-X87-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
+; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fistpl -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movl -{{[0-9]+}}(%rsp), %eax
@@ -132,13 +132,13 @@ define i32 @fptosi_i32_fp80_ld(x86_fp80
; X86-NEXT: subl $8, %esp
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: fldt (%eax)
-; X86-NEXT: fnstcw {{[0-9]+}}(%esp)
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F
-; X86-NEXT: fldcw {{[0-9]+}}(%esp)
+; X86-NEXT: fnstcw (%esp)
+; X86-NEXT: movzwl (%esp), %eax
+; X86-NEXT: orl $3072, %eax # imm = 0xC00
; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
-; X86-NEXT: fistpl {{[0-9]+}}(%esp)
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
+; X86-NEXT: fistpl {{[0-9]+}}(%esp)
+; X86-NEXT: fldcw (%esp)
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: addl $8, %esp
; X86-NEXT: retl
@@ -148,9 +148,9 @@ define i32 @fptosi_i32_fp80_ld(x86_fp80
; X64-X87-NEXT: fldt (%rdi)
; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
-; X64-X87-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F
-; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
+; X64-X87-NEXT: orl $3072, %eax # imm = 0xC00
; X64-X87-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
+; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fistpl -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movl -{{[0-9]+}}(%rsp), %eax
@@ -177,9 +177,9 @@ define i64 @fptosi_i64_fp80(x86_fp80 %a0
; X86-NEXT: fldt 8(%ebp)
; X86-NEXT: fnstcw {{[0-9]+}}(%esp)
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F
-; X86-NEXT: fldcw {{[0-9]+}}(%esp)
+; X86-NEXT: orl $3072, %eax # imm = 0xC00
; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
+; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: fistpll {{[0-9]+}}(%esp)
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -193,9 +193,9 @@ define i64 @fptosi_i64_fp80(x86_fp80 %a0
; X64-X87-NEXT: fldt {{[0-9]+}}(%rsp)
; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
-; X64-X87-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F
-; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
+; X64-X87-NEXT: orl $3072, %eax # imm = 0xC00
; X64-X87-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
+; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fistpll -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movq -{{[0-9]+}}(%rsp), %rax
@@ -222,9 +222,9 @@ define i64 @fptosi_i64_fp80_ld(x86_fp80
; X86-NEXT: fldt (%eax)
; X86-NEXT: fnstcw {{[0-9]+}}(%esp)
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F
-; X86-NEXT: fldcw {{[0-9]+}}(%esp)
+; X86-NEXT: orl $3072, %eax # imm = 0xC00
; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
+; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: fistpll {{[0-9]+}}(%esp)
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -238,9 +238,9 @@ define i64 @fptosi_i64_fp80_ld(x86_fp80
; X64-X87-NEXT: fldt (%rdi)
; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
-; X64-X87-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F
-; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
+; X64-X87-NEXT: orl $3072, %eax # imm = 0xC00
; X64-X87-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
+; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fistpll -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movq -{{[0-9]+}}(%rsp), %rax
@@ -266,13 +266,13 @@ define i16 @fptoui_i16_fp80(x86_fp80 %a0
; X86: # %bb.0:
; X86-NEXT: subl $8, %esp
; X86-NEXT: fldt {{[0-9]+}}(%esp)
-; X86-NEXT: fnstcw {{[0-9]+}}(%esp)
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F
-; X86-NEXT: fldcw {{[0-9]+}}(%esp)
+; X86-NEXT: fnstcw (%esp)
+; X86-NEXT: movzwl (%esp), %eax
+; X86-NEXT: orl $3072, %eax # imm = 0xC00
; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
-; X86-NEXT: fistpl {{[0-9]+}}(%esp)
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
+; X86-NEXT: fistpl {{[0-9]+}}(%esp)
+; X86-NEXT: fldcw (%esp)
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
; X86-NEXT: addl $8, %esp
@@ -283,9 +283,9 @@ define i16 @fptoui_i16_fp80(x86_fp80 %a0
; X64-X87-NEXT: fldt {{[0-9]+}}(%rsp)
; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
-; X64-X87-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F
-; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
+; X64-X87-NEXT: orl $3072, %eax # imm = 0xC00
; X64-X87-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
+; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fistpl -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movl -{{[0-9]+}}(%rsp), %eax
@@ -309,13 +309,13 @@ define i16 @fptoui_i16_fp80_ld(x86_fp80
; X86-NEXT: subl $8, %esp
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: fldt (%eax)
-; X86-NEXT: fnstcw {{[0-9]+}}(%esp)
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F
-; X86-NEXT: fldcw {{[0-9]+}}(%esp)
+; X86-NEXT: fnstcw (%esp)
+; X86-NEXT: movzwl (%esp), %eax
+; X86-NEXT: orl $3072, %eax # imm = 0xC00
; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
-; X86-NEXT: fistpl {{[0-9]+}}(%esp)
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
+; X86-NEXT: fistpl {{[0-9]+}}(%esp)
+; X86-NEXT: fldcw (%esp)
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
; X86-NEXT: addl $8, %esp
@@ -326,9 +326,9 @@ define i16 @fptoui_i16_fp80_ld(x86_fp80
; X64-X87-NEXT: fldt (%rdi)
; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
-; X64-X87-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F
-; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
+; X64-X87-NEXT: orl $3072, %eax # imm = 0xC00
; X64-X87-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
+; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fistpl -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movl -{{[0-9]+}}(%rsp), %eax
@@ -357,9 +357,9 @@ define i32 @fptoui_i32_fp80(x86_fp80 %a0
; X86-NEXT: fldt 8(%ebp)
; X86-NEXT: fnstcw {{[0-9]+}}(%esp)
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F
-; X86-NEXT: fldcw {{[0-9]+}}(%esp)
+; X86-NEXT: orl $3072, %eax # imm = 0xC00
; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
+; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: fistpll {{[0-9]+}}(%esp)
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -372,9 +372,9 @@ define i32 @fptoui_i32_fp80(x86_fp80 %a0
; X64-X87-NEXT: fldt {{[0-9]+}}(%rsp)
; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
-; X64-X87-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F
-; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
+; X64-X87-NEXT: orl $3072, %eax # imm = 0xC00
; X64-X87-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
+; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fistpll -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movl -{{[0-9]+}}(%rsp), %eax
@@ -401,9 +401,9 @@ define i32 @fptoui_i32_fp80_ld(x86_fp80
; X86-NEXT: fldt (%eax)
; X86-NEXT: fnstcw {{[0-9]+}}(%esp)
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F
-; X86-NEXT: fldcw {{[0-9]+}}(%esp)
+; X86-NEXT: orl $3072, %eax # imm = 0xC00
; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
+; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: fistpll {{[0-9]+}}(%esp)
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -416,9 +416,9 @@ define i32 @fptoui_i32_fp80_ld(x86_fp80
; X64-X87-NEXT: fldt (%rdi)
; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
-; X64-X87-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F
-; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
+; X64-X87-NEXT: orl $3072, %eax # imm = 0xC00
; X64-X87-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
+; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fistpll -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movl -{{[0-9]+}}(%rsp), %eax
@@ -459,13 +459,13 @@ define i64 @fptoui_i64_fp80(x86_fp80 %a0
; X86-NEXT: fstp %st(0)
; X86-NEXT: fnstcw {{[0-9]+}}(%esp)
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F
-; X86-NEXT: fldcw {{[0-9]+}}(%esp)
+; X86-NEXT: xorl %edx, %edx
+; X86-NEXT: orl $3072, %eax # imm = 0xC00
; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
+; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: fistpll {{[0-9]+}}(%esp)
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
-; X86-NEXT: setbe %al
-; X86-NEXT: movzbl %al, %edx
+; X86-NEXT: setbe %dl
; X86-NEXT: shll $31, %edx
; X86-NEXT: xorl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -479,16 +479,16 @@ define i64 @fptoui_i64_fp80(x86_fp80 %a0
; X64-X87-NEXT: flds {{.*}}(%rip)
; X64-X87-NEXT: fld %st(1)
; X64-X87-NEXT: fsub %st(1), %st
-; X64-X87-NEXT: xorl %eax, %eax
; X64-X87-NEXT: fxch %st(1)
; X64-X87-NEXT: fucompi %st(2), %st
; X64-X87-NEXT: fcmovnbe %st(1), %st
; X64-X87-NEXT: fstp %st(1)
; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %ecx
-; X64-X87-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F
-; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
+; X64-X87-NEXT: xorl %eax, %eax
+; X64-X87-NEXT: orl $3072, %ecx # imm = 0xC00
; X64-X87-NEXT: movw %cx, -{{[0-9]+}}(%rsp)
+; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fistpll -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: setbe %al
@@ -541,13 +541,13 @@ define i64 @fptoui_i64_fp80_ld(x86_fp80
; X86-NEXT: fstp %st(0)
; X86-NEXT: fnstcw {{[0-9]+}}(%esp)
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F
-; X86-NEXT: fldcw {{[0-9]+}}(%esp)
+; X86-NEXT: xorl %edx, %edx
+; X86-NEXT: orl $3072, %eax # imm = 0xC00
; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
+; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: fistpll {{[0-9]+}}(%esp)
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
-; X86-NEXT: setbe %al
-; X86-NEXT: movzbl %al, %edx
+; X86-NEXT: setbe %dl
; X86-NEXT: shll $31, %edx
; X86-NEXT: xorl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -561,16 +561,16 @@ define i64 @fptoui_i64_fp80_ld(x86_fp80
; X64-X87-NEXT: flds {{.*}}(%rip)
; X64-X87-NEXT: fld %st(1)
; X64-X87-NEXT: fsub %st(1), %st
-; X64-X87-NEXT: xorl %eax, %eax
; X64-X87-NEXT: fxch %st(1)
; X64-X87-NEXT: fucompi %st(2), %st
; X64-X87-NEXT: fcmovnbe %st(1), %st
; X64-X87-NEXT: fstp %st(1)
; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %ecx
-; X64-X87-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F
-; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
+; X64-X87-NEXT: xorl %eax, %eax
+; X64-X87-NEXT: orl $3072, %ecx # imm = 0xC00
; X64-X87-NEXT: movw %cx, -{{[0-9]+}}(%rsp)
+; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fistpll -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: setbe %al
Modified: llvm/trunk/test/CodeGen/X86/inline-asm-fpstack.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm-fpstack.ll?rev=354178&r1=354177&r2=354178&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/inline-asm-fpstack.ll (original)
+++ llvm/trunk/test/CodeGen/X86/inline-asm-fpstack.ll Fri Feb 15 13:59:33 2019
@@ -455,13 +455,13 @@ define void @test_live_st(i32 %a1) {
; CHECK-NEXT: fldcw (%eax)
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: LBB20_2: ## %_Z5tointRKe.exit
-; CHECK-NEXT: fnstcw {{[0-9]+}}(%esp)
-; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: movw $3199, {{[0-9]+}}(%esp) ## imm = 0xC7F
-; CHECK-NEXT: fldcw {{[0-9]+}}(%esp)
+; CHECK-NEXT: fnstcw (%esp)
+; CHECK-NEXT: movzwl (%esp), %eax
+; CHECK-NEXT: orl $3072, %eax ## imm = 0xC00
; CHECK-NEXT: movw %ax, {{[0-9]+}}(%esp)
-; CHECK-NEXT: fistpl {{[0-9]+}}(%esp)
; CHECK-NEXT: fldcw {{[0-9]+}}(%esp)
+; CHECK-NEXT: fistpl {{[0-9]+}}(%esp)
+; CHECK-NEXT: fldcw (%esp)
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl %eax, {{[0-9]+}}(%esp)
; CHECK-NEXT: fildl {{[0-9]+}}(%esp)
Modified: llvm/trunk/test/CodeGen/X86/pr34080-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr34080-2.ll?rev=354178&r1=354177&r2=354178&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr34080-2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr34080-2.ll Fri Feb 15 13:59:33 2019
@@ -12,7 +12,7 @@ define void @computeJD(%struct.DateTime*
; CHECK-NEXT: pushl %edi
; CHECK-NEXT: pushl %esi
; CHECK-NEXT: andl $-8, %esp
-; CHECK-NEXT: subl $32, %esp
+; CHECK-NEXT: subl $40, %esp
; CHECK-NEXT: movl 8(%ebp), %ebx
; CHECK-NEXT: movl 8(%ebx), %esi
; CHECK-NEXT: xorl %eax, %eax
@@ -52,9 +52,9 @@ define void @computeJD(%struct.DateTime*
; CHECK-NEXT: fmuls {{\.LCPI.*}}
; CHECK-NEXT: fnstcw {{[0-9]+}}(%esp)
; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F
-; CHECK-NEXT: fldcw {{[0-9]+}}(%esp)
+; CHECK-NEXT: orl $3072, %eax # imm = 0xC00
; CHECK-NEXT: movw %ax, {{[0-9]+}}(%esp)
+; CHECK-NEXT: fldcw {{[0-9]+}}(%esp)
; CHECK-NEXT: fistpll {{[0-9]+}}(%esp)
; CHECK-NEXT: fldcw {{[0-9]+}}(%esp)
; CHECK-NEXT: movb $1, 36(%ebx)
@@ -63,15 +63,15 @@ define void @computeJD(%struct.DateTime*
; CHECK-NEXT: addl %eax, %ecx
; CHECK-NEXT: fldl 28(%ebx)
; CHECK-NEXT: fmuls {{\.LCPI.*}}
-; CHECK-NEXT: fnstcw (%esp)
-; CHECK-NEXT: movzwl (%esp), %eax
-; CHECK-NEXT: movw $3199, (%esp) # imm = 0xC7F
-; CHECK-NEXT: fldcw (%esp)
-; CHECK-NEXT: movw %ax, (%esp)
+; CHECK-NEXT: fnstcw {{[0-9]+}}(%esp)
+; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT: orl $3072, %eax # imm = 0xC00
+; CHECK-NEXT: movw %ax, {{[0-9]+}}(%esp)
; CHECK-NEXT: movl %ecx, %eax
; CHECK-NEXT: sarl $31, %eax
+; CHECK-NEXT: fldcw {{[0-9]+}}(%esp)
; CHECK-NEXT: fistpll {{[0-9]+}}(%esp)
-; CHECK-NEXT: fldcw (%esp)
+; CHECK-NEXT: fldcw {{[0-9]+}}(%esp)
; CHECK-NEXT: addl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: adcl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: addl {{[0-9]+}}(%esp), %ecx
Modified: llvm/trunk/test/CodeGen/X86/pr34080.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr34080.ll?rev=354178&r1=354177&r2=354178&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr34080.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr34080.ll Fri Feb 15 13:59:33 2019
@@ -17,12 +17,12 @@ define void @_Z1fe(x86_fp80 %z) local_un
; SSE2-NEXT: fldt 16(%rbp)
; SSE2-NEXT: fnstcw -4(%rbp)
; SSE2-NEXT: movzwl -4(%rbp), %eax
-; SSE2-NEXT: movw $3199, -4(%rbp) ## imm = 0xC7F
-; SSE2-NEXT: fldcw -4(%rbp)
-; SSE2-NEXT: movw %ax, -4(%rbp)
-; SSE2-NEXT: fistl -8(%rbp)
+; SSE2-NEXT: orl $3072, %eax ## imm = 0xC00
+; SSE2-NEXT: movw %ax, -8(%rbp)
+; SSE2-NEXT: fldcw -8(%rbp)
+; SSE2-NEXT: fistl -12(%rbp)
; SSE2-NEXT: fldcw -4(%rbp)
-; SSE2-NEXT: cvtsi2sdl -8(%rbp), %xmm0
+; SSE2-NEXT: cvtsi2sdl -12(%rbp), %xmm0
; SSE2-NEXT: movsd %xmm0, -64(%rbp)
; SSE2-NEXT: movsd %xmm0, -32(%rbp)
; SSE2-NEXT: fsubl -32(%rbp)
@@ -30,14 +30,14 @@ define void @_Z1fe(x86_fp80 %z) local_un
; SSE2-NEXT: fmul %st, %st(1)
; SSE2-NEXT: fnstcw -2(%rbp)
; SSE2-NEXT: movzwl -2(%rbp), %eax
-; SSE2-NEXT: movw $3199, -2(%rbp) ## imm = 0xC7F
-; SSE2-NEXT: fldcw -2(%rbp)
-; SSE2-NEXT: movw %ax, -2(%rbp)
+; SSE2-NEXT: orl $3072, %eax ## imm = 0xC00
+; SSE2-NEXT: movw %ax, -6(%rbp)
+; SSE2-NEXT: fldcw -6(%rbp)
; SSE2-NEXT: fxch %st(1)
-; SSE2-NEXT: fistl -12(%rbp)
+; SSE2-NEXT: fistl -16(%rbp)
; SSE2-NEXT: fldcw -2(%rbp)
; SSE2-NEXT: xorps %xmm0, %xmm0
-; SSE2-NEXT: cvtsi2sdl -12(%rbp), %xmm0
+; SSE2-NEXT: cvtsi2sdl -16(%rbp), %xmm0
; SSE2-NEXT: movsd %xmm0, -56(%rbp)
; SSE2-NEXT: movsd %xmm0, -24(%rbp)
; SSE2-NEXT: fsubl -24(%rbp)
@@ -53,30 +53,30 @@ define void @_Z1fe(x86_fp80 %z) local_un
; SSE2-SCHEDULE-NEXT: .cfi_offset %rbp, -16
; SSE2-SCHEDULE-NEXT: movq %rsp, %rbp
; SSE2-SCHEDULE-NEXT: .cfi_def_cfa_register %rbp
-; SSE2-SCHEDULE-NEXT: fnstcw -4(%rbp)
; SSE2-SCHEDULE-NEXT: fldt 16(%rbp)
+; SSE2-SCHEDULE-NEXT: fnstcw -4(%rbp)
; SSE2-SCHEDULE-NEXT: movzwl -4(%rbp), %eax
-; SSE2-SCHEDULE-NEXT: movw $3199, -4(%rbp) ## imm = 0xC7F
-; SSE2-SCHEDULE-NEXT: fldcw -4(%rbp)
-; SSE2-SCHEDULE-NEXT: movw %ax, -4(%rbp)
-; SSE2-SCHEDULE-NEXT: fistl -8(%rbp)
+; SSE2-SCHEDULE-NEXT: orl $3072, %eax ## imm = 0xC00
+; SSE2-SCHEDULE-NEXT: movw %ax, -8(%rbp)
+; SSE2-SCHEDULE-NEXT: fldcw -8(%rbp)
+; SSE2-SCHEDULE-NEXT: fistl -12(%rbp)
; SSE2-SCHEDULE-NEXT: fldcw -4(%rbp)
-; SSE2-SCHEDULE-NEXT: cvtsi2sdl -8(%rbp), %xmm0
+; SSE2-SCHEDULE-NEXT: cvtsi2sdl -12(%rbp), %xmm0
; SSE2-SCHEDULE-NEXT: movsd %xmm0, -64(%rbp)
; SSE2-SCHEDULE-NEXT: movsd %xmm0, -32(%rbp)
; SSE2-SCHEDULE-NEXT: fsubl -32(%rbp)
; SSE2-SCHEDULE-NEXT: flds {{.*}}(%rip)
-; SSE2-SCHEDULE-NEXT: fnstcw -2(%rbp)
; SSE2-SCHEDULE-NEXT: fmul %st, %st(1)
+; SSE2-SCHEDULE-NEXT: fnstcw -2(%rbp)
; SSE2-SCHEDULE-NEXT: movzwl -2(%rbp), %eax
-; SSE2-SCHEDULE-NEXT: movw $3199, -2(%rbp) ## imm = 0xC7F
-; SSE2-SCHEDULE-NEXT: fldcw -2(%rbp)
-; SSE2-SCHEDULE-NEXT: movw %ax, -2(%rbp)
+; SSE2-SCHEDULE-NEXT: orl $3072, %eax ## imm = 0xC00
+; SSE2-SCHEDULE-NEXT: movw %ax, -6(%rbp)
+; SSE2-SCHEDULE-NEXT: fldcw -6(%rbp)
; SSE2-SCHEDULE-NEXT: fxch %st(1)
-; SSE2-SCHEDULE-NEXT: fistl -12(%rbp)
+; SSE2-SCHEDULE-NEXT: fistl -16(%rbp)
; SSE2-SCHEDULE-NEXT: fldcw -2(%rbp)
; SSE2-SCHEDULE-NEXT: xorps %xmm0, %xmm0
-; SSE2-SCHEDULE-NEXT: cvtsi2sdl -12(%rbp), %xmm0
+; SSE2-SCHEDULE-NEXT: cvtsi2sdl -16(%rbp), %xmm0
; SSE2-SCHEDULE-NEXT: movsd %xmm0, -56(%rbp)
; SSE2-SCHEDULE-NEXT: movsd %xmm0, -24(%rbp)
; SSE2-SCHEDULE-NEXT: fsubl -24(%rbp)
Modified: llvm/trunk/test/CodeGen/X86/pr40529.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr40529.ll?rev=354178&r1=354177&r2=354178&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr40529.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr40529.ll Fri Feb 15 13:59:33 2019
@@ -4,24 +4,24 @@
define x86_fp80 @rem_pio2l_min(x86_fp80 %z) {
; CHECK-LABEL: rem_pio2l_min:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; CHECK-NEXT: fldt {{[0-9]+}}(%rsp)
+; CHECK-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
-; CHECK-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F
-; CHECK-NEXT: fldcw -{{[0-9]+}}(%rsp)
+; CHECK-NEXT: orl $3072, %eax # imm = 0xC00
; CHECK-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
+; CHECK-NEXT: fldcw -{{[0-9]+}}(%rsp)
; CHECK-NEXT: fistl -{{[0-9]+}}(%rsp)
; CHECK-NEXT: fldcw -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movl -{{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movl %eax, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: fisubl -{{[0-9]+}}(%rsp)
; CHECK-NEXT: flds {{.*}}(%rip)
-; CHECK-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; CHECK-NEXT: fmul %st, %st(1)
+; CHECK-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
-; CHECK-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F
-; CHECK-NEXT: fldcw -{{[0-9]+}}(%rsp)
+; CHECK-NEXT: orl $3072, %eax # imm = 0xC00
; CHECK-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
+; CHECK-NEXT: fldcw -{{[0-9]+}}(%rsp)
; CHECK-NEXT: fxch %st(1)
; CHECK-NEXT: fistl -{{[0-9]+}}(%rsp)
; CHECK-NEXT: fldcw -{{[0-9]+}}(%rsp)
Modified: llvm/trunk/test/CodeGen/X86/scalar-fp-to-i64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/scalar-fp-to-i64.ll?rev=354178&r1=354177&r2=354178&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/scalar-fp-to-i64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/scalar-fp-to-i64.ll Fri Feb 15 13:59:33 2019
@@ -198,23 +198,24 @@ define i64 @f_to_u64(float %a) nounwind
; SSE2_32_WIN-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; SSE2_32_WIN-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; SSE2_32_WIN-NEXT: movaps %xmm0, %xmm2
-; SSE2_32_WIN-NEXT: cmpltss %xmm1, %xmm2
-; SSE2_32_WIN-NEXT: movaps %xmm2, %xmm3
-; SSE2_32_WIN-NEXT: andps %xmm0, %xmm2
-; SSE2_32_WIN-NEXT: xorl %edx, %edx
-; SSE2_32_WIN-NEXT: ucomiss %xmm0, %xmm1
-; SSE2_32_WIN-NEXT: subss %xmm1, %xmm0
-; SSE2_32_WIN-NEXT: andnps %xmm0, %xmm3
-; SSE2_32_WIN-NEXT: orps %xmm3, %xmm2
-; SSE2_32_WIN-NEXT: movss %xmm2, {{[0-9]+}}(%esp)
+; SSE2_32_WIN-NEXT: subss %xmm1, %xmm2
+; SSE2_32_WIN-NEXT: movaps %xmm0, %xmm3
+; SSE2_32_WIN-NEXT: cmpltss %xmm1, %xmm3
+; SSE2_32_WIN-NEXT: movaps %xmm3, %xmm4
+; SSE2_32_WIN-NEXT: andnps %xmm2, %xmm4
+; SSE2_32_WIN-NEXT: andps %xmm0, %xmm3
+; SSE2_32_WIN-NEXT: orps %xmm4, %xmm3
+; SSE2_32_WIN-NEXT: movss %xmm3, {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: flds {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; SSE2_32_WIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F
-; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
+; SSE2_32_WIN-NEXT: orl $3072, %eax # imm = 0xC00
; SSE2_32_WIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
+; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fistpll {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
+; SSE2_32_WIN-NEXT: xorl %edx, %edx
+; SSE2_32_WIN-NEXT: ucomiss %xmm0, %xmm1
; SSE2_32_WIN-NEXT: setbe %dl
; SSE2_32_WIN-NEXT: shll $31, %edx
; SSE2_32_WIN-NEXT: xorl {{[0-9]+}}(%esp), %edx
@@ -229,23 +230,24 @@ define i64 @f_to_u64(float %a) nounwind
; SSE2_32_LIN-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; SSE2_32_LIN-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; SSE2_32_LIN-NEXT: movaps %xmm0, %xmm2
-; SSE2_32_LIN-NEXT: cmpltss %xmm1, %xmm2
-; SSE2_32_LIN-NEXT: movaps %xmm2, %xmm3
-; SSE2_32_LIN-NEXT: andps %xmm0, %xmm2
-; SSE2_32_LIN-NEXT: xorl %edx, %edx
-; SSE2_32_LIN-NEXT: ucomiss %xmm0, %xmm1
-; SSE2_32_LIN-NEXT: subss %xmm1, %xmm0
-; SSE2_32_LIN-NEXT: andnps %xmm0, %xmm3
-; SSE2_32_LIN-NEXT: orps %xmm3, %xmm2
-; SSE2_32_LIN-NEXT: movss %xmm2, {{[0-9]+}}(%esp)
+; SSE2_32_LIN-NEXT: subss %xmm1, %xmm2
+; SSE2_32_LIN-NEXT: movaps %xmm0, %xmm3
+; SSE2_32_LIN-NEXT: cmpltss %xmm1, %xmm3
+; SSE2_32_LIN-NEXT: movaps %xmm3, %xmm4
+; SSE2_32_LIN-NEXT: andnps %xmm2, %xmm4
+; SSE2_32_LIN-NEXT: andps %xmm0, %xmm3
+; SSE2_32_LIN-NEXT: orps %xmm4, %xmm3
+; SSE2_32_LIN-NEXT: movss %xmm3, {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: flds {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; SSE2_32_LIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F
-; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
+; SSE2_32_LIN-NEXT: orl $3072, %eax # imm = 0xC00
; SSE2_32_LIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
+; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fistpll {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
+; SSE2_32_LIN-NEXT: xorl %edx, %edx
+; SSE2_32_LIN-NEXT: ucomiss %xmm0, %xmm1
; SSE2_32_LIN-NEXT: setbe %dl
; SSE2_32_LIN-NEXT: shll $31, %edx
; SSE2_32_LIN-NEXT: xorl {{[0-9]+}}(%esp), %edx
@@ -289,13 +291,13 @@ define i64 @f_to_u64(float %a) nounwind
; X87_WIN-NEXT: fstp %st(0)
; X87_WIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; X87_WIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X87_WIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F
-; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
+; X87_WIN-NEXT: xorl %edx, %edx
+; X87_WIN-NEXT: orl $3072, %eax # imm = 0xC00
; X87_WIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
+; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_WIN-NEXT: fistpll {{[0-9]+}}(%esp)
; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
-; X87_WIN-NEXT: setbe %al
-; X87_WIN-NEXT: movzbl %al, %edx
+; X87_WIN-NEXT: setbe %dl
; X87_WIN-NEXT: shll $31, %edx
; X87_WIN-NEXT: xorl {{[0-9]+}}(%esp), %edx
; X87_WIN-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -323,13 +325,13 @@ define i64 @f_to_u64(float %a) nounwind
; X87_LIN-NEXT: fstp %st(0)
; X87_LIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; X87_LIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X87_LIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F
-; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
+; X87_LIN-NEXT: xorl %edx, %edx
+; X87_LIN-NEXT: orl $3072, %eax # imm = 0xC00
; X87_LIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
+; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_LIN-NEXT: fistpll {{[0-9]+}}(%esp)
; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
-; X87_LIN-NEXT: setbe %al
-; X87_LIN-NEXT: movzbl %al, %edx
+; X87_LIN-NEXT: setbe %dl
; X87_LIN-NEXT: shll $31, %edx
; X87_LIN-NEXT: xorl {{[0-9]+}}(%esp), %edx
; X87_LIN-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -453,9 +455,9 @@ define i64 @f_to_s64(float %a) nounwind
; SSE2_32_WIN-NEXT: flds {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; SSE2_32_WIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F
-; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
+; SSE2_32_WIN-NEXT: orl $3072, %eax # imm = 0xC00
; SSE2_32_WIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
+; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fistpll {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -472,9 +474,9 @@ define i64 @f_to_s64(float %a) nounwind
; SSE2_32_LIN-NEXT: flds {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; SSE2_32_LIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F
-; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
+; SSE2_32_LIN-NEXT: orl $3072, %eax # imm = 0xC00
; SSE2_32_LIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
+; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fistpll {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -496,9 +498,9 @@ define i64 @f_to_s64(float %a) nounwind
; X87_WIN-NEXT: flds 8(%ebp)
; X87_WIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; X87_WIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X87_WIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F
-; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
+; X87_WIN-NEXT: orl $3072, %eax # imm = 0xC00
; X87_WIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
+; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_WIN-NEXT: fistpll {{[0-9]+}}(%esp)
; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_WIN-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -513,9 +515,9 @@ define i64 @f_to_s64(float %a) nounwind
; X87_LIN-NEXT: flds {{[0-9]+}}(%esp)
; X87_LIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; X87_LIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X87_LIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F
-; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
+; X87_LIN-NEXT: orl $3072, %eax # imm = 0xC00
; X87_LIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
+; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_LIN-NEXT: fistpll {{[0-9]+}}(%esp)
; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_LIN-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -686,23 +688,24 @@ define i64 @d_to_u64(double %a) nounwind
; SSE2_32_WIN-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; SSE2_32_WIN-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
; SSE2_32_WIN-NEXT: movapd %xmm0, %xmm2
-; SSE2_32_WIN-NEXT: cmpltsd %xmm1, %xmm2
-; SSE2_32_WIN-NEXT: movapd %xmm2, %xmm3
-; SSE2_32_WIN-NEXT: andpd %xmm0, %xmm2
-; SSE2_32_WIN-NEXT: xorl %edx, %edx
-; SSE2_32_WIN-NEXT: ucomisd %xmm0, %xmm1
-; SSE2_32_WIN-NEXT: subsd %xmm1, %xmm0
-; SSE2_32_WIN-NEXT: andnpd %xmm0, %xmm3
-; SSE2_32_WIN-NEXT: orpd %xmm3, %xmm2
-; SSE2_32_WIN-NEXT: movsd %xmm2, {{[0-9]+}}(%esp)
+; SSE2_32_WIN-NEXT: subsd %xmm1, %xmm2
+; SSE2_32_WIN-NEXT: movapd %xmm0, %xmm3
+; SSE2_32_WIN-NEXT: cmpltsd %xmm1, %xmm3
+; SSE2_32_WIN-NEXT: movapd %xmm3, %xmm4
+; SSE2_32_WIN-NEXT: andnpd %xmm2, %xmm4
+; SSE2_32_WIN-NEXT: andpd %xmm0, %xmm3
+; SSE2_32_WIN-NEXT: orpd %xmm4, %xmm3
+; SSE2_32_WIN-NEXT: movsd %xmm3, {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fldl {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; SSE2_32_WIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F
-; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
+; SSE2_32_WIN-NEXT: orl $3072, %eax # imm = 0xC00
; SSE2_32_WIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
+; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fistpll {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
+; SSE2_32_WIN-NEXT: xorl %edx, %edx
+; SSE2_32_WIN-NEXT: ucomisd %xmm0, %xmm1
; SSE2_32_WIN-NEXT: setbe %dl
; SSE2_32_WIN-NEXT: shll $31, %edx
; SSE2_32_WIN-NEXT: xorl {{[0-9]+}}(%esp), %edx
@@ -717,23 +720,24 @@ define i64 @d_to_u64(double %a) nounwind
; SSE2_32_LIN-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; SSE2_32_LIN-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
; SSE2_32_LIN-NEXT: movapd %xmm0, %xmm2
-; SSE2_32_LIN-NEXT: cmpltsd %xmm1, %xmm2
-; SSE2_32_LIN-NEXT: movapd %xmm2, %xmm3
-; SSE2_32_LIN-NEXT: andpd %xmm0, %xmm2
-; SSE2_32_LIN-NEXT: xorl %edx, %edx
-; SSE2_32_LIN-NEXT: ucomisd %xmm0, %xmm1
-; SSE2_32_LIN-NEXT: subsd %xmm1, %xmm0
-; SSE2_32_LIN-NEXT: andnpd %xmm0, %xmm3
-; SSE2_32_LIN-NEXT: orpd %xmm3, %xmm2
-; SSE2_32_LIN-NEXT: movsd %xmm2, {{[0-9]+}}(%esp)
+; SSE2_32_LIN-NEXT: subsd %xmm1, %xmm2
+; SSE2_32_LIN-NEXT: movapd %xmm0, %xmm3
+; SSE2_32_LIN-NEXT: cmpltsd %xmm1, %xmm3
+; SSE2_32_LIN-NEXT: movapd %xmm3, %xmm4
+; SSE2_32_LIN-NEXT: andnpd %xmm2, %xmm4
+; SSE2_32_LIN-NEXT: andpd %xmm0, %xmm3
+; SSE2_32_LIN-NEXT: orpd %xmm4, %xmm3
+; SSE2_32_LIN-NEXT: movsd %xmm3, {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fldl {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; SSE2_32_LIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F
-; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
+; SSE2_32_LIN-NEXT: orl $3072, %eax # imm = 0xC00
; SSE2_32_LIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
+; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fistpll {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
+; SSE2_32_LIN-NEXT: xorl %edx, %edx
+; SSE2_32_LIN-NEXT: ucomisd %xmm0, %xmm1
; SSE2_32_LIN-NEXT: setbe %dl
; SSE2_32_LIN-NEXT: shll $31, %edx
; SSE2_32_LIN-NEXT: xorl {{[0-9]+}}(%esp), %edx
@@ -777,13 +781,13 @@ define i64 @d_to_u64(double %a) nounwind
; X87_WIN-NEXT: fstp %st(0)
; X87_WIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; X87_WIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X87_WIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F
-; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
+; X87_WIN-NEXT: xorl %edx, %edx
+; X87_WIN-NEXT: orl $3072, %eax # imm = 0xC00
; X87_WIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
+; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_WIN-NEXT: fistpll {{[0-9]+}}(%esp)
; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
-; X87_WIN-NEXT: setbe %al
-; X87_WIN-NEXT: movzbl %al, %edx
+; X87_WIN-NEXT: setbe %dl
; X87_WIN-NEXT: shll $31, %edx
; X87_WIN-NEXT: xorl {{[0-9]+}}(%esp), %edx
; X87_WIN-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -811,13 +815,13 @@ define i64 @d_to_u64(double %a) nounwind
; X87_LIN-NEXT: fstp %st(0)
; X87_LIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; X87_LIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X87_LIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F
-; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
+; X87_LIN-NEXT: xorl %edx, %edx
+; X87_LIN-NEXT: orl $3072, %eax # imm = 0xC00
; X87_LIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
+; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_LIN-NEXT: fistpll {{[0-9]+}}(%esp)
; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
-; X87_LIN-NEXT: setbe %al
-; X87_LIN-NEXT: movzbl %al, %edx
+; X87_LIN-NEXT: setbe %dl
; X87_LIN-NEXT: shll $31, %edx
; X87_LIN-NEXT: xorl {{[0-9]+}}(%esp), %edx
; X87_LIN-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -941,9 +945,9 @@ define i64 @d_to_s64(double %a) nounwind
; SSE2_32_WIN-NEXT: fldl {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; SSE2_32_WIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F
-; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
+; SSE2_32_WIN-NEXT: orl $3072, %eax # imm = 0xC00
; SSE2_32_WIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
+; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fistpll {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -960,9 +964,9 @@ define i64 @d_to_s64(double %a) nounwind
; SSE2_32_LIN-NEXT: fldl {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; SSE2_32_LIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F
-; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
+; SSE2_32_LIN-NEXT: orl $3072, %eax # imm = 0xC00
; SSE2_32_LIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
+; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fistpll {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -984,9 +988,9 @@ define i64 @d_to_s64(double %a) nounwind
; X87_WIN-NEXT: fldl 8(%ebp)
; X87_WIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; X87_WIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X87_WIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F
-; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
+; X87_WIN-NEXT: orl $3072, %eax # imm = 0xC00
; X87_WIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
+; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_WIN-NEXT: fistpll {{[0-9]+}}(%esp)
; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_WIN-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -1001,9 +1005,9 @@ define i64 @d_to_s64(double %a) nounwind
; X87_LIN-NEXT: fldl {{[0-9]+}}(%esp)
; X87_LIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; X87_LIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X87_LIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F
-; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
+; X87_LIN-NEXT: orl $3072, %eax # imm = 0xC00
; X87_LIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
+; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_LIN-NEXT: fistpll {{[0-9]+}}(%esp)
; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_LIN-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -1185,16 +1189,16 @@ define i64 @x_to_u64(x86_fp80 %a) nounwi
; SSE2_32_WIN-NEXT: flds __real at 5f000000
; SSE2_32_WIN-NEXT: fld %st(1)
; SSE2_32_WIN-NEXT: fsub %st(1), %st
-; SSE2_32_WIN-NEXT: xorl %edx, %edx
; SSE2_32_WIN-NEXT: fxch %st(1)
; SSE2_32_WIN-NEXT: fucompi %st(2), %st
; SSE2_32_WIN-NEXT: fcmovnbe %st(1), %st
; SSE2_32_WIN-NEXT: fstp %st(1)
; SSE2_32_WIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; SSE2_32_WIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F
-; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
+; SSE2_32_WIN-NEXT: xorl %edx, %edx
+; SSE2_32_WIN-NEXT: orl $3072, %eax # imm = 0xC00
; SSE2_32_WIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
+; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fistpll {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: setbe %dl
@@ -1212,16 +1216,16 @@ define i64 @x_to_u64(x86_fp80 %a) nounwi
; SSE2_32_LIN-NEXT: flds {{\.LCPI.*}}
; SSE2_32_LIN-NEXT: fld %st(1)
; SSE2_32_LIN-NEXT: fsub %st(1), %st
-; SSE2_32_LIN-NEXT: xorl %edx, %edx
; SSE2_32_LIN-NEXT: fxch %st(1)
; SSE2_32_LIN-NEXT: fucompi %st(2), %st
; SSE2_32_LIN-NEXT: fcmovnbe %st(1), %st
; SSE2_32_LIN-NEXT: fstp %st(1)
; SSE2_32_LIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; SSE2_32_LIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F
-; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
+; SSE2_32_LIN-NEXT: xorl %edx, %edx
+; SSE2_32_LIN-NEXT: orl $3072, %eax # imm = 0xC00
; SSE2_32_LIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
+; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fistpll {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: setbe %dl
@@ -1238,16 +1242,16 @@ define i64 @x_to_u64(x86_fp80 %a) nounwi
; SSE2_64_WIN-NEXT: flds __real@{{.*}}(%rip)
; SSE2_64_WIN-NEXT: fld %st(1)
; SSE2_64_WIN-NEXT: fsub %st(1), %st
-; SSE2_64_WIN-NEXT: xorl %eax, %eax
; SSE2_64_WIN-NEXT: fxch %st(1)
; SSE2_64_WIN-NEXT: fucompi %st(2), %st
; SSE2_64_WIN-NEXT: fcmovnbe %st(1), %st
; SSE2_64_WIN-NEXT: fstp %st(1)
; SSE2_64_WIN-NEXT: fnstcw {{[0-9]+}}(%rsp)
; SSE2_64_WIN-NEXT: movzwl {{[0-9]+}}(%rsp), %ecx
-; SSE2_64_WIN-NEXT: movw $3199, {{[0-9]+}}(%rsp) # imm = 0xC7F
-; SSE2_64_WIN-NEXT: fldcw {{[0-9]+}}(%rsp)
+; SSE2_64_WIN-NEXT: xorl %eax, %eax
+; SSE2_64_WIN-NEXT: orl $3072, %ecx # imm = 0xC00
; SSE2_64_WIN-NEXT: movw %cx, {{[0-9]+}}(%rsp)
+; SSE2_64_WIN-NEXT: fldcw {{[0-9]+}}(%rsp)
; SSE2_64_WIN-NEXT: fistpll {{[0-9]+}}(%rsp)
; SSE2_64_WIN-NEXT: fldcw {{[0-9]+}}(%rsp)
; SSE2_64_WIN-NEXT: setbe %al
@@ -1262,16 +1266,16 @@ define i64 @x_to_u64(x86_fp80 %a) nounwi
; SSE2_64_LIN-NEXT: flds {{.*}}(%rip)
; SSE2_64_LIN-NEXT: fld %st(1)
; SSE2_64_LIN-NEXT: fsub %st(1), %st
-; SSE2_64_LIN-NEXT: xorl %eax, %eax
; SSE2_64_LIN-NEXT: fxch %st(1)
; SSE2_64_LIN-NEXT: fucompi %st(2), %st
; SSE2_64_LIN-NEXT: fcmovnbe %st(1), %st
; SSE2_64_LIN-NEXT: fstp %st(1)
; SSE2_64_LIN-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; SSE2_64_LIN-NEXT: movzwl -{{[0-9]+}}(%rsp), %ecx
-; SSE2_64_LIN-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F
-; SSE2_64_LIN-NEXT: fldcw -{{[0-9]+}}(%rsp)
+; SSE2_64_LIN-NEXT: xorl %eax, %eax
+; SSE2_64_LIN-NEXT: orl $3072, %ecx # imm = 0xC00
; SSE2_64_LIN-NEXT: movw %cx, -{{[0-9]+}}(%rsp)
+; SSE2_64_LIN-NEXT: fldcw -{{[0-9]+}}(%rsp)
; SSE2_64_LIN-NEXT: fistpll -{{[0-9]+}}(%rsp)
; SSE2_64_LIN-NEXT: fldcw -{{[0-9]+}}(%rsp)
; SSE2_64_LIN-NEXT: setbe %al
@@ -1302,13 +1306,13 @@ define i64 @x_to_u64(x86_fp80 %a) nounwi
; X87_WIN-NEXT: fstp %st(0)
; X87_WIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; X87_WIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X87_WIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F
-; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
+; X87_WIN-NEXT: xorl %edx, %edx
+; X87_WIN-NEXT: orl $3072, %eax # imm = 0xC00
; X87_WIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
+; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_WIN-NEXT: fistpll {{[0-9]+}}(%esp)
; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
-; X87_WIN-NEXT: setbe %al
-; X87_WIN-NEXT: movzbl %al, %edx
+; X87_WIN-NEXT: setbe %dl
; X87_WIN-NEXT: shll $31, %edx
; X87_WIN-NEXT: xorl {{[0-9]+}}(%esp), %edx
; X87_WIN-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -1336,13 +1340,13 @@ define i64 @x_to_u64(x86_fp80 %a) nounwi
; X87_LIN-NEXT: fstp %st(0)
; X87_LIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; X87_LIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X87_LIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F
-; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
+; X87_LIN-NEXT: xorl %edx, %edx
+; X87_LIN-NEXT: orl $3072, %eax # imm = 0xC00
; X87_LIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
+; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_LIN-NEXT: fistpll {{[0-9]+}}(%esp)
; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
-; X87_LIN-NEXT: setbe %al
-; X87_LIN-NEXT: movzbl %al, %edx
+; X87_LIN-NEXT: setbe %dl
; X87_LIN-NEXT: shll $31, %edx
; X87_LIN-NEXT: xorl {{[0-9]+}}(%esp), %edx
; X87_LIN-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -1442,9 +1446,9 @@ define i64 @x_to_s64(x86_fp80 %a) nounwi
; SSE2_32_WIN-NEXT: fldt 8(%ebp)
; SSE2_32_WIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; SSE2_32_WIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F
-; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
+; SSE2_32_WIN-NEXT: orl $3072, %eax # imm = 0xC00
; SSE2_32_WIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
+; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fistpll {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -1459,9 +1463,9 @@ define i64 @x_to_s64(x86_fp80 %a) nounwi
; SSE2_32_LIN-NEXT: fldt {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; SSE2_32_LIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F
-; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
+; SSE2_32_LIN-NEXT: orl $3072, %eax # imm = 0xC00
; SSE2_32_LIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
+; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fistpll {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -1475,9 +1479,9 @@ define i64 @x_to_s64(x86_fp80 %a) nounwi
; SSE2_64_WIN-NEXT: fldt (%rcx)
; SSE2_64_WIN-NEXT: fnstcw {{[0-9]+}}(%rsp)
; SSE2_64_WIN-NEXT: movzwl {{[0-9]+}}(%rsp), %eax
-; SSE2_64_WIN-NEXT: movw $3199, {{[0-9]+}}(%rsp) # imm = 0xC7F
-; SSE2_64_WIN-NEXT: fldcw {{[0-9]+}}(%rsp)
+; SSE2_64_WIN-NEXT: orl $3072, %eax # imm = 0xC00
; SSE2_64_WIN-NEXT: movw %ax, {{[0-9]+}}(%rsp)
+; SSE2_64_WIN-NEXT: fldcw {{[0-9]+}}(%rsp)
; SSE2_64_WIN-NEXT: fistpll {{[0-9]+}}(%rsp)
; SSE2_64_WIN-NEXT: fldcw {{[0-9]+}}(%rsp)
; SSE2_64_WIN-NEXT: movq {{[0-9]+}}(%rsp), %rax
@@ -1489,9 +1493,9 @@ define i64 @x_to_s64(x86_fp80 %a) nounwi
; SSE2_64_LIN-NEXT: fldt {{[0-9]+}}(%rsp)
; SSE2_64_LIN-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; SSE2_64_LIN-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
-; SSE2_64_LIN-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F
-; SSE2_64_LIN-NEXT: fldcw -{{[0-9]+}}(%rsp)
+; SSE2_64_LIN-NEXT: orl $3072, %eax # imm = 0xC00
; SSE2_64_LIN-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
+; SSE2_64_LIN-NEXT: fldcw -{{[0-9]+}}(%rsp)
; SSE2_64_LIN-NEXT: fistpll -{{[0-9]+}}(%rsp)
; SSE2_64_LIN-NEXT: fldcw -{{[0-9]+}}(%rsp)
; SSE2_64_LIN-NEXT: movq -{{[0-9]+}}(%rsp), %rax
@@ -1506,9 +1510,9 @@ define i64 @x_to_s64(x86_fp80 %a) nounwi
; X87_WIN-NEXT: fldt 8(%ebp)
; X87_WIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; X87_WIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X87_WIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F
-; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
+; X87_WIN-NEXT: orl $3072, %eax # imm = 0xC00
; X87_WIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
+; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_WIN-NEXT: fistpll {{[0-9]+}}(%esp)
; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_WIN-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -1523,9 +1527,9 @@ define i64 @x_to_s64(x86_fp80 %a) nounwi
; X87_LIN-NEXT: fldt {{[0-9]+}}(%esp)
; X87_LIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; X87_LIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X87_LIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F
-; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
+; X87_LIN-NEXT: orl $3072, %eax # imm = 0xC00
; X87_LIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
+; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_LIN-NEXT: fistpll {{[0-9]+}}(%esp)
; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_LIN-NEXT: movl {{[0-9]+}}(%esp), %eax
Modified: llvm/trunk/test/CodeGen/X86/trunc-to-bool.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/trunc-to-bool.ll?rev=354178&r1=354177&r2=354178&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/trunc-to-bool.ll (original)
+++ llvm/trunk/test/CodeGen/X86/trunc-to-bool.ll Fri Feb 15 13:59:33 2019
@@ -81,24 +81,24 @@ cond_false:
define i32 @test5(double %d) nounwind {
; CHECK-LABEL: test5:
; CHECK: # %bb.0:
-; CHECK-NEXT: pushl %eax
+; CHECK-NEXT: subl $8, %esp
; CHECK-NEXT: fldl {{[0-9]+}}(%esp)
-; CHECK-NEXT: fnstcw (%esp)
-; CHECK-NEXT: movzwl (%esp), %eax
-; CHECK-NEXT: movw $3199, (%esp) # imm = 0xC7F
-; CHECK-NEXT: fldcw (%esp)
-; CHECK-NEXT: movw %ax, (%esp)
+; CHECK-NEXT: fnstcw {{[0-9]+}}(%esp)
+; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT: orl $3072, %eax # imm = 0xC00
+; CHECK-NEXT: movw %ax, {{[0-9]+}}(%esp)
+; CHECK-NEXT: fldcw {{[0-9]+}}(%esp)
; CHECK-NEXT: fistps {{[0-9]+}}(%esp)
-; CHECK-NEXT: fldcw (%esp)
+; CHECK-NEXT: fldcw {{[0-9]+}}(%esp)
; CHECK-NEXT: testb $1, {{[0-9]+}}(%esp)
; CHECK-NEXT: je .LBB4_2
; CHECK-NEXT: # %bb.1: # %cond_true
; CHECK-NEXT: movl $21, %eax
-; CHECK-NEXT: popl %ecx
+; CHECK-NEXT: addl $8, %esp
; CHECK-NEXT: retl
; CHECK-NEXT: .LBB4_2: # %cond_false
; CHECK-NEXT: movl $42, %eax
-; CHECK-NEXT: popl %ecx
+; CHECK-NEXT: addl $8, %esp
; CHECK-NEXT: retl
%tmp = fptosi double %d to i1
br i1 %tmp, label %cond_true, label %cond_false
Modified: llvm/trunk/test/CodeGen/X86/vec_fp_to_int-widen.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_fp_to_int-widen.ll?rev=354178&r1=354177&r2=354178&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_fp_to_int-widen.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_fp_to_int-widen.ll Fri Feb 15 13:59:33 2019
@@ -2224,16 +2224,16 @@ define <4 x i32> @fptosi_2f80_to_4i32(<2
; SSE-NEXT: fldt {{[0-9]+}}(%rsp)
; SSE-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; SSE-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
-; SSE-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F
-; SSE-NEXT: fldcw -{{[0-9]+}}(%rsp)
+; SSE-NEXT: orl $3072, %eax # imm = 0xC00
; SSE-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
+; SSE-NEXT: fldcw -{{[0-9]+}}(%rsp)
; SSE-NEXT: fistpl -{{[0-9]+}}(%rsp)
; SSE-NEXT: fldcw -{{[0-9]+}}(%rsp)
; SSE-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; SSE-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
-; SSE-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F
-; SSE-NEXT: fldcw -{{[0-9]+}}(%rsp)
+; SSE-NEXT: orl $3072, %eax # imm = 0xC00
; SSE-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
+; SSE-NEXT: fldcw -{{[0-9]+}}(%rsp)
; SSE-NEXT: fistpl -{{[0-9]+}}(%rsp)
; SSE-NEXT: fldcw -{{[0-9]+}}(%rsp)
; SSE-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
Modified: llvm/trunk/test/CodeGen/X86/vec_fp_to_int.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_fp_to_int.ll?rev=354178&r1=354177&r2=354178&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_fp_to_int.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_fp_to_int.ll Fri Feb 15 13:59:33 2019
@@ -2294,16 +2294,16 @@ define <4 x i32> @fptosi_2f80_to_4i32(<2
; SSE-NEXT: fldt {{[0-9]+}}(%rsp)
; SSE-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; SSE-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
-; SSE-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F
-; SSE-NEXT: fldcw -{{[0-9]+}}(%rsp)
+; SSE-NEXT: orl $3072, %eax # imm = 0xC00
; SSE-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
+; SSE-NEXT: fldcw -{{[0-9]+}}(%rsp)
; SSE-NEXT: fistpll -{{[0-9]+}}(%rsp)
; SSE-NEXT: fldcw -{{[0-9]+}}(%rsp)
; SSE-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; SSE-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
-; SSE-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F
-; SSE-NEXT: fldcw -{{[0-9]+}}(%rsp)
+; SSE-NEXT: orl $3072, %eax # imm = 0xC00
; SSE-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
+; SSE-NEXT: fldcw -{{[0-9]+}}(%rsp)
; SSE-NEXT: fistpll -{{[0-9]+}}(%rsp)
; SSE-NEXT: fldcw -{{[0-9]+}}(%rsp)
; SSE-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
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