[PATCH] D58237: [X86][AVX] lowerShuffleAsLanePermuteAndPermute - fully populate the lane shuffle mask (PR40730)

Simon Pilgrim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Feb 14 07:52:02 PST 2019


RKSimon created this revision.
RKSimon added reviewers: craig.topper, spatel, andreadb.
Herald added a project: LLVM.

As detailed on PR40730, we are not correctly filling in the lane shuffle mask (D53148 <https://reviews.llvm.org/D53148>/rL344446 <https://reviews.llvm.org/rL344446>) - we fill in for the correct src lane but don't add it to the correct mask element, so any reference to the correct element is likely to see an UNDEF mask index.

This allows constant folding to propagate UNDEFs prior to the lane mask being (correctly) lowered to vperm2f128.

This patch fixes the issue by fully populating the lane shuffle mask - this is more than is necessary (if we only filled in the required mask elements we might be able to match other shuffle instructions - broadcasts etc.), but its the most cautious approach as this needs to be cherrypicked into the 8.0.0 release branch.


Repository:
  rL LLVM

https://reviews.llvm.org/D58237

Files:
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/pr40730.ll


Index: test/CodeGen/X86/pr40730.ll
===================================================================
--- test/CodeGen/X86/pr40730.ll
+++ test/CodeGen/X86/pr40730.ll
@@ -19,7 +19,7 @@
 ; CHECK:      .LCPI1_0:
 ; CHECK-NEXT: .quad   60129542157
 ; CHECK-NEXT: .quad   60129542157
-; CHECK-NEXT: .zero   8
+; CHECK-NEXT: .quad   68719476736
 ; CHECK-NEXT: .quad   60129542157
 
 define <8 x i32> @shuffle_v8i32_0dcd3f14_constant(<8 x i32> %a0)  {
Index: lib/Target/X86/X86ISelLowering.cpp
===================================================================
--- lib/Target/X86/X86ISelLowering.cpp
+++ lib/Target/X86/X86ISelLowering.cpp
@@ -14081,7 +14081,6 @@
   int NumEltsPerLane = NumElts / NumLanes;
 
   SmallVector<int, 4> SrcLaneMask(NumLanes, SM_SentinelUndef);
-  SmallVector<int, 16> LaneMask(NumElts, SM_SentinelUndef);
   SmallVector<int, 16> PermMask(NumElts, SM_SentinelUndef);
 
   for (int i = 0; i != NumElts; ++i) {
@@ -14096,10 +14095,20 @@
       return SDValue();
     SrcLaneMask[DstLane] = SrcLane;
 
-    LaneMask[i] = (SrcLane * NumEltsPerLane) + (i % NumEltsPerLane);
     PermMask[i] = (DstLane * NumEltsPerLane) + (M % NumEltsPerLane);
   }
 
+  // Make sure we set all elements of the lane mask, to avoid undef propagation.
+  SmallVector<int, 16> LaneMask(NumElts, SM_SentinelUndef);
+  for (int DstLane = 0; DstLane != NumLanes; ++DstLane) {
+    int SrcLane = SrcLaneMask[DstLane];
+    if (0 <= SrcLane)
+      for (int j = 0; j != NumEltsPerLane; ++j) {
+        LaneMask[(DstLane * NumEltsPerLane) + j] =
+            (SrcLane * NumEltsPerLane) + j;
+      }
+  }
+
   // If we're only shuffling a single lowest lane and the rest are identity
   // then don't bother.
   // TODO - isShuffleMaskInputInPlace could be extended to something like this.


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