[PATCH] D57947: GlobalISel: Add G_FCANONICALIZE instruction

Aditya Nandakumar via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Feb 8 13:52:29 PST 2019


aditya_nandakumar added inline comments.


================
Comment at: test/CodeGen/AMDGPU/GlobalISel/legalize-fcanonicalize.mir:61
+    ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
+    ; SI: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16)
+    ; SI: [[FCANONICALIZE:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[FPEXT]]
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arsenm wrote:
> aditya_nandakumar wrote:
> > It's a bit weird mixing integer truncates with FPExts, but as this is just a test, it probably can't hurt.
> This is correct, the ABI is passing half as the low 16 bits of a 32-bit register
That makes sense. Thanks 


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D57947/new/

https://reviews.llvm.org/D57947





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