[llvm] r353312 - [InstCombine] add tests for PR40611 and regenerate checks; NFC
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 6 08:17:06 PST 2019
Author: spatel
Date: Wed Feb 6 08:17:05 2019
New Revision: 353312
URL: http://llvm.org/viewvc/llvm-project?rev=353312&view=rev
Log:
[InstCombine] add tests for PR40611 and regenerate checks; NFC
Lots of unrelated diffs here from the newer version of the script.
Modified:
llvm/trunk/test/Transforms/InstCombine/icmp.ll
Modified: llvm/trunk/test/Transforms/InstCombine/icmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/icmp.ll?rev=353312&r1=353311&r2=353312&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/icmp.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/icmp.ll Wed Feb 6 08:17:05 2019
@@ -5,7 +5,7 @@ target datalayout = "e-p:64:64:64-p1:16:
define i32 @test1(i32 %X) {
; CHECK-LABEL: @test1(
-; CHECK-NEXT: [[X_LOBIT:%.*]] = lshr i32 %X, 31
+; CHECK-NEXT: [[X_LOBIT:%.*]] = lshr i32 [[X:%.*]], 31
; CHECK-NEXT: ret i32 [[X_LOBIT]]
;
%a = icmp slt i32 %X, 0
@@ -25,7 +25,7 @@ define <2 x i32> @test1vec(<2 x i32> %X)
define i32 @test2(i32 %X) {
; CHECK-LABEL: @test2(
-; CHECK-NEXT: [[X_LOBIT:%.*]] = lshr i32 %X, 31
+; CHECK-NEXT: [[X_LOBIT:%.*]] = lshr i32 [[X:%.*]], 31
; CHECK-NEXT: [[X_LOBIT_NOT:%.*]] = xor i32 [[X_LOBIT]], 1
; CHECK-NEXT: ret i32 [[X_LOBIT_NOT]]
;
@@ -47,7 +47,7 @@ define <2 x i32> @test2vec(<2 x i32> %X)
define i32 @test3(i32 %X) {
; CHECK-LABEL: @test3(
-; CHECK-NEXT: [[X_LOBIT:%.*]] = ashr i32 %X, 31
+; CHECK-NEXT: [[X_LOBIT:%.*]] = ashr i32 [[X:%.*]], 31
; CHECK-NEXT: ret i32 [[X_LOBIT]]
;
%a = icmp slt i32 %X, 0
@@ -57,7 +57,7 @@ define i32 @test3(i32 %X) {
define i32 @test4(i32 %X) {
; CHECK-LABEL: @test4(
-; CHECK-NEXT: [[X_LOBIT:%.*]] = ashr i32 %X, 31
+; CHECK-NEXT: [[X_LOBIT:%.*]] = ashr i32 [[X:%.*]], 31
; CHECK-NEXT: [[X_LOBIT_NOT:%.*]] = xor i32 [[X_LOBIT]], -1
; CHECK-NEXT: ret i32 [[X_LOBIT_NOT]]
;
@@ -77,8 +77,8 @@ define <2 x i1> @test5(<2 x i64> %x) {
define i32 @test6(i32 %a, i32 %b) {
; CHECK-LABEL: @test6(
-; CHECK-NEXT: [[E:%.*]] = ashr i32 %a, 31
-; CHECK-NEXT: [[F:%.*]] = and i32 [[E]], %b
+; CHECK-NEXT: [[E:%.*]] = ashr i32 [[A:%.*]], 31
+; CHECK-NEXT: [[F:%.*]] = and i32 [[E]], [[B:%.*]]
; CHECK-NEXT: ret i32 [[F]]
;
%c = icmp sle i32 %a, -1
@@ -91,7 +91,7 @@ define i32 @test6(i32 %a, i32 %b) {
define i1 @test7(i32 %x) {
; CHECK-LABEL: @test7(
-; CHECK-NEXT: [[B:%.*]] = icmp ne i32 %x, 0
+; CHECK-NEXT: [[B:%.*]] = icmp ne i32 [[X:%.*]], 0
; CHECK-NEXT: ret i1 [[B]]
;
%a = add i32 %x, -1
@@ -129,7 +129,7 @@ define <2 x i1> @test8_vec(<2 x i32> %x)
define i1 @test9(i32 %x) {
; CHECK-LABEL: @test9(
-; CHECK-NEXT: [[B:%.*]] = icmp ugt i32 %x, 1
+; CHECK-NEXT: [[B:%.*]] = icmp ugt i32 [[X:%.*]], 1
; CHECK-NEXT: ret i1 [[B]]
;
%a = add i32 %x, -2
@@ -169,7 +169,7 @@ define <2 x i1> @test9b_vec(<2 x i32> %x
define i1 @test10(i32 %x) {
; CHECK-LABEL: @test10(
-; CHECK-NEXT: [[B:%.*]] = icmp ne i32 %x, -2147483648
+; CHECK-NEXT: [[B:%.*]] = icmp ne i32 [[X:%.*]], -2147483648
; CHECK-NEXT: ret i1 [[B]]
;
%a = add i32 %x, -1
@@ -228,7 +228,7 @@ define <2 x i1> @test11_vec(<2 x i32> %x
; PR6195
define i1 @test12(i1 %A) {
; CHECK-LABEL: @test12(
-; CHECK-NEXT: [[NOT_A:%.*]] = xor i1 %A, true
+; CHECK-NEXT: [[NOT_A:%.*]] = xor i1 [[A:%.*]], true
; CHECK-NEXT: ret i1 [[NOT_A]]
;
%S = select i1 %A, i64 -4294967295, i64 8589934591
@@ -271,7 +271,7 @@ define i1 @test16() {
define i1 @test17(i32 %x) {
; CHECK-LABEL: @test17(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 %x, 3
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[X:%.*]], 3
; CHECK-NEXT: ret i1 [[CMP]]
;
%shl = shl i32 1, %x
@@ -282,7 +282,7 @@ define i1 @test17(i32 %x) {
define <2 x i1> @test17vec(<2 x i32> %x) {
; CHECK-LABEL: @test17vec(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> %x, <i32 3, i32 3>
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[X:%.*]], <i32 3, i32 3>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%shl = shl <2 x i32> <i32 1, i32 1>, %x
@@ -293,7 +293,7 @@ define <2 x i1> @test17vec(<2 x i32> %x)
define i1 @test17a(i32 %x) {
; CHECK-LABEL: @test17a(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 %x, 2
+; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[X:%.*]], 2
; CHECK-NEXT: ret i1 [[CMP]]
;
%shl = shl i32 1, %x
@@ -304,7 +304,7 @@ define i1 @test17a(i32 %x) {
define <2 x i1> @test17a_vec(<2 x i32> %x) {
; CHECK-LABEL: @test17a_vec(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i32> %x, <i32 2, i32 2>
+; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i32> [[X:%.*]], <i32 2, i32 2>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%shl = shl <2 x i32> <i32 1, i32 1>, %x
@@ -315,7 +315,7 @@ define <2 x i1> @test17a_vec(<2 x i32> %
define i1 @test18_eq(i32 %x) {
; CHECK-LABEL: @test18_eq(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 %x, 3
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[X:%.*]], 3
; CHECK-NEXT: ret i1 [[CMP]]
;
%sh = lshr i32 8, %x
@@ -326,7 +326,7 @@ define i1 @test18_eq(i32 %x) {
define <2 x i1> @test18_eq_vec(<2 x i32> %x) {
; CHECK-LABEL: @test18_eq_vec(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> %x, <i32 3, i32 3>
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[X:%.*]], <i32 3, i32 3>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%sh = lshr <2 x i32> <i32 8, i32 8>, %x
@@ -337,7 +337,7 @@ define <2 x i1> @test18_eq_vec(<2 x i32>
define i1 @test18_ne(i32 %x) {
; CHECK-LABEL: @test18_ne(
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %x, 3
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], 3
; CHECK-NEXT: ret i1 [[CMP]]
;
%sh = lshr i32 8, %x
@@ -348,7 +348,7 @@ define i1 @test18_ne(i32 %x) {
define <2 x i1> @test18_ne_vec(<2 x i32> %x) {
; CHECK-LABEL: @test18_ne_vec(
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> %x, <i32 3, i32 3>
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[X:%.*]], <i32 3, i32 3>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%sh = lshr <2 x i32> <i32 8, i32 8>, %x
@@ -359,7 +359,7 @@ define <2 x i1> @test18_ne_vec(<2 x i32>
define i1 @test19(i32 %x) {
; CHECK-LABEL: @test19(
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %x, 3
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], 3
; CHECK-NEXT: ret i1 [[CMP]]
;
%shl = shl i32 1, %x
@@ -370,7 +370,7 @@ define i1 @test19(i32 %x) {
define <2 x i1> @test19vec(<2 x i32> %x) {
; CHECK-LABEL: @test19vec(
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> %x, <i32 3, i32 3>
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[X:%.*]], <i32 3, i32 3>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%shl = shl <2 x i32> <i32 1, i32 1>, %x
@@ -381,7 +381,7 @@ define <2 x i1> @test19vec(<2 x i32> %x)
define <2 x i1> @cmp_and_signbit_vec(<2 x i3> %x) {
; CHECK-LABEL: @cmp_and_signbit_vec(
-; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i3> %x, zeroinitializer
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i3> [[X:%.*]], zeroinitializer
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%and = and <2 x i3> %x, <i3 4, i3 4>
@@ -391,7 +391,7 @@ define <2 x i1> @cmp_and_signbit_vec(<2
define i1 @test20(i32 %x) {
; CHECK-LABEL: @test20(
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %x, 3
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], 3
; CHECK-NEXT: ret i1 [[CMP]]
;
%shl = shl i32 1, %x
@@ -402,7 +402,7 @@ define i1 @test20(i32 %x) {
define <2 x i1> @test20vec(<2 x i32> %x) {
; CHECK-LABEL: @test20vec(
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> %x, <i32 3, i32 3>
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[X:%.*]], <i32 3, i32 3>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%shl = shl <2 x i32> <i32 1, i32 1>, %x
@@ -413,7 +413,7 @@ define <2 x i1> @test20vec(<2 x i32> %x)
define i1 @test20a(i32 %x) {
; CHECK-LABEL: @test20a(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 %x, 3
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[X:%.*]], 3
; CHECK-NEXT: ret i1 [[CMP]]
;
%shl = shl i32 1, %x
@@ -424,7 +424,7 @@ define i1 @test20a(i32 %x) {
define <2 x i1> @test20a_vec(<2 x i32> %x) {
; CHECK-LABEL: @test20a_vec(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> %x, <i32 3, i32 3>
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> [[X:%.*]], <i32 3, i32 3>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%shl = shl <2 x i32> <i32 1, i32 1>, %x
@@ -435,7 +435,7 @@ define <2 x i1> @test20a_vec(<2 x i32> %
define i1 @test21(i8 %x, i8 %y) {
; CHECK-LABEL: @test21(
-; CHECK-NEXT: [[B:%.*]] = icmp ugt i8 %x, 3
+; CHECK-NEXT: [[B:%.*]] = icmp ugt i8 [[X:%.*]], 3
; CHECK-NEXT: ret i1 [[B]]
;
%A = or i8 %x, 1
@@ -445,7 +445,7 @@ define i1 @test21(i8 %x, i8 %y) {
define i1 @test22(i8 %x, i8 %y) {
; CHECK-LABEL: @test22(
-; CHECK-NEXT: [[B:%.*]] = icmp ult i8 %x, 4
+; CHECK-NEXT: [[B:%.*]] = icmp ult i8 [[X:%.*]], 4
; CHECK-NEXT: ret i1 [[B]]
;
%A = or i8 %x, 1
@@ -456,7 +456,7 @@ define i1 @test22(i8 %x, i8 %y) {
; PR2740
define i1 @test23(i32 %x) {
; CHECK-LABEL: @test23(
-; CHECK-NEXT: [[I4:%.*]] = icmp sgt i32 %x, 1328634634
+; CHECK-NEXT: [[I4:%.*]] = icmp sgt i32 [[X:%.*]], 1328634634
; CHECK-NEXT: ret i1 [[I4]]
;
%i3 = sdiv i32 %x, -1328634635
@@ -466,7 +466,7 @@ define i1 @test23(i32 %x) {
define <2 x i1> @test23vec(<2 x i32> %x) {
; CHECK-LABEL: @test23vec(
-; CHECK-NEXT: [[I4:%.*]] = icmp sgt <2 x i32> %x, <i32 1328634634, i32 1328634634>
+; CHECK-NEXT: [[I4:%.*]] = icmp sgt <2 x i32> [[X:%.*]], <i32 1328634634, i32 1328634634>
; CHECK-NEXT: ret <2 x i1> [[I4]]
;
%i3 = sdiv <2 x i32> %x, <i32 -1328634635, i32 -1328634635>
@@ -479,7 +479,7 @@ define <2 x i1> @test23vec(<2 x i32> %x)
; PR8882
define i1 @test24(i64 %i) {
; CHECK-LABEL: @test24(
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 %i, 1000
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[I:%.*]], 1000
; CHECK-NEXT: ret i1 [[CMP]]
;
%p1 = getelementptr inbounds i32, i32* getelementptr inbounds ([1000 x i32], [1000 x i32]* @X, i64 0, i64 0), i64 %i
@@ -491,7 +491,7 @@ define i1 @test24(i64 %i) {
define i1 @test24_as1(i64 %i) {
; CHECK-LABEL: @test24_as1(
-; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 %i to i16
+; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[I:%.*]] to i16
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[TMP1]], 1000
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -502,7 +502,7 @@ define i1 @test24_as1(i64 %i) {
define i1 @test25(i32 %x, i32 %y, i32 %z) {
; CHECK-LABEL: @test25(
-; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 %x, %y
+; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: ret i1 [[C]]
;
%lhs = add nsw i32 %x, %z
@@ -514,7 +514,7 @@ define i1 @test25(i32 %x, i32 %y, i32 %z
; X + Z > Y + Z -> X > Y if there is no overflow.
define i1 @test26(i32 %x, i32 %y, i32 %z) {
; CHECK-LABEL: @test26(
-; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 %x, %y
+; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: ret i1 [[C]]
;
%lhs = add nuw i32 %x, %z
@@ -526,7 +526,7 @@ define i1 @test26(i32 %x, i32 %y, i32 %z
; X - Z > Y - Z -> X > Y if there is no overflow.
define i1 @test27(i32 %x, i32 %y, i32 %z) {
; CHECK-LABEL: @test27(
-; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 %x, %y
+; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: ret i1 [[C]]
;
%lhs = sub nsw i32 %x, %z
@@ -538,7 +538,7 @@ define i1 @test27(i32 %x, i32 %y, i32 %z
; X - Z > Y - Z -> X > Y if there is no overflow.
define i1 @test28(i32 %x, i32 %y, i32 %z) {
; CHECK-LABEL: @test28(
-; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 %x, %y
+; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: ret i1 [[C]]
;
%lhs = sub nuw i32 %x, %z
@@ -550,7 +550,7 @@ define i1 @test28(i32 %x, i32 %y, i32 %z
; X + Y > X -> Y > 0 if there is no overflow.
define i1 @test29(i32 %x, i32 %y) {
; CHECK-LABEL: @test29(
-; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 %y, 0
+; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[Y:%.*]], 0
; CHECK-NEXT: ret i1 [[C]]
;
%lhs = add nsw i32 %x, %y
@@ -561,7 +561,7 @@ define i1 @test29(i32 %x, i32 %y) {
; X + Y > X -> Y > 0 if there is no overflow.
define i1 @test30(i32 %x, i32 %y) {
; CHECK-LABEL: @test30(
-; CHECK-NEXT: [[C:%.*]] = icmp ne i32 %y, 0
+; CHECK-NEXT: [[C:%.*]] = icmp ne i32 [[Y:%.*]], 0
; CHECK-NEXT: ret i1 [[C]]
;
%lhs = add nuw i32 %x, %y
@@ -572,7 +572,7 @@ define i1 @test30(i32 %x, i32 %y) {
; X > X + Y -> 0 > Y if there is no overflow.
define i1 @test31(i32 %x, i32 %y) {
; CHECK-LABEL: @test31(
-; CHECK-NEXT: [[C:%.*]] = icmp slt i32 %y, 0
+; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[Y:%.*]], 0
; CHECK-NEXT: ret i1 [[C]]
;
%rhs = add nsw i32 %x, %y
@@ -593,7 +593,7 @@ define i1 @test32(i32 %x, i32 %y) {
; X - Y > X -> 0 > Y if there is no overflow.
define i1 @test33(i32 %x, i32 %y) {
; CHECK-LABEL: @test33(
-; CHECK-NEXT: [[C:%.*]] = icmp slt i32 %y, 0
+; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[Y:%.*]], 0
; CHECK-NEXT: ret i1 [[C]]
;
%lhs = sub nsw i32 %x, %y
@@ -614,7 +614,7 @@ define i1 @test34(i32 %x, i32 %y) {
; X > X - Y -> Y > 0 if there is no overflow.
define i1 @test35(i32 %x, i32 %y) {
; CHECK-LABEL: @test35(
-; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 %y, 0
+; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[Y:%.*]], 0
; CHECK-NEXT: ret i1 [[C]]
;
%rhs = sub nsw i32 %x, %y
@@ -625,7 +625,7 @@ define i1 @test35(i32 %x, i32 %y) {
; X > X - Y -> Y > 0 if there is no overflow.
define i1 @test36(i32 %x, i32 %y) {
; CHECK-LABEL: @test36(
-; CHECK-NEXT: [[C:%.*]] = icmp ne i32 %y, 0
+; CHECK-NEXT: [[C:%.*]] = icmp ne i32 [[Y:%.*]], 0
; CHECK-NEXT: ret i1 [[C]]
;
%rhs = sub nuw i32 %x, %y
@@ -664,7 +664,7 @@ define <2 x i1> @ult_sub(<2 x i8> %xsrc,
; X - Y > X - Z -> Z > Y if there is no overflow.
define i1 @test37(i32 %x, i32 %y, i32 %z) {
; CHECK-LABEL: @test37(
-; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 %z, %y
+; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[Z:%.*]], [[Y:%.*]]
; CHECK-NEXT: ret i1 [[C]]
;
%lhs = sub nsw i32 %x, %y
@@ -676,7 +676,7 @@ define i1 @test37(i32 %x, i32 %y, i32 %z
; X - Y > X - Z -> Z > Y if there is no overflow.
define i1 @test38(i32 %x, i32 %y, i32 %z) {
; CHECK-LABEL: @test38(
-; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 %z, %y
+; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[Z:%.*]], [[Y:%.*]]
; CHECK-NEXT: ret i1 [[C]]
;
%lhs = sub nuw i32 %x, %y
@@ -688,7 +688,7 @@ define i1 @test38(i32 %x, i32 %y, i32 %z
; PR9343 #1
define i1 @test39(i32 %X, i32 %Y) {
; CHECK-LABEL: @test39(
-; CHECK-NEXT: [[B:%.*]] = icmp eq i32 %X, 0
+; CHECK-NEXT: [[B:%.*]] = icmp eq i32 [[X:%.*]], 0
; CHECK-NEXT: ret i1 [[B]]
;
%A = ashr exact i32 %X, %Y
@@ -698,7 +698,7 @@ define i1 @test39(i32 %X, i32 %Y) {
define <2 x i1> @test39vec(<2 x i32> %X, <2 x i32> %Y) {
; CHECK-LABEL: @test39vec(
-; CHECK-NEXT: [[B:%.*]] = icmp eq <2 x i32> %X, zeroinitializer
+; CHECK-NEXT: [[B:%.*]] = icmp eq <2 x i32> [[X:%.*]], zeroinitializer
; CHECK-NEXT: ret <2 x i1> [[B]]
;
%A = ashr exact <2 x i32> %X, %Y
@@ -708,7 +708,7 @@ define <2 x i1> @test39vec(<2 x i32> %X,
define i1 @test40(i32 %X, i32 %Y) {
; CHECK-LABEL: @test40(
-; CHECK-NEXT: [[B:%.*]] = icmp ne i32 %X, 0
+; CHECK-NEXT: [[B:%.*]] = icmp ne i32 [[X:%.*]], 0
; CHECK-NEXT: ret i1 [[B]]
;
%A = lshr exact i32 %X, %Y
@@ -718,7 +718,7 @@ define i1 @test40(i32 %X, i32 %Y) {
define <2 x i1> @test40vec(<2 x i32> %X, <2 x i32> %Y) {
; CHECK-LABEL: @test40vec(
-; CHECK-NEXT: [[B:%.*]] = icmp ne <2 x i32> %X, zeroinitializer
+; CHECK-NEXT: [[B:%.*]] = icmp ne <2 x i32> [[X:%.*]], zeroinitializer
; CHECK-NEXT: ret <2 x i1> [[B]]
;
%A = lshr exact <2 x i32> %X, %Y
@@ -728,7 +728,7 @@ define <2 x i1> @test40vec(<2 x i32> %X,
define i1 @shr_exact(i132 %x) {
; CHECK-LABEL: @shr_exact(
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq i132 %x, 32
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i132 [[X:%.*]], 32
; CHECK-NEXT: ret i1 [[CMP]]
;
%sh = ashr exact i132 %x, 4
@@ -738,7 +738,7 @@ define i1 @shr_exact(i132 %x) {
define <2 x i1> @shr_exact_vec(<2 x i132> %x) {
; CHECK-LABEL: @shr_exact_vec(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i132> %x, <i132 32, i132 32>
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i132> [[X:%.*]], <i132 32, i132 32>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%sh = lshr exact <2 x i132> %x, <i132 4, i132 4>
@@ -758,7 +758,7 @@ define i1 @test41(i32 %X, i32 %Y) {
define i1 @test42(i32 %X, i32 %Y) {
; CHECK-LABEL: @test42(
-; CHECK-NEXT: [[B:%.*]] = icmp sgt i32 %Y, -1
+; CHECK-NEXT: [[B:%.*]] = icmp sgt i32 [[Y:%.*]], -1
; CHECK-NEXT: ret i1 [[B]]
;
%A = srem i32 %X, %Y
@@ -768,7 +768,7 @@ define i1 @test42(i32 %X, i32 %Y) {
define i1 @test43(i32 %X, i32 %Y) {
; CHECK-LABEL: @test43(
-; CHECK-NEXT: [[B:%.*]] = icmp slt i32 %Y, 0
+; CHECK-NEXT: [[B:%.*]] = icmp slt i32 [[Y:%.*]], 0
; CHECK-NEXT: ret i1 [[B]]
;
%A = srem i32 %X, %Y
@@ -778,7 +778,7 @@ define i1 @test43(i32 %X, i32 %Y) {
define i1 @test44(i32 %X, i32 %Y) {
; CHECK-LABEL: @test44(
-; CHECK-NEXT: [[B:%.*]] = icmp sgt i32 %Y, -1
+; CHECK-NEXT: [[B:%.*]] = icmp sgt i32 [[Y:%.*]], -1
; CHECK-NEXT: ret i1 [[B]]
;
%A = srem i32 %X, %Y
@@ -788,7 +788,7 @@ define i1 @test44(i32 %X, i32 %Y) {
define i1 @test45(i32 %X, i32 %Y) {
; CHECK-LABEL: @test45(
-; CHECK-NEXT: [[B:%.*]] = icmp slt i32 %Y, 0
+; CHECK-NEXT: [[B:%.*]] = icmp slt i32 [[Y:%.*]], 0
; CHECK-NEXT: ret i1 [[B]]
;
%A = srem i32 %X, %Y
@@ -799,7 +799,7 @@ define i1 @test45(i32 %X, i32 %Y) {
; PR9343 #4
define i1 @test46(i32 %X, i32 %Y, i32 %Z) {
; CHECK-LABEL: @test46(
-; CHECK-NEXT: [[C:%.*]] = icmp ult i32 %X, %Y
+; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: ret i1 [[C]]
;
%A = ashr exact i32 %X, %Z
@@ -811,7 +811,7 @@ define i1 @test46(i32 %X, i32 %Y, i32 %Z
; PR9343 #5
define i1 @test47(i32 %X, i32 %Y, i32 %Z) {
; CHECK-LABEL: @test47(
-; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 %X, %Y
+; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: ret i1 [[C]]
;
%A = ashr exact i32 %X, %Z
@@ -823,7 +823,7 @@ define i1 @test47(i32 %X, i32 %Y, i32 %Z
; PR9343 #8
define i1 @test48(i32 %X, i32 %Y, i32 %Z) {
; CHECK-LABEL: @test48(
-; CHECK-NEXT: [[C:%.*]] = icmp eq i32 %X, %Y
+; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: ret i1 [[C]]
;
%A = sdiv exact i32 %X, %Z
@@ -836,8 +836,8 @@ define i1 @test48(i32 %X, i32 %Y, i32 %Z
define i1 @PR32949(i32 %X, i32 %Y, i32 %Z) {
; CHECK-LABEL: @PR32949(
-; CHECK-NEXT: [[A:%.*]] = sdiv exact i32 %X, %Z
-; CHECK-NEXT: [[B:%.*]] = sdiv exact i32 %Y, %Z
+; CHECK-NEXT: [[A:%.*]] = sdiv exact i32 [[X:%.*]], [[Z:%.*]]
+; CHECK-NEXT: [[B:%.*]] = sdiv exact i32 [[Y:%.*]], [[Z]]
; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[A]], [[B]]
; CHECK-NEXT: ret i1 [[C]]
;
@@ -872,8 +872,8 @@ define i1 @test50(i16 %X, i32 %Y) {
define i1 @test51(i32 %X, i32 %Y) {
; CHECK-LABEL: @test51(
-; CHECK-NEXT: [[A:%.*]] = and i32 %X, -2147483648
-; CHECK-NEXT: [[B:%.*]] = srem i32 [[A]], %Y
+; CHECK-NEXT: [[A:%.*]] = and i32 [[X:%.*]], -2147483648
+; CHECK-NEXT: [[B:%.*]] = srem i32 [[A]], [[Y:%.*]]
; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[B]], -1
; CHECK-NEXT: ret i1 [[C]]
;
@@ -885,7 +885,7 @@ define i1 @test51(i32 %X, i32 %Y) {
define i1 @test52(i32 %x1) {
; CHECK-LABEL: @test52(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 %x1, 16711935
+; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X1:%.*]], 16711935
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 4980863
; CHECK-NEXT: ret i1 [[TMP2]]
;
@@ -918,8 +918,8 @@ define i1 @test52b(i128 %x1) {
; PR9838
define i1 @test53(i32 %a, i32 %b) {
; CHECK-LABEL: @test53(
-; CHECK-NEXT: [[X:%.*]] = sdiv exact i32 %a, 30
-; CHECK-NEXT: [[Y:%.*]] = sdiv i32 %b, 30
+; CHECK-NEXT: [[X:%.*]] = sdiv exact i32 [[A:%.*]], 30
+; CHECK-NEXT: [[Y:%.*]] = sdiv i32 [[B:%.*]], 30
; CHECK-NEXT: [[Z:%.*]] = icmp eq i32 [[X]], [[Y]]
; CHECK-NEXT: ret i1 [[Z]]
;
@@ -931,8 +931,8 @@ define i1 @test53(i32 %a, i32 %b) {
define i1 @test54(i8 %a) {
; CHECK-LABEL: @test54(
-; CHECK-NEXT: [[AND:%.*]] = and i8 %a, -64
-; CHECK-NEXT: [[RET:%.*]] = icmp eq i8 [[AND]], -128
+; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[A:%.*]], -64
+; CHECK-NEXT: [[RET:%.*]] = icmp eq i8 [[TMP1]], -128
; CHECK-NEXT: ret i1 [[RET]]
;
%ext = zext i8 %a to i32
@@ -943,7 +943,7 @@ define i1 @test54(i8 %a) {
define i1 @test55(i32 %a) {
; CHECK-LABEL: @test55(
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %a, -123
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A:%.*]], -123
; CHECK-NEXT: ret i1 [[CMP]]
;
%sub = sub i32 0, %a
@@ -953,7 +953,7 @@ define i1 @test55(i32 %a) {
define <2 x i1> @test55vec(<2 x i32> %a) {
; CHECK-LABEL: @test55vec(
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> %a, <i32 -123, i32 -123>
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[A:%.*]], <i32 -123, i32 -123>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%sub = sub <2 x i32> zeroinitializer, %a
@@ -963,7 +963,7 @@ define <2 x i1> @test55vec(<2 x i32> %a)
define i1 @test56(i32 %a) {
; CHECK-LABEL: @test56(
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %a, -113
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A:%.*]], -113
; CHECK-NEXT: ret i1 [[CMP]]
;
%sub = sub i32 10, %a
@@ -973,7 +973,7 @@ define i1 @test56(i32 %a) {
define <2 x i1> @test56vec(<2 x i32> %a) {
; CHECK-LABEL: @test56vec(
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> %a, <i32 -113, i32 -113>
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[A:%.*]], <i32 -113, i32 -113>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%sub = sub <2 x i32> <i32 10, i32 10>, %a
@@ -985,7 +985,7 @@ define <2 x i1> @test56vec(<2 x i32> %a)
declare void @foo(i32)
define i1 @test57(i32 %a) {
; CHECK-LABEL: @test57(
-; CHECK-NEXT: [[AND:%.*]] = and i32 %a, -2
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[A:%.*]], -2
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[AND]], 0
; CHECK-NEXT: call void @foo(i32 [[AND]])
; CHECK-NEXT: ret i1 [[CMP]]
@@ -999,7 +999,7 @@ define i1 @test57(i32 %a) {
; rdar://problem/10482509
define zeroext i1 @cmpabs1(i64 %val) {
; CHECK-LABEL: @cmpabs1(
-; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i64 %val, 0
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i64 [[VAL:%.*]], 0
; CHECK-NEXT: ret i1 [[TOBOOL]]
;
%sub = sub nsw i64 0, %val
@@ -1011,7 +1011,7 @@ define zeroext i1 @cmpabs1(i64 %val) {
define zeroext i1 @cmpabs2(i64 %val) {
; CHECK-LABEL: @cmpabs2(
-; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i64 %val, 0
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i64 [[VAL:%.*]], 0
; CHECK-NEXT: ret i1 [[TOBOOL]]
;
%sub = sub nsw i64 0, %val
@@ -1034,7 +1034,7 @@ declare i32 @test58_d(i64)
define i1 @test59(i8* %foo) {
; CHECK-LABEL: @test59(
-; CHECK-NEXT: [[GEP1:%.*]] = getelementptr inbounds i8, i8* %foo, i64 8
+; CHECK-NEXT: [[GEP1:%.*]] = getelementptr inbounds i8, i8* [[FOO:%.*]], i64 8
; CHECK-NEXT: [[USE:%.*]] = ptrtoint i8* [[GEP1]] to i64
; CHECK-NEXT: [[CALL:%.*]] = call i32 @test58_d(i64 [[USE]])
; CHECK-NEXT: ret i1 true
@@ -1051,7 +1051,7 @@ define i1 @test59(i8* %foo) {
define i1 @test59_as1(i8 addrspace(1)* %foo) {
; CHECK-LABEL: @test59_as1(
-; CHECK-NEXT: [[GEP1:%.*]] = getelementptr inbounds i8, i8 addrspace(1)* %foo, i16 8
+; CHECK-NEXT: [[GEP1:%.*]] = getelementptr inbounds i8, i8 addrspace(1)* [[FOO:%.*]], i16 8
; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint i8 addrspace(1)* [[GEP1]] to i16
; CHECK-NEXT: [[USE:%.*]] = zext i16 [[TMP1]] to i64
; CHECK-NEXT: [[CALL:%.*]] = call i32 @test58_d(i64 [[USE]])
@@ -1069,8 +1069,8 @@ define i1 @test59_as1(i8 addrspace(1)* %
define i1 @test60(i8* %foo, i64 %i, i64 %j) {
; CHECK-LABEL: @test60(
-; CHECK-NEXT: [[GEP1_IDX:%.*]] = shl nuw i64 %i, 2
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i64 [[GEP1_IDX]], %j
+; CHECK-NEXT: [[GEP1_IDX:%.*]] = shl nuw i64 [[I:%.*]], 2
+; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i64 [[GEP1_IDX]], [[J:%.*]]
; CHECK-NEXT: ret i1 [[TMP1]]
;
%bit = bitcast i8* %foo to i32*
@@ -1083,8 +1083,8 @@ define i1 @test60(i8* %foo, i64 %i, i64
define i1 @test60_as1(i8 addrspace(1)* %foo, i64 %i, i64 %j) {
; CHECK-LABEL: @test60_as1(
-; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 %i to i16
-; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 %j to i16
+; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[I:%.*]] to i16
+; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[J:%.*]] to i16
; CHECK-NEXT: [[GEP1_IDX:%.*]] = shl nuw i16 [[TMP1]], 2
; CHECK-NEXT: [[TMP3:%.*]] = icmp slt i16 [[GEP1_IDX]], [[TMP2]]
; CHECK-NEXT: ret i1 [[TMP3]]
@@ -1101,8 +1101,8 @@ define i1 @test60_as1(i8 addrspace(1)* %
; bitcast. This uses the same sized addrspace.
define i1 @test60_addrspacecast(i8* %foo, i64 %i, i64 %j) {
; CHECK-LABEL: @test60_addrspacecast(
-; CHECK-NEXT: [[GEP1_IDX:%.*]] = shl nuw i64 %i, 2
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i64 [[GEP1_IDX]], %j
+; CHECK-NEXT: [[GEP1_IDX:%.*]] = shl nuw i64 [[I:%.*]], 2
+; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i64 [[GEP1_IDX]], [[J:%.*]]
; CHECK-NEXT: ret i1 [[TMP1]]
;
%bit = addrspacecast i8* %foo to i32 addrspace(3)*
@@ -1115,8 +1115,8 @@ define i1 @test60_addrspacecast(i8* %foo
define i1 @test60_addrspacecast_smaller(i8* %foo, i16 %i, i64 %j) {
; CHECK-LABEL: @test60_addrspacecast_smaller(
-; CHECK-NEXT: [[GEP1_IDX:%.*]] = shl nuw i16 %i, 2
-; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 %j to i16
+; CHECK-NEXT: [[GEP1_IDX:%.*]] = shl nuw i16 [[I:%.*]], 2
+; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[J:%.*]] to i16
; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i16 [[GEP1_IDX]], [[TMP1]]
; CHECK-NEXT: ret i1 [[TMP2]]
;
@@ -1130,9 +1130,9 @@ define i1 @test60_addrspacecast_smaller(
define i1 @test60_addrspacecast_larger(i8 addrspace(1)* %foo, i32 %i, i16 %j) {
; CHECK-LABEL: @test60_addrspacecast_larger(
-; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %i to i16
-; CHECK-NEXT: [[SHL:%.*]] = shl i16 [[TMP1]], 2
-; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i16 [[SHL]], %j
+; CHECK-NEXT: [[I_TR:%.*]] = trunc i32 [[I:%.*]] to i16
+; CHECK-NEXT: [[TMP1:%.*]] = shl i16 [[I_TR]], 2
+; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i16 [[TMP1]], [[J:%.*]]
; CHECK-NEXT: ret i1 [[TMP2]]
;
%bit = addrspacecast i8 addrspace(1)* %foo to i32 addrspace(2)*
@@ -1145,9 +1145,9 @@ define i1 @test60_addrspacecast_larger(i
define i1 @test61(i8* %foo, i64 %i, i64 %j) {
; CHECK-LABEL: @test61(
-; CHECK-NEXT: [[BIT:%.*]] = bitcast i8* %foo to i32*
-; CHECK-NEXT: [[GEP1:%.*]] = getelementptr i32, i32* [[BIT]], i64 %i
-; CHECK-NEXT: [[GEP2:%.*]] = getelementptr i8, i8* %foo, i64 %j
+; CHECK-NEXT: [[BIT:%.*]] = bitcast i8* [[FOO:%.*]] to i32*
+; CHECK-NEXT: [[GEP1:%.*]] = getelementptr i32, i32* [[BIT]], i64 [[I:%.*]]
+; CHECK-NEXT: [[GEP2:%.*]] = getelementptr i8, i8* [[FOO]], i64 [[J:%.*]]
; CHECK-NEXT: [[CAST1:%.*]] = bitcast i32* [[GEP1]] to i8*
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i8* [[GEP2]], [[CAST1]]
; CHECK-NEXT: ret i1 [[CMP]]
@@ -1163,9 +1163,9 @@ define i1 @test61(i8* %foo, i64 %i, i64
define i1 @test61_as1(i8 addrspace(1)* %foo, i16 %i, i16 %j) {
; CHECK-LABEL: @test61_as1(
-; CHECK-NEXT: [[BIT:%.*]] = bitcast i8 addrspace(1)* %foo to i32 addrspace(1)*
-; CHECK-NEXT: [[GEP1:%.*]] = getelementptr i32, i32 addrspace(1)* [[BIT]], i16 %i
-; CHECK-NEXT: [[GEP2:%.*]] = getelementptr i8, i8 addrspace(1)* %foo, i16 %j
+; CHECK-NEXT: [[BIT:%.*]] = bitcast i8 addrspace(1)* [[FOO:%.*]] to i32 addrspace(1)*
+; CHECK-NEXT: [[GEP1:%.*]] = getelementptr i32, i32 addrspace(1)* [[BIT]], i16 [[I:%.*]]
+; CHECK-NEXT: [[GEP2:%.*]] = getelementptr i8, i8 addrspace(1)* [[FOO]], i16 [[J:%.*]]
; CHECK-NEXT: [[CAST1:%.*]] = bitcast i32 addrspace(1)* [[GEP1]] to i8 addrspace(1)*
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i8 addrspace(1)* [[GEP2]], [[CAST1]]
; CHECK-NEXT: ret i1 [[CMP]]
@@ -1201,8 +1201,8 @@ define i1 @test62_as1(i8 addrspace(1)* %
define i1 @test63(i8 %a, i32 %b) {
; CHECK-LABEL: @test63(
-; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %b to i8
-; CHECK-NEXT: [[C:%.*]] = icmp eq i8 [[TMP1]], %a
+; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[B:%.*]] to i8
+; CHECK-NEXT: [[C:%.*]] = icmp eq i8 [[TMP1]], [[A:%.*]]
; CHECK-NEXT: ret i1 [[C]]
;
%z = zext i8 %a to i32
@@ -1213,8 +1213,8 @@ define i1 @test63(i8 %a, i32 %b) {
define i1 @test64(i8 %a, i32 %b) {
; CHECK-LABEL: @test64(
-; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %b to i8
-; CHECK-NEXT: [[C:%.*]] = icmp eq i8 [[TMP1]], %a
+; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[B:%.*]] to i8
+; CHECK-NEXT: [[C:%.*]] = icmp eq i8 [[TMP1]], [[A:%.*]]
; CHECK-NEXT: ret i1 [[C]]
;
%t = and i32 %b, 255
@@ -1245,7 +1245,7 @@ define i1 @test66(i64 %A, i64 %B) {
define i1 @test67(i32 %x) {
; CHECK-LABEL: @test67(
-; CHECK-NEXT: [[AND:%.*]] = and i32 %x, 96
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 96
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[AND]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -1270,7 +1270,7 @@ define i1 @test67inverse(i32 %x) {
define <2 x i1> @test67vec(<2 x i32> %x) {
; CHECK-LABEL: @test67vec(
-; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> %x, <i32 96, i32 96>
+; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[X:%.*]], <i32 96, i32 96>
; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[AND]], zeroinitializer
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
@@ -1303,7 +1303,7 @@ define <2 x i1> @test67vecinverse(<2 x i
define i1 @test68(i32 %x) {
; CHECK-LABEL: @test68(
-; CHECK-NEXT: [[AND:%.*]] = and i32 %x, 127
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 127
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[AND]], 30
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -1315,7 +1315,7 @@ define i1 @test68(i32 %x) {
; PR15940
define i1 @test70(i32 %X) {
; CHECK-LABEL: @test70(
-; CHECK-NEXT: [[A:%.*]] = srem i32 5, %X
+; CHECK-NEXT: [[A:%.*]] = srem i32 5, [[X:%.*]]
; CHECK-NEXT: [[C:%.*]] = icmp ne i32 [[A]], 2
; CHECK-NEXT: ret i1 [[C]]
;
@@ -1327,7 +1327,7 @@ define i1 @test70(i32 %X) {
define <2 x i1> @test70vec(<2 x i32> %X) {
; CHECK-LABEL: @test70vec(
-; CHECK-NEXT: [[C:%.*]] = icmp ne <2 x i32> %X, <i32 2, i32 2>
+; CHECK-NEXT: [[C:%.*]] = icmp ne <2 x i32> [[X:%.*]], <i32 2, i32 2>
; CHECK-NEXT: ret <2 x i1> [[C]]
;
%B = add <2 x i32> %X, <i32 2, i32 2>
@@ -1337,7 +1337,7 @@ define <2 x i1> @test70vec(<2 x i32> %X)
define i1 @icmp_sext16trunc(i32 %x) {
; CHECK-LABEL: @icmp_sext16trunc(
-; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %x to i16
+; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[X:%.*]] to i16
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i16 [[TMP1]], 36
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -1349,7 +1349,7 @@ define i1 @icmp_sext16trunc(i32 %x) {
define i1 @icmp_sext8trunc(i32 %x) {
; CHECK-LABEL: @icmp_sext8trunc(
-; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %x to i8
+; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[X:%.*]] to i8
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[TMP1]], 36
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -1362,7 +1362,7 @@ define i1 @icmp_sext8trunc(i32 %x) {
; Vectors should fold the same way.
define <2 x i1> @icmp_sext8trunc_vec(<2 x i32> %x) {
; CHECK-LABEL: @icmp_sext8trunc_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> %x to <2 x i8>
+; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[X:%.*]] to <2 x i8>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i8> [[TMP1]], <i8 36, i8 36>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
@@ -1374,7 +1374,7 @@ define <2 x i1> @icmp_sext8trunc_vec(<2
define i1 @icmp_shl16(i32 %x) {
; CHECK-LABEL: @icmp_shl16(
-; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %x to i16
+; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[X:%.*]] to i16
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i16 [[TMP1]], 36
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -1387,7 +1387,7 @@ define i1 @icmp_shl16(i32 %x) {
define i1 @icmp_shl17(i32 %x) {
; CHECK-LABEL: @icmp_shl17(
-; CHECK-NEXT: [[SHL:%.*]] = shl i32 %x, 17
+; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[X:%.*]], 17
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[SHL]], 2359296
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -1398,7 +1398,7 @@ define i1 @icmp_shl17(i32 %x) {
define <2 x i1> @icmp_shl16_vec(<2 x i32> %x) {
; CHECK-LABEL: @icmp_shl16_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> %x to <2 x i16>
+; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[X:%.*]] to <2 x i16>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i16> [[TMP1]], <i16 36, i16 36>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
@@ -1409,7 +1409,7 @@ define <2 x i1> @icmp_shl16_vec(<2 x i32
define i1 @icmp_shl24(i32 %x) {
; CHECK-LABEL: @icmp_shl24(
-; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %x to i8
+; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[X:%.*]] to i8
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[TMP1]], 36
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -1420,7 +1420,7 @@ define i1 @icmp_shl24(i32 %x) {
define i1 @icmp_shl_eq(i32 %x) {
; CHECK-LABEL: @icmp_shl_eq(
-; CHECK-NEXT: [[MUL_MASK:%.*]] = and i32 %x, 134217727
+; CHECK-NEXT: [[MUL_MASK:%.*]] = and i32 [[X:%.*]], 134217727
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[MUL_MASK]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -1431,7 +1431,7 @@ define i1 @icmp_shl_eq(i32 %x) {
define <2 x i1> @icmp_shl_eq_vec(<2 x i32> %x) {
; CHECK-LABEL: @icmp_shl_eq_vec(
-; CHECK-NEXT: [[MUL_MASK:%.*]] = and <2 x i32> %x, <i32 134217727, i32 134217727>
+; CHECK-NEXT: [[MUL_MASK:%.*]] = and <2 x i32> [[X:%.*]], <i32 134217727, i32 134217727>
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[MUL_MASK]], zeroinitializer
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
@@ -1442,7 +1442,7 @@ define <2 x i1> @icmp_shl_eq_vec(<2 x i3
define i1 @icmp_shl_nsw_ne(i32 %x) {
; CHECK-LABEL: @icmp_shl_nsw_ne(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 %x, 0
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[X:%.*]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%mul = shl nsw i32 %x, 7
@@ -1452,7 +1452,7 @@ define i1 @icmp_shl_nsw_ne(i32 %x) {
define <2 x i1> @icmp_shl_nsw_ne_vec(<2 x i32> %x) {
; CHECK-LABEL: @icmp_shl_nsw_ne_vec(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> %x, zeroinitializer
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[X:%.*]], zeroinitializer
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%mul = shl nsw <2 x i32> %x, <i32 7, i32 7>
@@ -1462,7 +1462,7 @@ define <2 x i1> @icmp_shl_nsw_ne_vec(<2
define i1 @icmp_shl_ne(i32 %x) {
; CHECK-LABEL: @icmp_shl_ne(
-; CHECK-NEXT: [[MUL_MASK:%.*]] = and i32 %x, 33554431
+; CHECK-NEXT: [[MUL_MASK:%.*]] = and i32 [[X:%.*]], 33554431
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[MUL_MASK]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -1473,7 +1473,7 @@ define i1 @icmp_shl_ne(i32 %x) {
define <2 x i1> @icmp_shl_ne_vec(<2 x i32> %x) {
; CHECK-LABEL: @icmp_shl_ne_vec(
-; CHECK-NEXT: [[MUL_MASK:%.*]] = and <2 x i32> %x, <i32 33554431, i32 33554431>
+; CHECK-NEXT: [[MUL_MASK:%.*]] = and <2 x i32> [[X:%.*]], <i32 33554431, i32 33554431>
; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[MUL_MASK]], zeroinitializer
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
@@ -1484,7 +1484,7 @@ define <2 x i1> @icmp_shl_ne_vec(<2 x i3
define <2 x i1> @icmp_shl_nuw_ne_vec(<2 x i32> %x) {
; CHECK-LABEL: @icmp_shl_nuw_ne_vec(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> %x, <i32 2, i32 2>
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[X:%.*]], <i32 2, i32 2>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%shl = shl nuw <2 x i32> %x, <i32 7, i32 7>
@@ -1496,7 +1496,7 @@ define <2 x i1> @icmp_shl_nuw_ne_vec(<2
; compare the LHS operand instead
define i1 @icmp_mul_nsw(i32 %x) {
; CHECK-LABEL: @icmp_mul_nsw(
-; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 %x, 0
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%mul = mul nsw i32 %x, 12
@@ -1506,7 +1506,7 @@ define i1 @icmp_mul_nsw(i32 %x) {
define i1 @icmp_mul_nsw1(i32 %x) {
; CHECK-LABEL: @icmp_mul_nsw1(
-; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 %x, 0
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%mul = mul nsw i32 %x, 12
@@ -1516,7 +1516,7 @@ define i1 @icmp_mul_nsw1(i32 %x) {
define i1 @icmp_mul_nsw_neg(i32 %x) {
; CHECK-LABEL: @icmp_mul_nsw_neg(
-; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 %x, 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 1
; CHECK-NEXT: ret i1 [[CMP]]
;
%mul = mul nsw i32 %x, -12
@@ -1526,7 +1526,7 @@ define i1 @icmp_mul_nsw_neg(i32 %x) {
define i1 @icmp_mul_nsw_neg1(i32 %x) {
; CHECK-LABEL: @icmp_mul_nsw_neg1(
-; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 %x, 0
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%mul = mul nsw i32 %x, -12
@@ -1536,7 +1536,7 @@ define i1 @icmp_mul_nsw_neg1(i32 %x) {
define <2 x i1> @icmp_mul_nsw_neg1_vec(<2 x i32> %x) {
; CHECK-LABEL: @icmp_mul_nsw_neg1_vec(
-; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> %x, zeroinitializer
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[X:%.*]], zeroinitializer
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%mul = mul nsw <2 x i32> %x, <i32 -12, i32 -12>
@@ -1555,7 +1555,7 @@ define i1 @icmp_mul_nsw_0(i32 %x) {
define i1 @icmp_mul(i32 %x) {
; CHECK-LABEL: @icmp_mul(
-; CHECK-NEXT: [[MUL:%.*]] = mul i32 %x, -12
+; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[X:%.*]], -12
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[MUL]], -1
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -1567,7 +1567,7 @@ define i1 @icmp_mul(i32 %x) {
; Checks for icmp (eq|ne) (mul x, C), 0
define i1 @icmp_mul_neq0(i32 %x) {
; CHECK-LABEL: @icmp_mul_neq0(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 %x, 0
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[X:%.*]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%mul = mul nsw i32 %x, -12
@@ -1577,7 +1577,7 @@ define i1 @icmp_mul_neq0(i32 %x) {
define <2 x i1> @icmp_mul_neq0_vec(<2 x i32> %x) {
; CHECK-LABEL: @icmp_mul_neq0_vec(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> %x, zeroinitializer
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[X:%.*]], zeroinitializer
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%mul = mul nsw <2 x i32> %x, <i32 -12, i32 -12>
@@ -1587,7 +1587,7 @@ define <2 x i1> @icmp_mul_neq0_vec(<2 x
define i1 @icmp_mul_eq0(i32 %x) {
; CHECK-LABEL: @icmp_mul_eq0(
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %x, 0
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%mul = mul nsw i32 %x, 12
@@ -1615,7 +1615,7 @@ define i1 @icmp_mul0_ne0(i32 %x) {
define i1 @icmp_sub1_sge(i32 %x, i32 %y) {
; CHECK-LABEL: @icmp_sub1_sge(
-; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 %x, %y
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: ret i1 [[CMP]]
;
%sub = add nsw i32 %x, -1
@@ -1625,7 +1625,7 @@ define i1 @icmp_sub1_sge(i32 %x, i32 %y)
define i1 @icmp_add1_sgt(i32 %x, i32 %y) {
; CHECK-LABEL: @icmp_add1_sgt(
-; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 %x, %y
+; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: ret i1 [[CMP]]
;
%add = add nsw i32 %x, 1
@@ -1635,7 +1635,7 @@ define i1 @icmp_add1_sgt(i32 %x, i32 %y)
define i1 @icmp_sub1_slt(i32 %x, i32 %y) {
; CHECK-LABEL: @icmp_sub1_slt(
-; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 %x, %y
+; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: ret i1 [[CMP]]
;
%sub = add nsw i32 %x, -1
@@ -1645,7 +1645,7 @@ define i1 @icmp_sub1_slt(i32 %x, i32 %y)
define i1 @icmp_add1_sle(i32 %x, i32 %y) {
; CHECK-LABEL: @icmp_add1_sle(
-; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 %x, %y
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: ret i1 [[CMP]]
;
%add = add nsw i32 %x, 1
@@ -1655,8 +1655,8 @@ define i1 @icmp_add1_sle(i32 %x, i32 %y)
define i1 @icmp_add20_sge_add57(i32 %x, i32 %y) {
; CHECK-LABEL: @icmp_add20_sge_add57(
-; CHECK-NEXT: [[TMP1:%.*]] = add nsw i32 %y, 37
-; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], %x
+; CHECK-NEXT: [[TMP1:%.*]] = add nsw i32 [[Y:%.*]], 37
+; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[X:%.*]]
; CHECK-NEXT: ret i1 [[CMP]]
;
%1 = add nsw i32 %x, 20
@@ -1667,8 +1667,8 @@ define i1 @icmp_add20_sge_add57(i32 %x,
define i1 @icmp_sub57_sge_sub20(i32 %x, i32 %y) {
; CHECK-LABEL: @icmp_sub57_sge_sub20(
-; CHECK-NEXT: [[TMP1:%.*]] = add nsw i32 %x, -37
-; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[TMP1]], %y
+; CHECK-NEXT: [[TMP1:%.*]] = add nsw i32 [[X:%.*]], -37
+; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[TMP1]], [[Y:%.*]]
; CHECK-NEXT: ret i1 [[CMP]]
;
%1 = add nsw i32 %x, -57
@@ -1679,8 +1679,8 @@ define i1 @icmp_sub57_sge_sub20(i32 %x,
define i1 @icmp_and_shl_neg_ne_0(i32 %A, i32 %B) {
; CHECK-LABEL: @icmp_and_shl_neg_ne_0(
-; CHECK-NEXT: [[SHL:%.*]] = shl i32 1, %B
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[SHL]], %A
+; CHECK-NEXT: [[SHL:%.*]] = shl i32 1, [[B:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[SHL]], [[A:%.*]]
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP1]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -1693,8 +1693,8 @@ define i1 @icmp_and_shl_neg_ne_0(i32 %A,
define i1 @icmp_and_shl_neg_eq_0(i32 %A, i32 %B) {
; CHECK-LABEL: @icmp_and_shl_neg_eq_0(
-; CHECK-NEXT: [[SHL:%.*]] = shl i32 1, %B
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[SHL]], %A
+; CHECK-NEXT: [[SHL:%.*]] = shl i32 1, [[B:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[SHL]], [[A:%.*]]
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[TMP1]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -1707,7 +1707,7 @@ define i1 @icmp_and_shl_neg_eq_0(i32 %A,
define i1 @icmp_add_and_shr_ne_0(i32 %X) {
; CHECK-LABEL: @icmp_add_and_shr_ne_0(
-; CHECK-NEXT: [[AND:%.*]] = and i32 %X, 240
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 240
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[AND]], 224
; CHECK-NEXT: ret i1 [[TOBOOL]]
;
@@ -1720,7 +1720,7 @@ define i1 @icmp_add_and_shr_ne_0(i32 %X)
define <2 x i1> @icmp_add_and_shr_ne_0_vec(<2 x i32> %X) {
; CHECK-LABEL: @icmp_add_and_shr_ne_0_vec(
-; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> %X, <i32 240, i32 240>
+; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[X:%.*]], <i32 240, i32 240>
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne <2 x i32> [[AND]], <i32 224, i32 224>
; CHECK-NEXT: ret <2 x i1> [[TOBOOL]]
;
@@ -1817,7 +1817,7 @@ define i1 @test71_as1(i8 addrspace(1)* %
define i1 @icmp_shl_1_V_ult_32(i32 %V) {
; CHECK-LABEL: @icmp_shl_1_V_ult_32(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 %V, 5
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[V:%.*]], 5
; CHECK-NEXT: ret i1 [[CMP]]
;
%shl = shl i32 1, %V
@@ -1827,7 +1827,7 @@ define i1 @icmp_shl_1_V_ult_32(i32 %V) {
define <2 x i1> @icmp_shl_1_V_ult_32_vec(<2 x i32> %V) {
; CHECK-LABEL: @icmp_shl_1_V_ult_32_vec(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> %V, <i32 5, i32 5>
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> [[V:%.*]], <i32 5, i32 5>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%shl = shl <2 x i32> <i32 1, i32 1>, %V
@@ -1837,7 +1837,7 @@ define <2 x i1> @icmp_shl_1_V_ult_32_vec
define i1 @icmp_shl_1_V_eq_32(i32 %V) {
; CHECK-LABEL: @icmp_shl_1_V_eq_32(
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %V, 5
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[V:%.*]], 5
; CHECK-NEXT: ret i1 [[CMP]]
;
%shl = shl i32 1, %V
@@ -1847,7 +1847,7 @@ define i1 @icmp_shl_1_V_eq_32(i32 %V) {
define <2 x i1> @icmp_shl_1_V_eq_32_vec(<2 x i32> %V) {
; CHECK-LABEL: @icmp_shl_1_V_eq_32_vec(
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> %V, <i32 5, i32 5>
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[V:%.*]], <i32 5, i32 5>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%shl = shl <2 x i32> <i32 1, i32 1>, %V
@@ -1857,7 +1857,7 @@ define <2 x i1> @icmp_shl_1_V_eq_32_vec(
define i1 @icmp_shl_1_V_ult_30(i32 %V) {
; CHECK-LABEL: @icmp_shl_1_V_ult_30(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 %V, 5
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[V:%.*]], 5
; CHECK-NEXT: ret i1 [[CMP]]
;
%shl = shl i32 1, %V
@@ -1867,7 +1867,7 @@ define i1 @icmp_shl_1_V_ult_30(i32 %V) {
define <2 x i1> @icmp_shl_1_V_ult_30_vec(<2 x i32> %V) {
; CHECK-LABEL: @icmp_shl_1_V_ult_30_vec(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> %V, <i32 5, i32 5>
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> [[V:%.*]], <i32 5, i32 5>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%shl = shl <2 x i32> <i32 1, i32 1>, %V
@@ -1877,7 +1877,7 @@ define <2 x i1> @icmp_shl_1_V_ult_30_vec
define i1 @icmp_shl_1_V_ugt_30(i32 %V) {
; CHECK-LABEL: @icmp_shl_1_V_ugt_30(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 %V, 4
+; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[V:%.*]], 4
; CHECK-NEXT: ret i1 [[CMP]]
;
%shl = shl i32 1, %V
@@ -1887,7 +1887,7 @@ define i1 @icmp_shl_1_V_ugt_30(i32 %V) {
define <2 x i1> @icmp_shl_1_V_ugt_30_vec(<2 x i32> %V) {
; CHECK-LABEL: @icmp_shl_1_V_ugt_30_vec(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i32> %V, <i32 4, i32 4>
+; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i32> [[V:%.*]], <i32 4, i32 4>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%shl = shl <2 x i32> <i32 1, i32 1>, %V
@@ -1897,7 +1897,7 @@ define <2 x i1> @icmp_shl_1_V_ugt_30_vec
define i1 @icmp_shl_1_V_ule_30(i32 %V) {
; CHECK-LABEL: @icmp_shl_1_V_ule_30(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 %V, 5
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[V:%.*]], 5
; CHECK-NEXT: ret i1 [[CMP]]
;
%shl = shl i32 1, %V
@@ -1907,7 +1907,7 @@ define i1 @icmp_shl_1_V_ule_30(i32 %V) {
define <2 x i1> @icmp_shl_1_V_ule_30_vec(<2 x i32> %V) {
; CHECK-LABEL: @icmp_shl_1_V_ule_30_vec(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> %V, <i32 5, i32 5>
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> [[V:%.*]], <i32 5, i32 5>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%shl = shl <2 x i32> <i32 1, i32 1>, %V
@@ -1917,7 +1917,7 @@ define <2 x i1> @icmp_shl_1_V_ule_30_vec
define i1 @icmp_shl_1_V_uge_30(i32 %V) {
; CHECK-LABEL: @icmp_shl_1_V_uge_30(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 %V, 4
+; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[V:%.*]], 4
; CHECK-NEXT: ret i1 [[CMP]]
;
%shl = shl i32 1, %V
@@ -1927,7 +1927,7 @@ define i1 @icmp_shl_1_V_uge_30(i32 %V) {
define <2 x i1> @icmp_shl_1_V_uge_30_vec(<2 x i32> %V) {
; CHECK-LABEL: @icmp_shl_1_V_uge_30_vec(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i32> %V, <i32 4, i32 4>
+; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i32> [[V:%.*]], <i32 4, i32 4>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%shl = shl <2 x i32> <i32 1, i32 1>, %V
@@ -1937,7 +1937,7 @@ define <2 x i1> @icmp_shl_1_V_uge_30_vec
define i1 @icmp_shl_1_V_uge_2147483648(i32 %V) {
; CHECK-LABEL: @icmp_shl_1_V_uge_2147483648(
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %V, 31
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[V:%.*]], 31
; CHECK-NEXT: ret i1 [[CMP]]
;
%shl = shl i32 1, %V
@@ -1947,7 +1947,7 @@ define i1 @icmp_shl_1_V_uge_2147483648(i
define <2 x i1> @icmp_shl_1_V_uge_2147483648_vec(<2 x i32> %V) {
; CHECK-LABEL: @icmp_shl_1_V_uge_2147483648_vec(
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> %V, <i32 31, i32 31>
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[V:%.*]], <i32 31, i32 31>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%shl = shl <2 x i32> <i32 1, i32 1>, %V
@@ -1957,7 +1957,7 @@ define <2 x i1> @icmp_shl_1_V_uge_214748
define i1 @icmp_shl_1_V_ult_2147483648(i32 %V) {
; CHECK-LABEL: @icmp_shl_1_V_ult_2147483648(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 %V, 31
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[V:%.*]], 31
; CHECK-NEXT: ret i1 [[CMP]]
;
%shl = shl i32 1, %V
@@ -1967,7 +1967,7 @@ define i1 @icmp_shl_1_V_ult_2147483648(i
define <2 x i1> @icmp_shl_1_V_ult_2147483648_vec(<2 x i32> %V) {
; CHECK-LABEL: @icmp_shl_1_V_ult_2147483648_vec(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> %V, <i32 31, i32 31>
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[V:%.*]], <i32 31, i32 31>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%shl = shl <2 x i32> <i32 1, i32 1>, %V
@@ -1977,8 +1977,8 @@ define <2 x i1> @icmp_shl_1_V_ult_214748
define i1 @or_icmp_eq_B_0_icmp_ult_A_B(i64 %a, i64 %b) {
; CHECK-LABEL: @or_icmp_eq_B_0_icmp_ult_A_B(
-; CHECK-NEXT: [[TMP1:%.*]] = add i64 %b, -1
-; CHECK-NEXT: [[TMP2:%.*]] = icmp uge i64 [[TMP1]], %a
+; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[B:%.*]], -1
+; CHECK-NEXT: [[TMP2:%.*]] = icmp uge i64 [[TMP1]], [[A:%.*]]
; CHECK-NEXT: ret i1 [[TMP2]]
;
%1 = icmp eq i64 %b, 0
@@ -1989,7 +1989,7 @@ define i1 @or_icmp_eq_B_0_icmp_ult_A_B(i
define i1 @icmp_add_ult_2(i32 %X) {
; CHECK-LABEL: @icmp_add_ult_2(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 %X, -2
+; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], -2
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP1]], 14
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -2000,7 +2000,7 @@ define i1 @icmp_add_ult_2(i32 %X) {
define <2 x i1> @icmp_add_X_-14_ult_2_vec(<2 x i32> %X) {
; CHECK-LABEL: @icmp_add_X_-14_ult_2_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> %X, <i32 -2, i32 -2>
+; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[X:%.*]], <i32 -2, i32 -2>
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[TMP1]], <i32 14, i32 14>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
@@ -2011,7 +2011,7 @@ define <2 x i1> @icmp_add_X_-14_ult_2_ve
define i1 @icmp_sub_3_X_ult_2(i32 %X) {
; CHECK-LABEL: @icmp_sub_3_X_ult_2(
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 %X, 1
+; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[X:%.*]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP1]], 3
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -2022,7 +2022,7 @@ define i1 @icmp_sub_3_X_ult_2(i32 %X) {
define <2 x i1> @icmp_sub_3_X_ult_2_vec(<2 x i32> %X) {
; CHECK-LABEL: @icmp_sub_3_X_ult_2_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = or <2 x i32> %X, <i32 1, i32 1>
+; CHECK-NEXT: [[TMP1:%.*]] = or <2 x i32> [[X:%.*]], <i32 1, i32 1>
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[TMP1]], <i32 3, i32 3>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
@@ -2033,7 +2033,7 @@ define <2 x i1> @icmp_sub_3_X_ult_2_vec(
define i1 @icmp_add_X_-14_uge_2(i32 %X) {
; CHECK-LABEL: @icmp_add_X_-14_uge_2(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 %X, -2
+; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], -2
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[TMP1]], 14
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -2044,7 +2044,7 @@ define i1 @icmp_add_X_-14_uge_2(i32 %X)
define <2 x i1> @icmp_add_X_-14_uge_2_vec(<2 x i32> %X) {
; CHECK-LABEL: @icmp_add_X_-14_uge_2_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> %X, <i32 -2, i32 -2>
+; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[X:%.*]], <i32 -2, i32 -2>
; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[TMP1]], <i32 14, i32 14>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
@@ -2055,7 +2055,7 @@ define <2 x i1> @icmp_add_X_-14_uge_2_ve
define i1 @icmp_sub_3_X_uge_2(i32 %X) {
; CHECK-LABEL: @icmp_sub_3_X_uge_2(
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 %X, 1
+; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[X:%.*]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[TMP1]], 3
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -2066,7 +2066,7 @@ define i1 @icmp_sub_3_X_uge_2(i32 %X) {
define <2 x i1> @icmp_sub_3_X_uge_2_vec(<2 x i32> %X) {
; CHECK-LABEL: @icmp_sub_3_X_uge_2_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = or <2 x i32> %X, <i32 1, i32 1>
+; CHECK-NEXT: [[TMP1:%.*]] = or <2 x i32> [[X:%.*]], <i32 1, i32 1>
; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[TMP1]], <i32 3, i32 3>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
@@ -2077,7 +2077,7 @@ define <2 x i1> @icmp_sub_3_X_uge_2_vec(
define i1 @icmp_and_X_-16_eq-16(i32 %X) {
; CHECK-LABEL: @icmp_and_X_-16_eq-16(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 %X, -17
+; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[X:%.*]], -17
; CHECK-NEXT: ret i1 [[CMP]]
;
%and = and i32 %X, -16
@@ -2087,7 +2087,7 @@ define i1 @icmp_and_X_-16_eq-16(i32 %X)
define <2 x i1> @icmp_and_X_-16_eq-16_vec(<2 x i32> %X) {
; CHECK-LABEL: @icmp_and_X_-16_eq-16_vec(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i32> %X, <i32 -17, i32 -17>
+; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i32> [[X:%.*]], <i32 -17, i32 -17>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%and = and <2 x i32> %X, <i32 -16, i32 -16>
@@ -2097,7 +2097,7 @@ define <2 x i1> @icmp_and_X_-16_eq-16_ve
define i1 @icmp_and_X_-16_ne-16(i32 %X) {
; CHECK-LABEL: @icmp_and_X_-16_ne-16(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 %X, -16
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[X:%.*]], -16
; CHECK-NEXT: ret i1 [[CMP]]
;
%and = and i32 %X, -16
@@ -2107,7 +2107,7 @@ define i1 @icmp_and_X_-16_ne-16(i32 %X)
define <2 x i1> @icmp_and_X_-16_ne-16_vec(<2 x i32> %X) {
; CHECK-LABEL: @icmp_and_X_-16_ne-16_vec(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> %X, <i32 -16, i32 -16>
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> [[X:%.*]], <i32 -16, i32 -16>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%and = and <2 x i32> %X, <i32 -16, i32 -16>
@@ -2120,7 +2120,7 @@ define <2 x i1> @icmp_and_X_-16_ne-16_ve
define i1 @or1_eq1(i32 %x) {
; CHECK-LABEL: @or1_eq1(
-; CHECK-NEXT: [[T1:%.*]] = icmp ult i32 %x, 2
+; CHECK-NEXT: [[T1:%.*]] = icmp ult i32 [[X:%.*]], 2
; CHECK-NEXT: ret i1 [[T1]]
;
%t0 = or i32 %x, 1
@@ -2132,7 +2132,7 @@ define i1 @or1_eq1(i32 %x) {
define <2 x i1> @or3_eq3_vec(<2 x i8> %x) {
; CHECK-LABEL: @or3_eq3_vec(
-; CHECK-NEXT: [[T1:%.*]] = icmp ult <2 x i8> %x, <i8 4, i8 4>
+; CHECK-NEXT: [[T1:%.*]] = icmp ult <2 x i8> [[X:%.*]], <i8 4, i8 4>
; CHECK-NEXT: ret <2 x i1> [[T1]]
;
%t0 = or <2 x i8> %x, <i8 3, i8 3>
@@ -2144,7 +2144,7 @@ define <2 x i1> @or3_eq3_vec(<2 x i8> %x
define i1 @or7_ne7(i32 %x) {
; CHECK-LABEL: @or7_ne7(
-; CHECK-NEXT: [[T1:%.*]] = icmp ugt i32 %x, 7
+; CHECK-NEXT: [[T1:%.*]] = icmp ugt i32 [[X:%.*]], 7
; CHECK-NEXT: ret i1 [[T1]]
;
%t0 = or i32 %x, 7
@@ -2156,7 +2156,7 @@ define i1 @or7_ne7(i32 %x) {
define <2 x i1> @or63_ne63_vec(<2 x i8> %x) {
; CHECK-LABEL: @or63_ne63_vec(
-; CHECK-NEXT: [[T1:%.*]] = icmp ugt <2 x i8> %x, <i8 63, i8 63>
+; CHECK-NEXT: [[T1:%.*]] = icmp ugt <2 x i8> [[X:%.*]], <i8 63, i8 63>
; CHECK-NEXT: ret <2 x i1> [[T1]]
;
%t0 = or <2 x i8> %x, <i8 63, i8 63>
@@ -2164,9 +2164,62 @@ define <2 x i1> @or63_ne63_vec(<2 x i8>
ret <2 x i1> %t1
}
+; PR40611: https://bugs.llvm.org/show_bug.cgi?id=40611
+; X | C == C --> (X & ~C) == 0
+
+define i1 @orC_eqC(i32 %x) {
+; CHECK-LABEL: @orC_eqC(
+; CHECK-NEXT: [[T0:%.*]] = or i32 [[X:%.*]], 42
+; CHECK-NEXT: [[T1:%.*]] = icmp eq i32 [[T0]], 42
+; CHECK-NEXT: ret i1 [[T1]]
+;
+ %t0 = or i32 %x, 42
+ %t1 = icmp eq i32 %t0, 42
+ ret i1 %t1
+}
+
+; X | C == C --> (X & ~C) == 0
+
+define <2 x i1> @orC_eqC_vec(<2 x i8> %x) {
+; CHECK-LABEL: @orC_eqC_vec(
+; CHECK-NEXT: [[T0:%.*]] = or <2 x i8> [[X:%.*]], <i8 43, i8 43>
+; CHECK-NEXT: [[T1:%.*]] = icmp eq <2 x i8> [[T0]], <i8 43, i8 43>
+; CHECK-NEXT: ret <2 x i1> [[T1]]
+;
+ %t0 = or <2 x i8> %x, <i8 43, i8 43>
+ %t1 = icmp eq <2 x i8> %t0, <i8 43, i8 43>
+ ret <2 x i1> %t1
+}
+
+; X | C != C --> (X & ~C) != 0
+
+define i1 @orC_neC(i32 %x) {
+; CHECK-LABEL: @orC_neC(
+; CHECK-NEXT: [[T0:%.*]] = or i32 [[X:%.*]], -42
+; CHECK-NEXT: [[T1:%.*]] = icmp ne i32 [[T0]], -42
+; CHECK-NEXT: ret i1 [[T1]]
+;
+ %t0 = or i32 %x, -42
+ %t1 = icmp ne i32 %t0, -42
+ ret i1 %t1
+}
+
+; X | C != C --> (X & ~C) != 0
+
+define <2 x i1> @orC_neC_vec(<2 x i8> %x) {
+; CHECK-LABEL: @orC_neC_vec(
+; CHECK-NEXT: [[T0:%.*]] = or <2 x i8> [[X:%.*]], <i8 -43, i8 -43>
+; CHECK-NEXT: [[T1:%.*]] = icmp ne <2 x i8> [[T0]], <i8 -43, i8 -43>
+; CHECK-NEXT: ret <2 x i1> [[T1]]
+;
+ %t0 = or <2 x i8> %x, <i8 -43, i8 -43>
+ %t1 = icmp ne <2 x i8> %t0, <i8 -43, i8 -43>
+ ret <2 x i1> %t1
+}
+
define i1 @shrink_constant(i32 %X) {
; CHECK-LABEL: @shrink_constant(
-; CHECK-NEXT: [[XOR:%.*]] = xor i32 %X, -12
+; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[X:%.*]], -12
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[XOR]], 4
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -2189,7 +2242,7 @@ define <2 x i1> @shrink_constant_vec(<2
; This test requires 3 different transforms to get to the result.
define i1 @icmp_sub_-1_X_ult_4(i32 %X) {
; CHECK-LABEL: @icmp_sub_-1_X_ult_4(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 %X, -5
+; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[X:%.*]], -5
; CHECK-NEXT: ret i1 [[CMP]]
;
%sub = sub i32 -1, %X
@@ -2199,7 +2252,7 @@ define i1 @icmp_sub_-1_X_ult_4(i32 %X) {
define <2 x i1> @icmp_xor_neg4_X_ult_4_vec(<2 x i32> %X) {
; CHECK-LABEL: @icmp_xor_neg4_X_ult_4_vec(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i32> %X, <i32 -5, i32 -5>
+; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i32> [[X:%.*]], <i32 -5, i32 -5>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%xor = xor <2 x i32> %X, <i32 -4, i32 -4>
@@ -2209,7 +2262,7 @@ define <2 x i1> @icmp_xor_neg4_X_ult_4_v
define i1 @icmp_sub_-1_X_uge_4(i32 %X) {
; CHECK-LABEL: @icmp_sub_-1_X_uge_4(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 %X, -4
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[X:%.*]], -4
; CHECK-NEXT: ret i1 [[CMP]]
;
%sub = sub i32 -1, %X
@@ -2219,7 +2272,7 @@ define i1 @icmp_sub_-1_X_uge_4(i32 %X) {
define <2 x i1> @icmp_xor_neg4_X_uge_4_vec(<2 x i32> %X) {
; CHECK-LABEL: @icmp_xor_neg4_X_uge_4_vec(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> %X, <i32 -4, i32 -4>
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> [[X:%.*]], <i32 -4, i32 -4>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%xor = xor <2 x i32> %X, <i32 -4, i32 -4>
@@ -2276,18 +2329,18 @@ define i1 @xor_ugt_extra_use(i8 %x, i8*
define i1 @icmp_swap_operands_for_cse(i32 %X, i32 %Y) {
; CHECK-LABEL: @icmp_swap_operands_for_cse(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[SUB:%.*]] = sub i32 %X, %Y
-; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 %X, %Y
-; CHECK-NEXT: br i1 [[CMP]], label %true, label %false
+; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[X]], [[Y]]
+; CHECK-NEXT: br i1 [[CMP]], label [[TRUE:%.*]], label [[FALSE:%.*]]
; CHECK: true:
; CHECK-NEXT: [[TMP0:%.*]] = and i32 [[SUB]], 1
-; CHECK-NEXT: br label %end
+; CHECK-NEXT: br label [[END:%.*]]
; CHECK: false:
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[SUB]], 16
-; CHECK-NEXT: br label %end
+; CHECK-NEXT: br label [[END]]
; CHECK: end:
-; CHECK-NEXT: [[RES_IN:%.*]] = phi i32 [ [[TMP0]], %true ], [ [[TMP1]], %false ]
-; CHECK-NEXT: [[RES:%.*]] = icmp ne i32 [[RES:%.*]].in, 0
+; CHECK-NEXT: [[RES_IN:%.*]] = phi i32 [ [[TMP0]], [[TRUE]] ], [ [[TMP1]], [[FALSE]] ]
+; CHECK-NEXT: [[RES:%.*]] = icmp ne i32 [[RES_IN]], 0
; CHECK-NEXT: ret i1 [[RES]]
;
entry:
@@ -2309,20 +2362,20 @@ end:
define i1 @icmp_swap_operands_for_cse2(i32 %X, i32 %Y) {
; CHECK-LABEL: @icmp_swap_operands_for_cse2(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 %X, %Y
-; CHECK-NEXT: br i1 [[CMP]], label %true, label %false
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: br i1 [[CMP]], label [[TRUE:%.*]], label [[FALSE:%.*]]
; CHECK: true:
-; CHECK-NEXT: [[SUB:%.*]] = sub i32 %X, %Y
-; CHECK-NEXT: [[SUB1:%.*]] = sub i32 %X, %Y
+; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[X]], [[Y]]
+; CHECK-NEXT: [[SUB1:%.*]] = sub i32 [[X]], [[Y]]
; CHECK-NEXT: [[ADD:%.*]] = add i32 [[SUB]], [[SUB1]]
-; CHECK-NEXT: br label %end
+; CHECK-NEXT: br label [[END:%.*]]
; CHECK: false:
-; CHECK-NEXT: [[SUB2:%.*]] = sub i32 %Y, %X
-; CHECK-NEXT: br label %end
+; CHECK-NEXT: [[SUB2:%.*]] = sub i32 [[Y]], [[X]]
+; CHECK-NEXT: br label [[END]]
; CHECK: end:
-; CHECK-NEXT: [[RES_IN_IN:%.*]] = phi i32 [ [[ADD]], %true ], [ [[SUB2]], %false ]
-; CHECK-NEXT: [[RES_IN:%.*]] = and i32 [[RES_IN:%.*]].in, 1
-; CHECK-NEXT: [[RES:%.*]] = icmp ne i32 [[RES:%.*]].in, 0
+; CHECK-NEXT: [[RES_IN_IN:%.*]] = phi i32 [ [[ADD]], [[TRUE]] ], [ [[SUB2]], [[FALSE]] ]
+; CHECK-NEXT: [[RES_IN:%.*]] = and i32 [[RES_IN_IN]], 1
+; CHECK-NEXT: [[RES:%.*]] = icmp ne i32 [[RES_IN]], 0
; CHECK-NEXT: ret i1 [[RES]]
;
entry:
@@ -2346,18 +2399,18 @@ end:
define i1 @icmp_do_not_swap_operands_for_cse(i32 %X, i32 %Y) {
; CHECK-LABEL: @icmp_do_not_swap_operands_for_cse(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 %Y, %X
-; CHECK-NEXT: br i1 [[CMP]], label %true, label %false
+; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[Y:%.*]], [[X:%.*]]
+; CHECK-NEXT: br i1 [[CMP]], label [[TRUE:%.*]], label [[FALSE:%.*]]
; CHECK: true:
-; CHECK-NEXT: [[SUB:%.*]] = sub i32 %X, %Y
-; CHECK-NEXT: br label %end
+; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[X]], [[Y]]
+; CHECK-NEXT: br label [[END:%.*]]
; CHECK: false:
-; CHECK-NEXT: [[SUB2:%.*]] = sub i32 %Y, %X
-; CHECK-NEXT: br label %end
+; CHECK-NEXT: [[SUB2:%.*]] = sub i32 [[Y]], [[X]]
+; CHECK-NEXT: br label [[END]]
; CHECK: end:
-; CHECK-NEXT: [[RES_IN_IN:%.*]] = phi i32 [ [[SUB]], %true ], [ [[SUB2]], %false ]
-; CHECK-NEXT: [[RES_IN:%.*]] = and i32 [[RES_IN:%.*]].in, 1
-; CHECK-NEXT: [[RES:%.*]] = icmp ne i32 [[RES:%.*]].in, 0
+; CHECK-NEXT: [[RES_IN_IN:%.*]] = phi i32 [ [[SUB]], [[TRUE]] ], [ [[SUB2]], [[FALSE]] ]
+; CHECK-NEXT: [[RES_IN:%.*]] = and i32 [[RES_IN_IN]], 1
+; CHECK-NEXT: [[RES:%.*]] = icmp ne i32 [[RES_IN]], 0
; CHECK-NEXT: ret i1 [[RES]]
;
entry:
@@ -2378,8 +2431,8 @@ end:
define i1 @icmp_lshr_lshr_eq(i32 %a, i32 %b) {
; CHECK-LABEL: @icmp_lshr_lshr_eq(
-; CHECK-NEXT: [[Z_UNSHIFTED:%.*]] = xor i32 %a, %b
-; CHECK-NEXT: [[Z:%.*]] = icmp ult i32 [[Z:%.*]].unshifted, 1073741824
+; CHECK-NEXT: [[Z_UNSHIFTED:%.*]] = xor i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[Z:%.*]] = icmp ult i32 [[Z_UNSHIFTED]], 1073741824
; CHECK-NEXT: ret i1 [[Z]]
;
%x = lshr i32 %a, 30
@@ -2390,8 +2443,8 @@ define i1 @icmp_lshr_lshr_eq(i32 %a, i32
define i1 @icmp_ashr_ashr_ne(i32 %a, i32 %b) {
; CHECK-LABEL: @icmp_ashr_ashr_ne(
-; CHECK-NEXT: [[Z_UNSHIFTED:%.*]] = xor i32 %a, %b
-; CHECK-NEXT: [[Z:%.*]] = icmp ugt i32 [[Z:%.*]].unshifted, 255
+; CHECK-NEXT: [[Z_UNSHIFTED:%.*]] = xor i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[Z:%.*]] = icmp ugt i32 [[Z_UNSHIFTED]], 255
; CHECK-NEXT: ret i1 [[Z]]
;
%x = ashr i32 %a, 8
@@ -2402,7 +2455,7 @@ define i1 @icmp_ashr_ashr_ne(i32 %a, i32
define i1 @icmp_neg_cst_slt(i32 %a) {
; CHECK-LABEL: @icmp_neg_cst_slt(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 %a, 10
+; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[A:%.*]], 10
; CHECK-NEXT: ret i1 [[TMP1]]
;
%1 = sub nsw i32 0, %a
@@ -2412,9 +2465,9 @@ define i1 @icmp_neg_cst_slt(i32 %a) {
define i1 @icmp_and_or_lshr(i32 %x, i32 %y) {
; CHECK-LABEL: @icmp_and_or_lshr(
-; CHECK-NEXT: [[SHF1:%.*]] = shl nuw i32 1, %y
+; CHECK-NEXT: [[SHF1:%.*]] = shl nuw i32 1, [[Y:%.*]]
; CHECK-NEXT: [[OR2:%.*]] = or i32 [[SHF1]], 1
-; CHECK-NEXT: [[AND3:%.*]] = and i32 [[OR2]], %x
+; CHECK-NEXT: [[AND3:%.*]] = and i32 [[OR2]], [[X:%.*]]
; CHECK-NEXT: [[RET:%.*]] = icmp ne i32 [[AND3]], 0
; CHECK-NEXT: ret i1 [[RET]]
;
@@ -2457,7 +2510,7 @@ define <2 x i1> @icmp_and_or_lshr_vec_co
define i1 @icmp_and_or_lshr_cst(i32 %x) {
; CHECK-LABEL: @icmp_and_or_lshr_cst(
-; CHECK-NEXT: [[AND1:%.*]] = and i32 %x, 3
+; CHECK-NEXT: [[AND1:%.*]] = and i32 [[X:%.*]], 3
; CHECK-NEXT: [[RET:%.*]] = icmp ne i32 [[AND1]], 0
; CHECK-NEXT: ret i1 [[RET]]
;
@@ -2498,7 +2551,7 @@ define <2 x i1> @icmp_and_or_lshr_cst_ve
define i1 @shl_ap1_zero_ap2_non_zero_2(i32 %a) {
; CHECK-LABEL: @shl_ap1_zero_ap2_non_zero_2(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 %a, 29
+; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[A:%.*]], 29
; CHECK-NEXT: ret i1 [[CMP]]
;
%shl = shl i32 4, %a
@@ -2508,7 +2561,7 @@ define i1 @shl_ap1_zero_ap2_non_zero_2(i
define <2 x i1> @shl_ap1_zero_ap2_non_zero_2_vec(<2 x i32> %a) {
; CHECK-LABEL: @shl_ap1_zero_ap2_non_zero_2_vec(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i32> %a, <i32 29, i32 29>
+; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i32> [[A:%.*]], <i32 29, i32 29>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%shl = shl <2 x i32> <i32 4, i32 4>, %a
@@ -2518,7 +2571,7 @@ define <2 x i1> @shl_ap1_zero_ap2_non_ze
define i1 @shl_ap1_zero_ap2_non_zero_4(i32 %a) {
; CHECK-LABEL: @shl_ap1_zero_ap2_non_zero_4(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 %a, 30
+; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[A:%.*]], 30
; CHECK-NEXT: ret i1 [[CMP]]
;
%shl = shl i32 -2, %a
@@ -2528,7 +2581,7 @@ define i1 @shl_ap1_zero_ap2_non_zero_4(i
define i1 @shl_ap1_non_zero_ap2_non_zero_both_positive(i32 %a) {
; CHECK-LABEL: @shl_ap1_non_zero_ap2_non_zero_both_positive(
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %a, 0
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A:%.*]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%shl = shl i32 50, %a
@@ -2538,7 +2591,7 @@ define i1 @shl_ap1_non_zero_ap2_non_zero
define i1 @shl_ap1_non_zero_ap2_non_zero_both_negative(i32 %a) {
; CHECK-LABEL: @shl_ap1_non_zero_ap2_non_zero_both_negative(
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %a, 0
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A:%.*]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%shl = shl i32 -50, %a
@@ -2557,7 +2610,7 @@ define i1 @shl_ap1_non_zero_ap2_non_zero
define i1 @shl_ap1_non_zero_ap2_non_zero_ap1_2(i32 %a) {
; CHECK-LABEL: @shl_ap1_non_zero_ap2_non_zero_ap1_2(
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %a, 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A:%.*]], 1
; CHECK-NEXT: ret i1 [[CMP]]
;
%shl = shl i32 25, %a
@@ -2576,7 +2629,7 @@ define i1 @shl_ap1_non_zero_ap2_non_zero
define i1 @icmp_sgt_zero_add_nsw(i32 %a) {
; CHECK-LABEL: @icmp_sgt_zero_add_nsw(
-; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 %a, -1
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A:%.*]], -1
; CHECK-NEXT: ret i1 [[CMP]]
;
%add = add nsw i32 %a, 1
@@ -2586,7 +2639,7 @@ define i1 @icmp_sgt_zero_add_nsw(i32 %a)
define i1 @icmp_sge_zero_add_nsw(i32 %a) {
; CHECK-LABEL: @icmp_sge_zero_add_nsw(
-; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 %a, -2
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A:%.*]], -2
; CHECK-NEXT: ret i1 [[CMP]]
;
%add = add nsw i32 %a, 1
@@ -2596,7 +2649,7 @@ define i1 @icmp_sge_zero_add_nsw(i32 %a)
define i1 @icmp_sle_zero_add_nsw(i32 %a) {
; CHECK-LABEL: @icmp_sle_zero_add_nsw(
-; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 %a, 0
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[A:%.*]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%add = add nsw i32 %a, 1
@@ -2606,8 +2659,9 @@ define i1 @icmp_sle_zero_add_nsw(i32 %a)
define zeroext i1 @icmp_cmpxchg_strong(i32* %sc, i32 %old_val, i32 %new_val) {
; CHECK-LABEL: @icmp_cmpxchg_strong(
-; CHECK-NEXT: [[XCHG:%.*]] = cmpxchg i32* %sc, i32 %old_val, i32 %new_val seq_cst seq_cst
-; CHECK-NEXT: [[ICMP:%.*]] = extractvalue { i32, i1
+; CHECK-NEXT: [[XCHG:%.*]] = cmpxchg i32* [[SC:%.*]], i32 [[OLD_VAL:%.*]], i32 [[NEW_VAL:%.*]] seq_cst seq_cst
+; CHECK-NEXT: [[ICMP:%.*]] = extractvalue { i32, i1 } [[XCHG]], 1
+; CHECK-NEXT: ret i1 [[ICMP]]
;
%xchg = cmpxchg i32* %sc, i32 %old_val, i32 %new_val seq_cst seq_cst
%xtrc = extractvalue { i32, i1 } %xchg, 0
@@ -2617,7 +2671,7 @@ define zeroext i1 @icmp_cmpxchg_strong(i
define i1 @f1(i64 %a, i64 %b) {
; CHECK-LABEL: @f1(
-; CHECK-NEXT: [[V:%.*]] = icmp sge i64 %a, %b
+; CHECK-NEXT: [[V:%.*]] = icmp sge i64 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: ret i1 [[V]]
;
%t = sub nsw i64 %a, %b
@@ -2627,7 +2681,7 @@ define i1 @f1(i64 %a, i64 %b) {
define <2 x i1> @f1_vec(<2 x i64> %a, <2 x i64> %b) {
; CHECK-LABEL: @f1_vec(
-; CHECK-NEXT: [[V:%.*]] = icmp sge <2 x i64> %a, %b
+; CHECK-NEXT: [[V:%.*]] = icmp sge <2 x i64> [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: ret <2 x i1> [[V]]
;
%t = sub nsw <2 x i64> %a, %b
@@ -2637,7 +2691,7 @@ define <2 x i1> @f1_vec(<2 x i64> %a, <2
define i1 @f2(i64 %a, i64 %b) {
; CHECK-LABEL: @f2(
-; CHECK-NEXT: [[V:%.*]] = icmp sgt i64 %a, %b
+; CHECK-NEXT: [[V:%.*]] = icmp sgt i64 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: ret i1 [[V]]
;
%t = sub nsw i64 %a, %b
@@ -2647,7 +2701,7 @@ define i1 @f2(i64 %a, i64 %b) {
define <2 x i1> @f2_vec(<2 x i64> %a, <2 x i64> %b) {
; CHECK-LABEL: @f2_vec(
-; CHECK-NEXT: [[V:%.*]] = icmp sgt <2 x i64> %a, %b
+; CHECK-NEXT: [[V:%.*]] = icmp sgt <2 x i64> [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: ret <2 x i1> [[V]]
;
%t = sub nsw <2 x i64> %a, %b
@@ -2657,7 +2711,7 @@ define <2 x i1> @f2_vec(<2 x i64> %a, <2
define i1 @f3(i64 %a, i64 %b) {
; CHECK-LABEL: @f3(
-; CHECK-NEXT: [[V:%.*]] = icmp slt i64 %a, %b
+; CHECK-NEXT: [[V:%.*]] = icmp slt i64 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: ret i1 [[V]]
;
%t = sub nsw i64 %a, %b
@@ -2667,7 +2721,7 @@ define i1 @f3(i64 %a, i64 %b) {
define <2 x i1> @f3_vec(<2 x i64> %a, <2 x i64> %b) {
; CHECK-LABEL: @f3_vec(
-; CHECK-NEXT: [[V:%.*]] = icmp slt <2 x i64> %a, %b
+; CHECK-NEXT: [[V:%.*]] = icmp slt <2 x i64> [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: ret <2 x i1> [[V]]
;
%t = sub nsw <2 x i64> %a, %b
@@ -2677,7 +2731,7 @@ define <2 x i1> @f3_vec(<2 x i64> %a, <2
define i1 @f4(i64 %a, i64 %b) {
; CHECK-LABEL: @f4(
-; CHECK-NEXT: [[V:%.*]] = icmp sle i64 %a, %b
+; CHECK-NEXT: [[V:%.*]] = icmp sle i64 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: ret i1 [[V]]
;
%t = sub nsw i64 %a, %b
@@ -2687,7 +2741,7 @@ define i1 @f4(i64 %a, i64 %b) {
define <2 x i1> @f4_vec(<2 x i64> %a, <2 x i64> %b) {
; CHECK-LABEL: @f4_vec(
-; CHECK-NEXT: [[V:%.*]] = icmp sle <2 x i64> %a, %b
+; CHECK-NEXT: [[V:%.*]] = icmp sle <2 x i64> [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: ret <2 x i1> [[V]]
;
%t = sub nsw <2 x i64> %a, %b
@@ -2697,8 +2751,8 @@ define <2 x i1> @f4_vec(<2 x i64> %a, <2
define i32 @f5(i8 %a, i8 %b) {
; CHECK-LABEL: @f5(
-; CHECK-NEXT: [[CONV:%.*]] = zext i8 %a to i32
-; CHECK-NEXT: [[CONV3:%.*]] = zext i8 %b to i32
+; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[A:%.*]] to i32
+; CHECK-NEXT: [[CONV3:%.*]] = zext i8 [[B:%.*]] to i32
; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[CONV]], [[CONV3]]
; CHECK-NEXT: [[CMP4:%.*]] = icmp slt i32 [[SUB]], 0
; CHECK-NEXT: [[SUB7:%.*]] = sub nsw i32 0, [[SUB]]
@@ -2716,9 +2770,9 @@ define i32 @f5(i8 %a, i8 %b) {
define i32 @f6(i32 %a, i32 %b) {
; CHECK-LABEL: @f6(
-; CHECK-NEXT: [[CMP_UNSHIFTED:%.*]] = xor i32 %a, %b
+; CHECK-NEXT: [[CMP_UNSHIFTED:%.*]] = xor i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[CMP_MASK:%.*]] = and i32 [[CMP_UNSHIFTED]], 255
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[CMP:%.*]].mask, 0
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[CMP_MASK]], 0
; CHECK-NEXT: [[S:%.*]] = select i1 [[CMP]], i32 10000, i32 0
; CHECK-NEXT: ret i32 [[S]]
;
@@ -2733,7 +2787,7 @@ define i32 @f6(i32 %a, i32 %b) {
define i32 @f7(i32 %a, i32 %b) {
; CHECK-LABEL: @f7(
-; CHECK-NEXT: [[CMP_UNSHIFTED:%.*]] = xor i32 %a, %b
+; CHECK-NEXT: [[CMP_UNSHIFTED:%.*]] = xor i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[CMP_MASK:%.*]] = and i32 [[CMP_UNSHIFTED]], 511
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[CMP_MASK]], 0
; CHECK-NEXT: [[S:%.*]] = select i1 [[CMP]], i32 0, i32 10000
@@ -2748,7 +2802,7 @@ define i32 @f7(i32 %a, i32 %b) {
define i1 @f8(i32 %val, i32 %lim) {
; CHECK-LABEL: @f8(
-; CHECK-NEXT: [[R:%.*]] = icmp ne i32 %lim, 0
+; CHECK-NEXT: [[R:%.*]] = icmp ne i32 [[LIM:%.*]], 0
; CHECK-NEXT: ret i1 [[R]]
;
%lim.sub = add i32 %lim, -1
@@ -2759,7 +2813,7 @@ define i1 @f8(i32 %val, i32 %lim) {
define i1 @f9(i32 %val, i32 %lim) {
; CHECK-LABEL: @f9(
-; CHECK-NEXT: [[R:%.*]] = icmp ne i32 %lim, 0
+; CHECK-NEXT: [[R:%.*]] = icmp ne i32 [[LIM:%.*]], 0
; CHECK-NEXT: ret i1 [[R]]
;
%lim.sub = sub i32 %lim, 1
@@ -2770,7 +2824,7 @@ define i1 @f9(i32 %val, i32 %lim) {
define i1 @f10(i16 %p) {
; CHECK-LABEL: @f10(
-; CHECK-NEXT: [[CMP580:%.*]] = icmp uge i16 %p, mul (i16 zext (i8 ptrtoint (i1 (i16)* @f10 to i8) to i16), i16 zext (i8 ptrtoint (i1 (i16)* @f10 to i8) to i16))
+; CHECK-NEXT: [[CMP580:%.*]] = icmp uge i16 [[P:%.*]], mul (i16 zext (i8 ptrtoint (i1 (i16)* @f10 to i8) to i16), i16 zext (i8 ptrtoint (i1 (i16)* @f10 to i8) to i16))
; CHECK-NEXT: ret i1 [[CMP580]]
;
%cmp580 = icmp ule i16 mul (i16 zext (i8 ptrtoint (i1 (i16)* @f10 to i8) to i16), i16 zext (i8 ptrtoint (i1 (i16)* @f10 to i8) to i16)), %p
@@ -2783,8 +2837,8 @@ define i1 @f10(i16 %p) {
define i1 @cmp_sgt_rhs_dec(float %x, i32 %i) {
; CHECK-LABEL: @cmp_sgt_rhs_dec(
-; CHECK-NEXT: [[CONV:%.*]] = fptosi float %x to i32
-; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[CONV]], %i
+; CHECK-NEXT: [[CONV:%.*]] = fptosi float [[X:%.*]] to i32
+; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[CONV]], [[I:%.*]]
; CHECK-NEXT: ret i1 [[CMP]]
;
%conv = fptosi float %x to i32
@@ -2795,8 +2849,8 @@ define i1 @cmp_sgt_rhs_dec(float %x, i32
define i1 @cmp_sle_rhs_dec(float %x, i32 %i) {
; CHECK-LABEL: @cmp_sle_rhs_dec(
-; CHECK-NEXT: [[CONV:%.*]] = fptosi float %x to i32
-; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[CONV]], %i
+; CHECK-NEXT: [[CONV:%.*]] = fptosi float [[X:%.*]] to i32
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[CONV]], [[I:%.*]]
; CHECK-NEXT: ret i1 [[CMP]]
;
%conv = fptosi float %x to i32
@@ -2807,8 +2861,8 @@ define i1 @cmp_sle_rhs_dec(float %x, i32
define i1 @cmp_sge_rhs_inc(float %x, i32 %i) {
; CHECK-LABEL: @cmp_sge_rhs_inc(
-; CHECK-NEXT: [[CONV:%.*]] = fptosi float %x to i32
-; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[CONV]], %i
+; CHECK-NEXT: [[CONV:%.*]] = fptosi float [[X:%.*]] to i32
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[CONV]], [[I:%.*]]
; CHECK-NEXT: ret i1 [[CMP]]
;
%conv = fptosi float %x to i32
@@ -2819,8 +2873,8 @@ define i1 @cmp_sge_rhs_inc(float %x, i32
define i1 @cmp_slt_rhs_inc(float %x, i32 %i) {
; CHECK-LABEL: @cmp_slt_rhs_inc(
-; CHECK-NEXT: [[CONV:%.*]] = fptosi float %x to i32
-; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[CONV]], %i
+; CHECK-NEXT: [[CONV:%.*]] = fptosi float [[X:%.*]] to i32
+; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[CONV]], [[I:%.*]]
; CHECK-NEXT: ret i1 [[CMP]]
;
%conv = fptosi float %x to i32
@@ -2831,8 +2885,8 @@ define i1 @cmp_slt_rhs_inc(float %x, i32
define i1 @PR26407(i32 %x, i32 %y) {
; CHECK-LABEL: @PR26407(
-; CHECK-NEXT: [[ADDX:%.*]] = add i32 %x, 2147483647
-; CHECK-NEXT: [[ADDY:%.*]] = add i32 %y, 2147483647
+; CHECK-NEXT: [[ADDX:%.*]] = add i32 [[X:%.*]], 2147483647
+; CHECK-NEXT: [[ADDY:%.*]] = add i32 [[Y:%.*]], 2147483647
; CHECK-NEXT: [[CMP:%.*]] = icmp uge i32 [[ADDX]], [[ADDY]]
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -2844,7 +2898,7 @@ define i1 @PR26407(i32 %x, i32 %y) {
define i1 @cmp_inverse_mask_bits_set_eq(i32 %x) {
; CHECK-LABEL: @cmp_inverse_mask_bits_set_eq(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 %x, -43
+; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], -43
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP1]], -43
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -2855,7 +2909,7 @@ define i1 @cmp_inverse_mask_bits_set_eq(
define <2 x i1> @cmp_inverse_mask_bits_set_eq_vec(<2 x i32> %x) {
; CHECK-LABEL: @cmp_inverse_mask_bits_set_eq_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> %x, <i32 -43, i32 -43>
+; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[X:%.*]], <i32 -43, i32 -43>
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[TMP1]], <i32 -43, i32 -43>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
@@ -2866,7 +2920,7 @@ define <2 x i1> @cmp_inverse_mask_bits_s
define i1 @cmp_inverse_mask_bits_set_ne(i32 %x) {
; CHECK-LABEL: @cmp_inverse_mask_bits_set_ne(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 %x, -43
+; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], -43
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[TMP1]], -43
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -2879,7 +2933,7 @@ define i1 @cmp_inverse_mask_bits_set_ne(
define i1 @PR27792(i128 %a) {
; CHECK-LABEL: @PR27792(
-; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i128 %a, -1
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i128 [[A:%.*]], -1
; CHECK-NEXT: ret i1 [[CMP]]
;
%cmp = icmp sge i128 %a, 0
@@ -2888,7 +2942,7 @@ define i1 @PR27792(i128 %a) {
define i1 @PR27792_2(i128 %a) {
; CHECK-LABEL: @PR27792_2(
-; CHECK-NEXT: [[B:%.*]] = icmp ne i128 %a, 0
+; CHECK-NEXT: [[B:%.*]] = icmp ne i128 [[A:%.*]], 0
; CHECK-NEXT: ret i1 [[B]]
;
%b = icmp uge i128 %a, 1
@@ -2897,7 +2951,7 @@ define i1 @PR27792_2(i128 %a) {
define i1 @ugtMaxSignedVal(i8 %a) {
; CHECK-LABEL: @ugtMaxSignedVal(
-; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 %a, 0
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[A:%.*]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%cmp = icmp ugt i8 %a, 127
@@ -2906,7 +2960,7 @@ define i1 @ugtMaxSignedVal(i8 %a) {
define <2 x i1> @ugtMaxSignedValVec(<2 x i8> %a) {
; CHECK-LABEL: @ugtMaxSignedValVec(
-; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i8> %a, zeroinitializer
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i8> [[A:%.*]], zeroinitializer
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%cmp = icmp ugt <2 x i8> %a, <i8 127, i8 127>
@@ -2915,7 +2969,7 @@ define <2 x i1> @ugtMaxSignedValVec(<2 x
define i1 @ugtKnownBits(i8 %a) {
; CHECK-LABEL: @ugtKnownBits(
-; CHECK-NEXT: [[B:%.*]] = and i8 %a, 17
+; CHECK-NEXT: [[B:%.*]] = and i8 [[A:%.*]], 17
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[B]], 17
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -2926,7 +2980,7 @@ define i1 @ugtKnownBits(i8 %a) {
define <2 x i1> @ugtKnownBitsVec(<2 x i8> %a) {
; CHECK-LABEL: @ugtKnownBitsVec(
-; CHECK-NEXT: [[B:%.*]] = and <2 x i8> %a, <i8 17, i8 17>
+; CHECK-NEXT: [[B:%.*]] = and <2 x i8> [[A:%.*]], <i8 17, i8 17>
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i8> [[B]], <i8 17, i8 17>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
@@ -2936,11 +2990,12 @@ define <2 x i1> @ugtKnownBitsVec(<2 x i8
}
define i1 @or_ptrtoint_mismatch(i8* %p, i32* %q) {
-; CHECK-LABEL: define i1 @or_ptrtoint_mismatch(i8* %p, i32* %q)
-; CHECK: [[pc:%.*]] = icmp eq i8* %p, null
-; CHECK: [[qc:%.*]] = icmp eq i32* %q, null
-; CHECK: [[b:%.*]] = and i1 [[pc]], [[qc]]
-; CHECK: ret i1 [[b]]
+; CHECK-LABEL: @or_ptrtoint_mismatch(
+; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i8* [[P:%.*]], null
+; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32* [[Q:%.*]], null
+; CHECK-NEXT: [[B:%.*]] = and i1 [[TMP1]], [[TMP2]]
+; CHECK-NEXT: ret i1 [[B]]
+;
%pp = ptrtoint i8* %p to i64
%qq = ptrtoint i32* %q to i64
@@ -2951,7 +3006,7 @@ define i1 @or_ptrtoint_mismatch(i8* %p,
define i1 @icmp_add1_ugt(i32 %x, i32 %y) {
; CHECK-LABEL: @icmp_add1_ugt(
-; CHECK-NEXT: [[CMP:%.*]] = icmp uge i32 %x, %y
+; CHECK-NEXT: [[CMP:%.*]] = icmp uge i32 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: ret i1 [[CMP]]
;
%add = add nuw i32 %x, 1
@@ -2961,7 +3016,7 @@ define i1 @icmp_add1_ugt(i32 %x, i32 %y)
define i1 @icmp_add1_ule(i32 %x, i32 %y) {
; CHECK-LABEL: @icmp_add1_ule(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 %x, %y
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: ret i1 [[CMP]]
;
%add = add nuw i32 %x, 1
@@ -2971,8 +3026,8 @@ define i1 @icmp_add1_ule(i32 %x, i32 %y)
define i1 @cmp_uge_rhs_inc(float %x, i32 %i) {
; CHECK-LABEL: @cmp_uge_rhs_inc(
-; CHECK-NEXT: [[CONV:%.*]] = fptosi float %x to i32
-; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[CONV]], %i
+; CHECK-NEXT: [[CONV:%.*]] = fptosi float [[X:%.*]] to i32
+; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[CONV]], [[I:%.*]]
; CHECK-NEXT: ret i1 [[CMP]]
;
%conv = fptosi float %x to i32
@@ -2983,8 +3038,8 @@ define i1 @cmp_uge_rhs_inc(float %x, i32
define i1 @cmp_ult_rhs_inc(float %x, i32 %i) {
; CHECK-LABEL: @cmp_ult_rhs_inc(
-; CHECK-NEXT: [[CONV:%.*]] = fptosi float %x to i32
-; CHECK-NEXT: [[CMP:%.*]] = icmp ule i32 [[CONV]], %i
+; CHECK-NEXT: [[CONV:%.*]] = fptosi float [[X:%.*]] to i32
+; CHECK-NEXT: [[CMP:%.*]] = icmp ule i32 [[CONV]], [[I:%.*]]
; CHECK-NEXT: ret i1 [[CMP]]
;
%conv = fptosi float %x to i32
@@ -2995,8 +3050,8 @@ define i1 @cmp_ult_rhs_inc(float %x, i32
define i1 @cmp_sge_lhs_inc(i32 %x, i32 %y) {
; CHECK-LABEL: @cmp_sge_lhs_inc(
-; CHECK-NEXT: [[INC:%.*]] = add
-; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[INC]], %y
+; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[X:%.*]], 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[INC]], [[Y:%.*]]
; CHECK-NEXT: ret i1 [[CMP]]
;
%inc = add nsw i32 %x, 1
@@ -3006,8 +3061,8 @@ define i1 @cmp_sge_lhs_inc(i32 %x, i32 %
define i1 @cmp_uge_lhs_inc(i32 %x, i32 %y) {
; CHECK-LABEL: @cmp_uge_lhs_inc(
-; CHECK-NEXT: [[INC:%.*]] = add
-; CHECK-NEXT: [[CMP:%.*]] = icmp uge i32 [[INC]], %y
+; CHECK-NEXT: [[INC:%.*]] = add nuw i32 [[X:%.*]], 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp uge i32 [[INC]], [[Y:%.*]]
; CHECK-NEXT: ret i1 [[CMP]]
;
%inc = add nuw i32 %x, 1
@@ -3017,8 +3072,8 @@ define i1 @cmp_uge_lhs_inc(i32 %x, i32 %
define i1 @cmp_sgt_lhs_dec(i32 %x, i32 %y) {
; CHECK-LABEL: @cmp_sgt_lhs_dec(
-; CHECK-NEXT: [[DEC:%.*]] = {{add|sub}}
-; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[DEC]], %y
+; CHECK-NEXT: [[DEC:%.*]] = add nsw i32 [[X:%.*]], -1
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[DEC]], [[Y:%.*]]
; CHECK-NEXT: ret i1 [[CMP]]
;
%dec = sub nsw i32 %x, 1
@@ -3028,8 +3083,8 @@ define i1 @cmp_sgt_lhs_dec(i32 %x, i32 %
define i1 @cmp_ugt_lhs_dec(i32 %x, i32 %y) {
; CHECK-LABEL: @cmp_ugt_lhs_dec(
-; CHECK-NEXT: [[DEC:%.*]] = {{add|sub}}
-; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[DEC]], %y
+; CHECK-NEXT: [[DEC:%.*]] = add i32 [[X:%.*]], -1
+; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[DEC]], [[Y:%.*]]
; CHECK-NEXT: ret i1 [[CMP]]
;
%dec = sub nuw i32 %x, 1
@@ -3039,8 +3094,8 @@ define i1 @cmp_ugt_lhs_dec(i32 %x, i32 %
define i1 @cmp_sle_rhs_inc(float %x, i32 %y) {
; CHECK-LABEL: @cmp_sle_rhs_inc(
-; CHECK-NEXT: [[CONV:%.*]] = fptosi float %x to i32
-; CHECK-NEXT: [[INC:%.*]] = add
+; CHECK-NEXT: [[CONV:%.*]] = fptosi float [[X:%.*]] to i32
+; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[Y:%.*]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[INC]], [[CONV]]
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -3052,8 +3107,8 @@ define i1 @cmp_sle_rhs_inc(float %x, i32
define i1 @cmp_ule_rhs_inc(float %x, i32 %y) {
; CHECK-LABEL: @cmp_ule_rhs_inc(
-; CHECK-NEXT: [[CONV:%.*]] = fptosi float %x to i32
-; CHECK-NEXT: [[INC:%.*]] = add
+; CHECK-NEXT: [[CONV:%.*]] = fptosi float [[X:%.*]] to i32
+; CHECK-NEXT: [[INC:%.*]] = add nuw i32 [[Y:%.*]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp uge i32 [[INC]], [[CONV]]
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -3065,8 +3120,8 @@ define i1 @cmp_ule_rhs_inc(float %x, i32
define i1 @cmp_slt_rhs_dec(float %x, i32 %y) {
; CHECK-LABEL: @cmp_slt_rhs_dec(
-; CHECK-NEXT: [[CONV:%.*]] = fptosi float %x to i32
-; CHECK-NEXT: [[DEC:%.*]] = {{add|sub}}
+; CHECK-NEXT: [[CONV:%.*]] = fptosi float [[X:%.*]] to i32
+; CHECK-NEXT: [[DEC:%.*]] = add nsw i32 [[Y:%.*]], -1
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[DEC]], [[CONV]]
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -3078,8 +3133,8 @@ define i1 @cmp_slt_rhs_dec(float %x, i32
define i1 @cmp_ult_rhs_dec(float %x, i32 %y) {
; CHECK-LABEL: @cmp_ult_rhs_dec(
-; CHECK-NEXT: [[CONV:%.*]] = fptosi float %x to i32
-; CHECK-NEXT: [[DEC:%.*]] = {{add|sub}}
+; CHECK-NEXT: [[CONV:%.*]] = fptosi float [[X:%.*]] to i32
+; CHECK-NEXT: [[DEC:%.*]] = add i32 [[Y:%.*]], -1
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[DEC]], [[CONV]]
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -3091,7 +3146,7 @@ define i1 @cmp_ult_rhs_dec(float %x, i32
define i1 @eq_add_constants(i32 %x, i32 %y) {
; CHECK-LABEL: @eq_add_constants(
-; CHECK-NEXT: [[C:%.*]] = icmp eq i32 %x, %y
+; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: ret i1 [[C]]
;
%A = add i32 %x, 5
@@ -3102,7 +3157,7 @@ define i1 @eq_add_constants(i32 %x, i32
define i1 @eq_mul_constants(i32 %x, i32 %y) {
; CHECK-LABEL: @eq_mul_constants(
-; CHECK-NEXT: [[C:%.*]] = icmp eq i32 %x, %y
+; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: ret i1 [[C]]
;
%A = mul i32 %x, 5
@@ -3113,7 +3168,7 @@ define i1 @eq_mul_constants(i32 %x, i32
define <2 x i1> @eq_mul_constants_splat(<2 x i32> %x, <2 x i32> %y) {
; CHECK-LABEL: @eq_mul_constants_splat(
-; CHECK-NEXT: [[C:%.*]] = icmp ne <2 x i32> %x, %y
+; CHECK-NEXT: [[C:%.*]] = icmp ne <2 x i32> [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: ret <2 x i1> [[C]]
;
%A = mul <2 x i32> %x, <i32 5, i32 5>
@@ -3128,7 +3183,7 @@ define <2 x i1> @eq_mul_constants_splat(
define i1 @eq_mul_constants_with_tz(i32 %x, i32 %y) {
; CHECK-LABEL: @eq_mul_constants_with_tz(
-; CHECK-NEXT: [[TMP1:%.*]] = xor i32 %x, %y
+; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 1073741823
; CHECK-NEXT: [[C:%.*]] = icmp ne i32 [[TMP2]], 0
; CHECK-NEXT: ret i1 [[C]]
@@ -3141,7 +3196,7 @@ define i1 @eq_mul_constants_with_tz(i32
define <2 x i1> @eq_mul_constants_with_tz_splat(<2 x i32> %x, <2 x i32> %y) {
; CHECK-LABEL: @eq_mul_constants_with_tz_splat(
-; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i32> %x, %y
+; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i32> [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: [[TMP2:%.*]] = and <2 x i32> [[TMP1]], <i32 1073741823, i32 1073741823>
; CHECK-NEXT: [[C:%.*]] = icmp eq <2 x i32> [[TMP2]], zeroinitializer
; CHECK-NEXT: ret <2 x i1> [[C]]
@@ -3156,7 +3211,7 @@ declare i32 @llvm.bswap.i32(i32)
define i1 @bswap_ne(i32 %x, i32 %y) {
; CHECK-LABEL: @bswap_ne(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 %x, %y
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: ret i1 [[CMP]]
;
%swapx = call i32 @llvm.bswap.i32(i32 %x)
@@ -3169,7 +3224,7 @@ declare <8 x i16> @llvm.bswap.v8i16(<8 x
define <8 x i1> @bswap_vec_eq(<8 x i16> %x, <8 x i16> %y) {
; CHECK-LABEL: @bswap_vec_eq(
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq <8 x i16> %x, %y
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq <8 x i16> [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: ret <8 x i1> [[CMP]]
;
%swapx = call <8 x i16> @llvm.bswap.v8i16(<8 x i16> %x)
@@ -3182,7 +3237,7 @@ declare i64 @llvm.bitreverse.i64(i64)
define i1 @bitreverse_eq(i64 %x, i64 %y) {
; CHECK-LABEL: @bitreverse_eq(
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 %x, %y
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: ret i1 [[CMP]]
;
%revx = call i64 @llvm.bitreverse.i64(i64 %x)
@@ -3195,7 +3250,7 @@ declare <8 x i16> @llvm.bitreverse.v8i16
define <8 x i1> @bitreverse_vec_ne(<8 x i16> %x, <8 x i16> %y) {
; CHECK-LABEL: @bitreverse_vec_ne(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ne <8 x i16> %x, %y
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne <8 x i16> [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: ret <8 x i1> [[CMP]]
;
%revx = call <8 x i16> @llvm.bitreverse.v8i16(<8 x i16> %x)
@@ -3365,7 +3420,7 @@ define i32 @abs_preserve(i32 %x) {
declare void @llvm.assume(i1)
define i1 @PR35794(i32* %a) {
; CHECK-LABEL: @PR35794(
-; CHECK-NEXT: [[MASKCOND:%.*]] = icmp eq i32* %a, null
+; CHECK-NEXT: [[MASKCOND:%.*]] = icmp eq i32* [[A:%.*]], null
; CHECK-NEXT: tail call void @llvm.assume(i1 [[MASKCOND]])
; CHECK-NEXT: ret i1 true
;
@@ -3378,7 +3433,7 @@ define i1 @PR35794(i32* %a) {
; Don't crash by assuming the compared values are integers.
define <2 x i1> @PR36583(<2 x i8*>) {
; CHECK-LABEL: @PR36583(
-; CHECK-NEXT: [[RES:%.*]] = icmp eq <2 x i8*> %0, zeroinitializer
+; CHECK-NEXT: [[RES:%.*]] = icmp eq <2 x i8*> [[TMP0:%.*]], zeroinitializer
; CHECK-NEXT: ret <2 x i1> [[RES]]
;
%cast = ptrtoint <2 x i8*> %0 to <2 x i64>
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