[llvm] r353043 - [AsmPrinter] Remove hidden flag -print-schedule.
Andrea Di Biagio via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 4 04:51:26 PST 2019
Removed: llvm/trunk/test/CodeGen/X86/sse41-schedule.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse41-schedule.ll?rev=353042&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse41-schedule.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse41-schedule.ll (removed)
@@ -1,6248 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,GENERIC
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=slm -mattr=-sse4.2 | FileCheck %s --check-prefixes=CHECK,SLM
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=sandybridge -mattr=-sse4.2 | FileCheck %s --check-prefixes=CHECK,SANDY-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=sandybridge -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,SANDY
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=ivybridge -mattr=-sse4.2 | FileCheck %s --check-prefixes=CHECK,SANDY-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=ivybridge -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,SANDY
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=haswell -mattr=-sse4.2 | FileCheck %s --check-prefixes=CHECK,HASWELL-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=haswell -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,HASWELL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=broadwell -mattr=-sse4.2 | FileCheck %s --check-prefixes=CHECK,BROADWELL-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=broadwell -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,BROADWELL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skylake -mattr=-sse4.2 | FileCheck %s --check-prefixes=CHECK,SKYLAKE-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skylake -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,SKYLAKE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skx -mattr=-sse4.2 | FileCheck %s --check-prefixes=CHECK,SKX-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skx -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,SKX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 -mattr=-sse4.2 | FileCheck %s --check-prefixes=CHECK,BDVER2-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 -mattr=-avx2,-xop | FileCheck %s --check-prefixes=CHECK,BDVER2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 -mattr=-sse4.2 | FileCheck %s --check-prefixes=CHECK,BTVER2-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,BTVER2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=znver1 -mattr=-sse4.2 | FileCheck %s --check-prefixes=CHECK,ZNVER1-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=znver1 -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,ZNVER1
-
-define <2 x double> @test_blendpd(<2 x double> %a0, <2 x double> %a1, <2 x double> *%a2) {
-; GENERIC-LABEL: test_blendpd:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: blendpd {{.*#+}} xmm1 = xmm0[0],xmm1[1] sched: [1:0.50]
-; GENERIC-NEXT: blendpd {{.*#+}} xmm0 = xmm0[0],mem[1] sched: [7:0.50]
-; GENERIC-NEXT: addpd %xmm1, %xmm0 # sched: [3:1.00]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_blendpd:
-; SLM: # %bb.0:
-; SLM-NEXT: blendpd {{.*#+}} xmm1 = xmm0[0],xmm1[1] sched: [1:1.00]
-; SLM-NEXT: blendpd {{.*#+}} xmm0 = xmm0[0],mem[1] sched: [4:1.00]
-; SLM-NEXT: addpd %xmm1, %xmm0 # sched: [3:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_blendpd:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: blendpd {{.*#+}} xmm1 = xmm0[0],xmm1[1] sched: [1:0.50]
-; SANDY-SSE-NEXT: blendpd {{.*#+}} xmm0 = xmm0[0],mem[1] sched: [7:0.50]
-; SANDY-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [3:1.00]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_blendpd:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vblendpd {{.*#+}} xmm1 = xmm0[0],xmm1[1] sched: [1:0.50]
-; SANDY-NEXT: vblendpd {{.*#+}} xmm0 = xmm0[0],mem[1] sched: [7:0.50]
-; SANDY-NEXT: vaddpd %xmm0, %xmm1, %xmm0 # sched: [3:1.00]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_blendpd:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: blendpd {{.*#+}} xmm1 = xmm0[0],xmm1[1] sched: [1:0.33]
-; HASWELL-SSE-NEXT: blendpd {{.*#+}} xmm0 = xmm0[0],mem[1] sched: [7:0.50]
-; HASWELL-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [3:1.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_blendpd:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vblendpd {{.*#+}} xmm1 = xmm0[0],xmm1[1] sched: [1:0.33]
-; HASWELL-NEXT: vblendpd {{.*#+}} xmm0 = xmm0[0],mem[1] sched: [7:0.50]
-; HASWELL-NEXT: vaddpd %xmm0, %xmm1, %xmm0 # sched: [3:1.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_blendpd:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: blendpd {{.*#+}} xmm1 = xmm0[0],xmm1[1] sched: [1:0.33]
-; BROADWELL-SSE-NEXT: blendpd {{.*#+}} xmm0 = xmm0[0],mem[1] sched: [6:0.50]
-; BROADWELL-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [3:1.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_blendpd:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vblendpd {{.*#+}} xmm1 = xmm0[0],xmm1[1] sched: [1:0.33]
-; BROADWELL-NEXT: vblendpd {{.*#+}} xmm0 = xmm0[0],mem[1] sched: [6:0.50]
-; BROADWELL-NEXT: vaddpd %xmm0, %xmm1, %xmm0 # sched: [3:1.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_blendpd:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: blendpd {{.*#+}} xmm1 = xmm0[0],xmm1[1] sched: [1:0.33]
-; SKYLAKE-SSE-NEXT: blendpd {{.*#+}} xmm0 = xmm0[0],mem[1] sched: [7:0.50]
-; SKYLAKE-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [4:0.50]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_blendpd:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vblendpd {{.*#+}} xmm1 = xmm0[0],xmm1[1] sched: [1:0.33]
-; SKYLAKE-NEXT: vblendpd {{.*#+}} xmm0 = xmm0[0],mem[1] sched: [7:0.50]
-; SKYLAKE-NEXT: vaddpd %xmm0, %xmm1, %xmm0 # sched: [4:0.50]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_blendpd:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: blendpd {{.*#+}} xmm1 = xmm0[0],xmm1[1] sched: [1:0.33]
-; SKX-SSE-NEXT: blendpd {{.*#+}} xmm0 = xmm0[0],mem[1] sched: [7:0.50]
-; SKX-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [4:0.50]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_blendpd:
-; SKX: # %bb.0:
-; SKX-NEXT: vblendpd {{.*#+}} xmm1 = xmm0[0],xmm1[1] sched: [1:0.33]
-; SKX-NEXT: vblendpd {{.*#+}} xmm0 = xmm0[0],mem[1] sched: [7:0.50]
-; SKX-NEXT: vaddpd %xmm0, %xmm1, %xmm0 # sched: [4:0.50]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_blendpd:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: blendpd {{.*#+}} xmm1 = xmm0[0],xmm1[1] sched: [2:0.50]
-; BDVER2-SSE-NEXT: blendpd {{.*#+}} xmm0 = xmm0[0],mem[1] sched: [7:0.50]
-; BDVER2-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [5:1.00]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_blendpd:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vblendpd {{.*#+}} xmm1 = xmm0[0],xmm1[1] sched: [2:0.50]
-; BDVER2-NEXT: vblendpd {{.*#+}} xmm0 = xmm0[0],mem[1] sched: [7:0.50]
-; BDVER2-NEXT: vaddpd %xmm0, %xmm1, %xmm0 # sched: [5:1.00]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_blendpd:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: blendpd {{.*#+}} xmm1 = xmm0[0],xmm1[1] sched: [1:0.50]
-; BTVER2-SSE-NEXT: blendpd {{.*#+}} xmm0 = xmm0[0],mem[1] sched: [6:1.00]
-; BTVER2-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [3:1.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_blendpd:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vblendpd {{.*#+}} xmm1 = xmm0[0],xmm1[1] sched: [1:0.50]
-; BTVER2-NEXT: vblendpd {{.*#+}} xmm0 = xmm0[0],mem[1] sched: [6:1.00]
-; BTVER2-NEXT: vaddpd %xmm0, %xmm1, %xmm0 # sched: [3:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_blendpd:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: blendpd {{.*#+}} xmm1 = xmm0[0],xmm1[1] sched: [1:0.50]
-; ZNVER1-SSE-NEXT: blendpd {{.*#+}} xmm0 = xmm0[0],mem[1] sched: [8:0.50]
-; ZNVER1-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [3:1.00]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_blendpd:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vblendpd {{.*#+}} xmm1 = xmm0[0],xmm1[1] sched: [1:0.50]
-; ZNVER1-NEXT: vblendpd {{.*#+}} xmm0 = xmm0[0],mem[1] sched: [8:0.50]
-; ZNVER1-NEXT: vaddpd %xmm0, %xmm1, %xmm0 # sched: [3:1.00]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = shufflevector <2 x double> %a0, <2 x double> %a1, <2 x i32> <i32 0, i32 3>
- %2 = load <2 x double>, <2 x double> *%a2, align 16
- %3 = shufflevector <2 x double> %1, <2 x double> %2, <2 x i32> <i32 0, i32 3>
- %4 = fadd <2 x double> %1, %3
- ret <2 x double> %4
-}
-
-define <4 x float> @test_blendps(<4 x float> %a0, <4 x float> %a1, <4 x float> *%a2) {
-; GENERIC-LABEL: test_blendps:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3] sched: [1:0.50]
-; GENERIC-NEXT: blendps {{.*#+}} xmm1 = xmm1[0],mem[1],xmm1[2,3] sched: [7:0.50]
-; GENERIC-NEXT: addps %xmm1, %xmm0 # sched: [3:1.00]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_blendps:
-; SLM: # %bb.0:
-; SLM-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3] sched: [1:1.00]
-; SLM-NEXT: blendps {{.*#+}} xmm1 = xmm1[0],mem[1],xmm1[2,3] sched: [4:1.00]
-; SLM-NEXT: addps %xmm1, %xmm0 # sched: [3:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_blendps:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3] sched: [1:0.50]
-; SANDY-SSE-NEXT: blendps {{.*#+}} xmm1 = xmm1[0],mem[1],xmm1[2,3] sched: [7:0.50]
-; SANDY-SSE-NEXT: addps %xmm1, %xmm0 # sched: [3:1.00]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_blendps:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3] sched: [1:0.50]
-; SANDY-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],mem[1],xmm1[2,3] sched: [7:0.50]
-; SANDY-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_blendps:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3] sched: [1:0.33]
-; HASWELL-SSE-NEXT: blendps {{.*#+}} xmm1 = xmm1[0],mem[1],xmm1[2,3] sched: [7:0.50]
-; HASWELL-SSE-NEXT: addps %xmm1, %xmm0 # sched: [3:1.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_blendps:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3] sched: [1:0.33]
-; HASWELL-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],mem[1],xmm1[2,3] sched: [7:0.50]
-; HASWELL-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_blendps:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3] sched: [1:0.33]
-; BROADWELL-SSE-NEXT: blendps {{.*#+}} xmm1 = xmm1[0],mem[1],xmm1[2,3] sched: [6:0.50]
-; BROADWELL-SSE-NEXT: addps %xmm1, %xmm0 # sched: [3:1.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_blendps:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3] sched: [1:0.33]
-; BROADWELL-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],mem[1],xmm1[2,3] sched: [6:0.50]
-; BROADWELL-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_blendps:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3] sched: [1:0.33]
-; SKYLAKE-SSE-NEXT: blendps {{.*#+}} xmm1 = xmm1[0],mem[1],xmm1[2,3] sched: [7:0.50]
-; SKYLAKE-SSE-NEXT: addps %xmm1, %xmm0 # sched: [4:0.50]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_blendps:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3] sched: [1:0.33]
-; SKYLAKE-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],mem[1],xmm1[2,3] sched: [7:0.50]
-; SKYLAKE-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [4:0.50]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_blendps:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3] sched: [1:0.33]
-; SKX-SSE-NEXT: blendps {{.*#+}} xmm1 = xmm1[0],mem[1],xmm1[2,3] sched: [7:0.50]
-; SKX-SSE-NEXT: addps %xmm1, %xmm0 # sched: [4:0.50]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_blendps:
-; SKX: # %bb.0:
-; SKX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3] sched: [1:0.33]
-; SKX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],mem[1],xmm1[2,3] sched: [7:0.50]
-; SKX-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [4:0.50]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_blendps:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3] sched: [2:0.50]
-; BDVER2-SSE-NEXT: blendps {{.*#+}} xmm1 = xmm1[0],mem[1],xmm1[2,3] sched: [7:0.50]
-; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [5:1.00]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_blendps:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3] sched: [2:0.50]
-; BDVER2-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],mem[1],xmm1[2,3] sched: [7:0.50]
-; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [5:1.00]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_blendps:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3] sched: [1:0.50]
-; BTVER2-SSE-NEXT: blendps {{.*#+}} xmm1 = xmm1[0],mem[1],xmm1[2,3] sched: [6:1.00]
-; BTVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [3:1.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_blendps:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3] sched: [1:0.50]
-; BTVER2-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],mem[1],xmm1[2,3] sched: [6:1.00]
-; BTVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_blendps:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3] sched: [1:0.50]
-; ZNVER1-SSE-NEXT: blendps {{.*#+}} xmm1 = xmm1[0],mem[1],xmm1[2,3] sched: [8:0.50]
-; ZNVER1-SSE-NEXT: addps %xmm1, %xmm0 # sched: [3:1.00]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_blendps:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3] sched: [1:0.50]
-; ZNVER1-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],mem[1],xmm1[2,3] sched: [8:0.50]
-; ZNVER1-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = shufflevector <4 x float> %a0, <4 x float> %a1, <4 x i32> <i32 0, i32 5, i32 6, i32 3>
- %2 = load <4 x float>, <4 x float> *%a2, align 16
- %3 = shufflevector <4 x float> %a1, <4 x float> %2, <4 x i32> <i32 0, i32 5, i32 2, i32 3>
- %4 = fadd <4 x float> %1, %3
- ret <4 x float> %4
-}
-
-define <2 x double> @test_blendvpd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2, <2 x double> *%a3) {
-; GENERIC-LABEL: test_blendvpd:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movapd %xmm0, %xmm3 # sched: [1:1.00]
-; GENERIC-NEXT: movaps %xmm2, %xmm0 # sched: [1:1.00]
-; GENERIC-NEXT: blendvpd %xmm0, %xmm1, %xmm3 # sched: [2:1.00]
-; GENERIC-NEXT: blendvpd %xmm0, (%rdi), %xmm3 # sched: [8:1.00]
-; GENERIC-NEXT: movapd %xmm3, %xmm0 # sched: [1:1.00]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_blendvpd:
-; SLM: # %bb.0:
-; SLM-NEXT: movapd %xmm0, %xmm3 # sched: [1:0.50]
-; SLM-NEXT: movaps %xmm2, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: blendvpd %xmm0, %xmm1, %xmm3 # sched: [1:1.00]
-; SLM-NEXT: blendvpd %xmm0, (%rdi), %xmm3 # sched: [4:1.00]
-; SLM-NEXT: movapd %xmm3, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_blendvpd:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: movapd %xmm0, %xmm3 # sched: [1:1.00]
-; SANDY-SSE-NEXT: movaps %xmm2, %xmm0 # sched: [1:1.00]
-; SANDY-SSE-NEXT: blendvpd %xmm0, %xmm1, %xmm3 # sched: [2:1.00]
-; SANDY-SSE-NEXT: blendvpd %xmm0, (%rdi), %xmm3 # sched: [8:1.00]
-; SANDY-SSE-NEXT: movapd %xmm3, %xmm0 # sched: [1:1.00]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_blendvpd:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vblendvpd %xmm2, %xmm1, %xmm0, %xmm0 # sched: [2:1.00]
-; SANDY-NEXT: vblendvpd %xmm2, (%rdi), %xmm0, %xmm0 # sched: [8:1.00]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_blendvpd:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: movapd %xmm0, %xmm3 # sched: [1:1.00]
-; HASWELL-SSE-NEXT: movaps %xmm2, %xmm0 # sched: [1:1.00]
-; HASWELL-SSE-NEXT: blendvpd %xmm0, %xmm1, %xmm3 # sched: [2:2.00]
-; HASWELL-SSE-NEXT: blendvpd %xmm0, (%rdi), %xmm3 # sched: [8:2.00]
-; HASWELL-SSE-NEXT: movapd %xmm3, %xmm0 # sched: [1:1.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_blendvpd:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vblendvpd %xmm2, %xmm1, %xmm0, %xmm0 # sched: [2:2.00]
-; HASWELL-NEXT: vblendvpd %xmm2, (%rdi), %xmm0, %xmm0 # sched: [8:2.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_blendvpd:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: movapd %xmm0, %xmm3 # sched: [1:1.00]
-; BROADWELL-SSE-NEXT: movaps %xmm2, %xmm0 # sched: [1:1.00]
-; BROADWELL-SSE-NEXT: blendvpd %xmm0, %xmm1, %xmm3 # sched: [2:2.00]
-; BROADWELL-SSE-NEXT: blendvpd %xmm0, (%rdi), %xmm3 # sched: [7:2.00]
-; BROADWELL-SSE-NEXT: movapd %xmm3, %xmm0 # sched: [1:1.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_blendvpd:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vblendvpd %xmm2, %xmm1, %xmm0, %xmm0 # sched: [2:2.00]
-; BROADWELL-NEXT: vblendvpd %xmm2, (%rdi), %xmm0, %xmm0 # sched: [7:2.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_blendvpd:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: movapd %xmm0, %xmm3 # sched: [1:0.33]
-; SKYLAKE-SSE-NEXT: movaps %xmm2, %xmm0 # sched: [1:0.33]
-; SKYLAKE-SSE-NEXT: blendvpd %xmm0, %xmm1, %xmm3 # sched: [2:0.67]
-; SKYLAKE-SSE-NEXT: blendvpd %xmm0, (%rdi), %xmm3 # sched: [8:0.67]
-; SKYLAKE-SSE-NEXT: movapd %xmm3, %xmm0 # sched: [1:0.33]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_blendvpd:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vblendvpd %xmm2, %xmm1, %xmm0, %xmm0 # sched: [2:0.67]
-; SKYLAKE-NEXT: vblendvpd %xmm2, (%rdi), %xmm0, %xmm0 # sched: [8:0.67]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_blendvpd:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: movapd %xmm0, %xmm3 # sched: [1:0.33]
-; SKX-SSE-NEXT: movaps %xmm2, %xmm0 # sched: [1:0.33]
-; SKX-SSE-NEXT: blendvpd %xmm0, %xmm1, %xmm3 # sched: [2:0.67]
-; SKX-SSE-NEXT: blendvpd %xmm0, (%rdi), %xmm3 # sched: [8:0.67]
-; SKX-SSE-NEXT: movapd %xmm3, %xmm0 # sched: [1:0.33]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_blendvpd:
-; SKX: # %bb.0:
-; SKX-NEXT: vblendvpd %xmm2, %xmm1, %xmm0, %xmm0 # sched: [2:0.67]
-; SKX-NEXT: vblendvpd %xmm2, (%rdi), %xmm0, %xmm0 # sched: [8:0.67]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_blendvpd:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: movapd %xmm0, %xmm3 # sched: [1:0.50]
-; BDVER2-SSE-NEXT: movaps %xmm2, %xmm0 # sched: [1:0.50]
-; BDVER2-SSE-NEXT: blendvpd %xmm0, %xmm1, %xmm3 # sched: [2:2.00]
-; BDVER2-SSE-NEXT: blendvpd %xmm0, (%rdi), %xmm3 # sched: [7:2.00]
-; BDVER2-SSE-NEXT: movapd %xmm3, %xmm0 # sched: [1:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_blendvpd:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vblendvpd %xmm2, %xmm1, %xmm0, %xmm0 # sched: [2:2.00]
-; BDVER2-NEXT: vblendvpd %xmm2, (%rdi), %xmm0, %xmm0 # sched: [7:2.00]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_blendvpd:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: movapd %xmm0, %xmm3 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: movaps %xmm2, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: blendvpd %xmm0, %xmm1, %xmm3 # sched: [2:2.00]
-; BTVER2-SSE-NEXT: blendvpd %xmm0, (%rdi), %xmm3 # sched: [7:2.00]
-; BTVER2-SSE-NEXT: movapd %xmm3, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_blendvpd:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vblendvpd %xmm2, %xmm1, %xmm0, %xmm0 # sched: [2:2.00]
-; BTVER2-NEXT: vblendvpd %xmm2, (%rdi), %xmm0, %xmm0 # sched: [7:2.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_blendvpd:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: movapd %xmm0, %xmm3 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: movaps %xmm2, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: blendvpd %xmm0, %xmm1, %xmm3 # sched: [1:0.50]
-; ZNVER1-SSE-NEXT: blendvpd %xmm0, (%rdi), %xmm3 # sched: [8:0.50]
-; ZNVER1-SSE-NEXT: movapd %xmm3, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_blendvpd:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vblendvpd %xmm2, %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; ZNVER1-NEXT: vblendvpd %xmm2, (%rdi), %xmm0, %xmm0 # sched: [8:0.50]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call <2 x double> @llvm.x86.sse41.blendvpd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2)
- %2 = load <2 x double>, <2 x double> *%a3, align 16
- %3 = call <2 x double> @llvm.x86.sse41.blendvpd(<2 x double> %1, <2 x double> %2, <2 x double> %a2)
- ret <2 x double> %3
-}
-declare <2 x double> @llvm.x86.sse41.blendvpd(<2 x double>, <2 x double>, <2 x double>) nounwind readnone
-
-define <4 x float> @test_blendvps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2, <4 x float> *%a3) {
-; GENERIC-LABEL: test_blendvps:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movaps %xmm0, %xmm3 # sched: [1:1.00]
-; GENERIC-NEXT: movaps %xmm2, %xmm0 # sched: [1:1.00]
-; GENERIC-NEXT: blendvps %xmm0, %xmm1, %xmm3 # sched: [2:1.00]
-; GENERIC-NEXT: blendvps %xmm0, (%rdi), %xmm3 # sched: [8:1.00]
-; GENERIC-NEXT: movaps %xmm3, %xmm0 # sched: [1:1.00]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_blendvps:
-; SLM: # %bb.0:
-; SLM-NEXT: movaps %xmm0, %xmm3 # sched: [1:0.50]
-; SLM-NEXT: movaps %xmm2, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: blendvps %xmm0, %xmm1, %xmm3 # sched: [1:1.00]
-; SLM-NEXT: blendvps %xmm0, (%rdi), %xmm3 # sched: [4:1.00]
-; SLM-NEXT: movaps %xmm3, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_blendvps:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: movaps %xmm0, %xmm3 # sched: [1:1.00]
-; SANDY-SSE-NEXT: movaps %xmm2, %xmm0 # sched: [1:1.00]
-; SANDY-SSE-NEXT: blendvps %xmm0, %xmm1, %xmm3 # sched: [2:1.00]
-; SANDY-SSE-NEXT: blendvps %xmm0, (%rdi), %xmm3 # sched: [8:1.00]
-; SANDY-SSE-NEXT: movaps %xmm3, %xmm0 # sched: [1:1.00]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_blendvps:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vblendvps %xmm2, %xmm1, %xmm0, %xmm0 # sched: [2:1.00]
-; SANDY-NEXT: vblendvps %xmm2, (%rdi), %xmm0, %xmm0 # sched: [8:1.00]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_blendvps:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: movaps %xmm0, %xmm3 # sched: [1:1.00]
-; HASWELL-SSE-NEXT: movaps %xmm2, %xmm0 # sched: [1:1.00]
-; HASWELL-SSE-NEXT: blendvps %xmm0, %xmm1, %xmm3 # sched: [2:2.00]
-; HASWELL-SSE-NEXT: blendvps %xmm0, (%rdi), %xmm3 # sched: [8:2.00]
-; HASWELL-SSE-NEXT: movaps %xmm3, %xmm0 # sched: [1:1.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_blendvps:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vblendvps %xmm2, %xmm1, %xmm0, %xmm0 # sched: [2:2.00]
-; HASWELL-NEXT: vblendvps %xmm2, (%rdi), %xmm0, %xmm0 # sched: [8:2.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_blendvps:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: movaps %xmm0, %xmm3 # sched: [1:1.00]
-; BROADWELL-SSE-NEXT: movaps %xmm2, %xmm0 # sched: [1:1.00]
-; BROADWELL-SSE-NEXT: blendvps %xmm0, %xmm1, %xmm3 # sched: [2:2.00]
-; BROADWELL-SSE-NEXT: blendvps %xmm0, (%rdi), %xmm3 # sched: [7:2.00]
-; BROADWELL-SSE-NEXT: movaps %xmm3, %xmm0 # sched: [1:1.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_blendvps:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vblendvps %xmm2, %xmm1, %xmm0, %xmm0 # sched: [2:2.00]
-; BROADWELL-NEXT: vblendvps %xmm2, (%rdi), %xmm0, %xmm0 # sched: [7:2.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_blendvps:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: movaps %xmm0, %xmm3 # sched: [1:0.33]
-; SKYLAKE-SSE-NEXT: movaps %xmm2, %xmm0 # sched: [1:0.33]
-; SKYLAKE-SSE-NEXT: blendvps %xmm0, %xmm1, %xmm3 # sched: [2:0.67]
-; SKYLAKE-SSE-NEXT: blendvps %xmm0, (%rdi), %xmm3 # sched: [8:0.67]
-; SKYLAKE-SSE-NEXT: movaps %xmm3, %xmm0 # sched: [1:0.33]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_blendvps:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vblendvps %xmm2, %xmm1, %xmm0, %xmm0 # sched: [2:0.67]
-; SKYLAKE-NEXT: vblendvps %xmm2, (%rdi), %xmm0, %xmm0 # sched: [8:0.67]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_blendvps:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: movaps %xmm0, %xmm3 # sched: [1:0.33]
-; SKX-SSE-NEXT: movaps %xmm2, %xmm0 # sched: [1:0.33]
-; SKX-SSE-NEXT: blendvps %xmm0, %xmm1, %xmm3 # sched: [2:0.67]
-; SKX-SSE-NEXT: blendvps %xmm0, (%rdi), %xmm3 # sched: [8:0.67]
-; SKX-SSE-NEXT: movaps %xmm3, %xmm0 # sched: [1:0.33]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_blendvps:
-; SKX: # %bb.0:
-; SKX-NEXT: vblendvps %xmm2, %xmm1, %xmm0, %xmm0 # sched: [2:0.67]
-; SKX-NEXT: vblendvps %xmm2, (%rdi), %xmm0, %xmm0 # sched: [8:0.67]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_blendvps:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: movaps %xmm0, %xmm3 # sched: [1:0.50]
-; BDVER2-SSE-NEXT: movaps %xmm2, %xmm0 # sched: [1:0.50]
-; BDVER2-SSE-NEXT: blendvps %xmm0, %xmm1, %xmm3 # sched: [2:2.00]
-; BDVER2-SSE-NEXT: blendvps %xmm0, (%rdi), %xmm3 # sched: [7:2.00]
-; BDVER2-SSE-NEXT: movaps %xmm3, %xmm0 # sched: [1:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_blendvps:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vblendvps %xmm2, %xmm1, %xmm0, %xmm0 # sched: [2:2.00]
-; BDVER2-NEXT: vblendvps %xmm2, (%rdi), %xmm0, %xmm0 # sched: [7:2.00]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_blendvps:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: movaps %xmm0, %xmm3 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: movaps %xmm2, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: blendvps %xmm0, %xmm1, %xmm3 # sched: [2:2.00]
-; BTVER2-SSE-NEXT: blendvps %xmm0, (%rdi), %xmm3 # sched: [7:2.00]
-; BTVER2-SSE-NEXT: movaps %xmm3, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_blendvps:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vblendvps %xmm2, %xmm1, %xmm0, %xmm0 # sched: [2:2.00]
-; BTVER2-NEXT: vblendvps %xmm2, (%rdi), %xmm0, %xmm0 # sched: [7:2.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_blendvps:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: movaps %xmm0, %xmm3 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: movaps %xmm2, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: blendvps %xmm0, %xmm1, %xmm3 # sched: [1:0.50]
-; ZNVER1-SSE-NEXT: blendvps %xmm0, (%rdi), %xmm3 # sched: [8:0.50]
-; ZNVER1-SSE-NEXT: movaps %xmm3, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_blendvps:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vblendvps %xmm2, %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; ZNVER1-NEXT: vblendvps %xmm2, (%rdi), %xmm0, %xmm0 # sched: [8:0.50]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call <4 x float> @llvm.x86.sse41.blendvps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2)
- %2 = load <4 x float>, <4 x float> *%a3
- %3 = call <4 x float> @llvm.x86.sse41.blendvps(<4 x float> %1, <4 x float> %2, <4 x float> %a2)
- ret <4 x float> %3
-}
-declare <4 x float> @llvm.x86.sse41.blendvps(<4 x float>, <4 x float>, <4 x float>) nounwind readnone
-
-define <2 x double> @test_dppd(<2 x double> %a0, <2 x double> %a1, <2 x double> *%a2) {
-; GENERIC-LABEL: test_dppd:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: dppd $7, %xmm1, %xmm0 # sched: [9:1.00]
-; GENERIC-NEXT: dppd $7, (%rdi), %xmm0 # sched: [15:1.00]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_dppd:
-; SLM: # %bb.0:
-; SLM-NEXT: dppd $7, %xmm1, %xmm0 # sched: [3:1.00]
-; SLM-NEXT: dppd $7, (%rdi), %xmm0 # sched: [6:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_dppd:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: dppd $7, %xmm1, %xmm0 # sched: [9:1.00]
-; SANDY-SSE-NEXT: dppd $7, (%rdi), %xmm0 # sched: [15:1.00]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_dppd:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vdppd $7, %xmm1, %xmm0, %xmm0 # sched: [9:1.00]
-; SANDY-NEXT: vdppd $7, (%rdi), %xmm0, %xmm0 # sched: [15:1.00]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_dppd:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: dppd $7, %xmm1, %xmm0 # sched: [9:1.00]
-; HASWELL-SSE-NEXT: dppd $7, (%rdi), %xmm0 # sched: [15:1.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_dppd:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vdppd $7, %xmm1, %xmm0, %xmm0 # sched: [9:1.00]
-; HASWELL-NEXT: vdppd $7, (%rdi), %xmm0, %xmm0 # sched: [15:1.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_dppd:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: dppd $7, %xmm1, %xmm0 # sched: [9:1.00]
-; BROADWELL-SSE-NEXT: dppd $7, (%rdi), %xmm0 # sched: [14:1.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_dppd:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vdppd $7, %xmm1, %xmm0, %xmm0 # sched: [9:1.00]
-; BROADWELL-NEXT: vdppd $7, (%rdi), %xmm0, %xmm0 # sched: [14:1.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_dppd:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: dppd $7, %xmm1, %xmm0 # sched: [9:1.00]
-; SKYLAKE-SSE-NEXT: dppd $7, (%rdi), %xmm0 # sched: [15:1.00]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_dppd:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vdppd $7, %xmm1, %xmm0, %xmm0 # sched: [9:1.00]
-; SKYLAKE-NEXT: vdppd $7, (%rdi), %xmm0, %xmm0 # sched: [15:1.00]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_dppd:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: dppd $7, %xmm1, %xmm0 # sched: [9:1.00]
-; SKX-SSE-NEXT: dppd $7, (%rdi), %xmm0 # sched: [15:1.00]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_dppd:
-; SKX: # %bb.0:
-; SKX-NEXT: vdppd $7, %xmm1, %xmm0, %xmm0 # sched: [9:1.00]
-; SKX-NEXT: vdppd $7, (%rdi), %xmm0, %xmm0 # sched: [15:1.00]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_dppd:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: dppd $7, %xmm1, %xmm0 # sched: [15:1.50]
-; BDVER2-SSE-NEXT: dppd $7, (%rdi), %xmm0 # sched: [20:1.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_dppd:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vdppd $7, %xmm1, %xmm0, %xmm0 # sched: [15:1.50]
-; BDVER2-NEXT: vdppd $7, (%rdi), %xmm0, %xmm0 # sched: [20:1.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_dppd:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: dppd $7, %xmm1, %xmm0 # sched: [9:3.00]
-; BTVER2-SSE-NEXT: dppd $7, (%rdi), %xmm0 # sched: [14:3.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_dppd:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vdppd $7, %xmm1, %xmm0, %xmm0 # sched: [9:3.00]
-; BTVER2-NEXT: vdppd $7, (%rdi), %xmm0, %xmm0 # sched: [14:3.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_dppd:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: dppd $7, %xmm1, %xmm0 # sched: [100:0.25]
-; ZNVER1-SSE-NEXT: dppd $7, (%rdi), %xmm0 # sched: [100:0.25]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_dppd:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vdppd $7, %xmm1, %xmm0, %xmm0 # sched: [100:0.25]
-; ZNVER1-NEXT: vdppd $7, (%rdi), %xmm0, %xmm0 # sched: [100:0.25]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call <2 x double> @llvm.x86.sse41.dppd(<2 x double> %a0, <2 x double> %a1, i8 7)
- %2 = load <2 x double>, <2 x double> *%a2, align 16
- %3 = call <2 x double> @llvm.x86.sse41.dppd(<2 x double> %1, <2 x double> %2, i8 7)
- ret <2 x double> %3
-}
-declare <2 x double> @llvm.x86.sse41.dppd(<2 x double>, <2 x double>, i8) nounwind readnone
-
-define <4 x float> @test_dpps(<4 x float> %a0, <4 x float> %a1, <4 x float> *%a2) {
-; GENERIC-LABEL: test_dpps:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: dpps $7, %xmm1, %xmm0 # sched: [12:2.00]
-; GENERIC-NEXT: dpps $7, (%rdi), %xmm0 # sched: [18:2.00]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_dpps:
-; SLM: # %bb.0:
-; SLM-NEXT: dpps $7, %xmm1, %xmm0 # sched: [3:1.00]
-; SLM-NEXT: dpps $7, (%rdi), %xmm0 # sched: [6:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_dpps:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: dpps $7, %xmm1, %xmm0 # sched: [12:2.00]
-; SANDY-SSE-NEXT: dpps $7, (%rdi), %xmm0 # sched: [18:2.00]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_dpps:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vdpps $7, %xmm1, %xmm0, %xmm0 # sched: [12:2.00]
-; SANDY-NEXT: vdpps $7, (%rdi), %xmm0, %xmm0 # sched: [18:2.00]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_dpps:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: dpps $7, %xmm1, %xmm0 # sched: [14:2.00]
-; HASWELL-SSE-NEXT: dpps $7, (%rdi), %xmm0 # sched: [20:2.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_dpps:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vdpps $7, %xmm1, %xmm0, %xmm0 # sched: [14:2.00]
-; HASWELL-NEXT: vdpps $7, (%rdi), %xmm0, %xmm0 # sched: [20:2.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_dpps:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: dpps $7, %xmm1, %xmm0 # sched: [14:2.00]
-; BROADWELL-SSE-NEXT: dpps $7, (%rdi), %xmm0 # sched: [19:2.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_dpps:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vdpps $7, %xmm1, %xmm0, %xmm0 # sched: [14:2.00]
-; BROADWELL-NEXT: vdpps $7, (%rdi), %xmm0, %xmm0 # sched: [19:2.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_dpps:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: dpps $7, %xmm1, %xmm0 # sched: [13:1.50]
-; SKYLAKE-SSE-NEXT: dpps $7, (%rdi), %xmm0 # sched: [19:1.50]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_dpps:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vdpps $7, %xmm1, %xmm0, %xmm0 # sched: [13:1.50]
-; SKYLAKE-NEXT: vdpps $7, (%rdi), %xmm0, %xmm0 # sched: [19:1.50]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_dpps:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: dpps $7, %xmm1, %xmm0 # sched: [13:1.33]
-; SKX-SSE-NEXT: dpps $7, (%rdi), %xmm0 # sched: [19:1.33]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_dpps:
-; SKX: # %bb.0:
-; SKX-NEXT: vdpps $7, %xmm1, %xmm0, %xmm0 # sched: [13:1.33]
-; SKX-NEXT: vdpps $7, (%rdi), %xmm0, %xmm0 # sched: [19:1.33]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_dpps:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: dpps $7, %xmm1, %xmm0 # sched: [25:1.50]
-; BDVER2-SSE-NEXT: dpps $7, (%rdi), %xmm0 # sched: [30:1.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_dpps:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vdpps $7, %xmm1, %xmm0, %xmm0 # sched: [25:1.50]
-; BDVER2-NEXT: vdpps $7, (%rdi), %xmm0, %xmm0 # sched: [30:1.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_dpps:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: dpps $7, %xmm1, %xmm0 # sched: [11:3.00]
-; BTVER2-SSE-NEXT: dpps $7, (%rdi), %xmm0 # sched: [16:3.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_dpps:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vdpps $7, %xmm1, %xmm0, %xmm0 # sched: [11:3.00]
-; BTVER2-NEXT: vdpps $7, (%rdi), %xmm0, %xmm0 # sched: [16:3.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_dpps:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: dpps $7, %xmm1, %xmm0 # sched: [100:0.25]
-; ZNVER1-SSE-NEXT: dpps $7, (%rdi), %xmm0 # sched: [100:0.25]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_dpps:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vdpps $7, %xmm1, %xmm0, %xmm0 # sched: [100:0.25]
-; ZNVER1-NEXT: vdpps $7, (%rdi), %xmm0, %xmm0 # sched: [100:0.25]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call <4 x float> @llvm.x86.sse41.dpps(<4 x float> %a0, <4 x float> %a1, i8 7)
- %2 = load <4 x float>, <4 x float> *%a2, align 16
- %3 = call <4 x float> @llvm.x86.sse41.dpps(<4 x float> %1, <4 x float> %2, i8 7)
- ret <4 x float> %3
-}
-declare <4 x float> @llvm.x86.sse41.dpps(<4 x float>, <4 x float>, i8) nounwind readnone
-
-define i32 @test_extractps(<4 x float> %a0, i32 *%a1) {
-; GENERIC-LABEL: test_extractps:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: extractps $3, %xmm0, %eax # sched: [3:1.00]
-; GENERIC-NEXT: extractps $1, %xmm0, (%rdi) # sched: [5:1.00]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_extractps:
-; SLM: # %bb.0:
-; SLM-NEXT: extractps $3, %xmm0, %eax # sched: [1:1.00]
-; SLM-NEXT: extractps $1, %xmm0, (%rdi) # sched: [4:2.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_extractps:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: extractps $3, %xmm0, %eax # sched: [3:1.00]
-; SANDY-SSE-NEXT: extractps $1, %xmm0, (%rdi) # sched: [5:1.00]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_extractps:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vextractps $3, %xmm0, %eax # sched: [3:1.00]
-; SANDY-NEXT: vextractps $1, %xmm0, (%rdi) # sched: [5:1.00]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_extractps:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: extractps $3, %xmm0, %eax # sched: [2:1.00]
-; HASWELL-SSE-NEXT: extractps $1, %xmm0, (%rdi) # sched: [2:1.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_extractps:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vextractps $3, %xmm0, %eax # sched: [2:1.00]
-; HASWELL-NEXT: vextractps $1, %xmm0, (%rdi) # sched: [2:1.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_extractps:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: extractps $3, %xmm0, %eax # sched: [2:1.00]
-; BROADWELL-SSE-NEXT: extractps $1, %xmm0, (%rdi) # sched: [2:1.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_extractps:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vextractps $3, %xmm0, %eax # sched: [2:1.00]
-; BROADWELL-NEXT: vextractps $1, %xmm0, (%rdi) # sched: [2:1.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_extractps:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: extractps $3, %xmm0, %eax # sched: [3:1.00]
-; SKYLAKE-SSE-NEXT: extractps $1, %xmm0, (%rdi) # sched: [2:1.00]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_extractps:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vextractps $3, %xmm0, %eax # sched: [3:1.00]
-; SKYLAKE-NEXT: vextractps $1, %xmm0, (%rdi) # sched: [2:1.00]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_extractps:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: extractps $3, %xmm0, %eax # sched: [3:1.00]
-; SKX-SSE-NEXT: extractps $1, %xmm0, (%rdi) # sched: [2:1.00]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_extractps:
-; SKX: # %bb.0:
-; SKX-NEXT: vextractps $3, %xmm0, %eax # sched: [3:1.00]
-; SKX-NEXT: vextractps $1, %xmm0, (%rdi) # sched: [2:1.00]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_extractps:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: extractps $3, %xmm0, %eax # sched: [13:1.00]
-; BDVER2-SSE-NEXT: extractps $1, %xmm0, (%rdi) # sched: [13:1.00]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_extractps:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vextractps $3, %xmm0, %eax # sched: [13:1.00]
-; BDVER2-NEXT: vextractps $1, %xmm0, (%rdi) # sched: [13:1.00]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_extractps:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: extractps $3, %xmm0, %eax # sched: [3:1.00]
-; BTVER2-SSE-NEXT: extractps $1, %xmm0, (%rdi) # sched: [3:1.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_extractps:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vextractps $3, %xmm0, %eax # sched: [3:1.00]
-; BTVER2-NEXT: vextractps $1, %xmm0, (%rdi) # sched: [3:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_extractps:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: extractps $3, %xmm0, %eax # sched: [2:2.00]
-; ZNVER1-SSE-NEXT: extractps $1, %xmm0, (%rdi) # sched: [5:2.50]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_extractps:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vextractps $3, %xmm0, %eax # sched: [2:2.00]
-; ZNVER1-NEXT: vextractps $1, %xmm0, (%rdi) # sched: [5:2.50]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = extractelement <4 x float> %a0, i32 3
- %2 = extractelement <4 x float> %a0, i32 1
- %3 = bitcast float %1 to i32
- %4 = bitcast float %2 to i32
- store i32 %4, i32 *%a1
- ret i32 %3
-}
-
-define <4 x float> @test_insertps(<4 x float> %a0, <4 x float> %a1, float *%a2) {
-; GENERIC-LABEL: test_insertps:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: insertps {{.*#+}} xmm0 = zero,xmm1[0],xmm0[2,3] sched: [1:1.00]
-; GENERIC-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0] sched: [7:1.00]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_insertps:
-; SLM: # %bb.0:
-; SLM-NEXT: insertps {{.*#+}} xmm0 = zero,xmm1[0],xmm0[2,3] sched: [1:1.00]
-; SLM-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0] sched: [4:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_insertps:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: insertps {{.*#+}} xmm0 = zero,xmm1[0],xmm0[2,3] sched: [1:1.00]
-; SANDY-SSE-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0] sched: [7:1.00]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_insertps:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm1[0],xmm0[2,3] sched: [1:1.00]
-; SANDY-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0] sched: [7:1.00]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_insertps:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: insertps {{.*#+}} xmm0 = zero,xmm1[0],xmm0[2,3] sched: [1:1.00]
-; HASWELL-SSE-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0] sched: [7:1.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_insertps:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm1[0],xmm0[2,3] sched: [1:1.00]
-; HASWELL-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0] sched: [7:1.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_insertps:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: insertps {{.*#+}} xmm0 = zero,xmm1[0],xmm0[2,3] sched: [1:1.00]
-; BROADWELL-SSE-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0] sched: [6:1.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_insertps:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm1[0],xmm0[2,3] sched: [1:1.00]
-; BROADWELL-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0] sched: [6:1.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_insertps:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: insertps {{.*#+}} xmm0 = zero,xmm1[0],xmm0[2,3] sched: [1:1.00]
-; SKYLAKE-SSE-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0] sched: [7:1.00]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_insertps:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm1[0],xmm0[2,3] sched: [1:1.00]
-; SKYLAKE-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0] sched: [7:1.00]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_insertps:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: insertps {{.*#+}} xmm0 = zero,xmm1[0],xmm0[2,3] sched: [1:1.00]
-; SKX-SSE-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0] sched: [7:1.00]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_insertps:
-; SKX: # %bb.0:
-; SKX-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm1[0],xmm0[2,3] sched: [1:1.00]
-; SKX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0] sched: [7:1.00]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_insertps:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: insertps {{.*#+}} xmm0 = zero,xmm1[0],xmm0[2,3] sched: [2:0.50]
-; BDVER2-SSE-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0] sched: [7:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_insertps:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm1[0],xmm0[2,3] sched: [2:0.50]
-; BDVER2-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0] sched: [7:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_insertps:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: insertps {{.*#+}} xmm0 = zero,xmm1[0],xmm0[2,3] sched: [1:0.50]
-; BTVER2-SSE-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0] sched: [6:1.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_insertps:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm1[0],xmm0[2,3] sched: [1:0.50]
-; BTVER2-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0] sched: [6:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_insertps:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: insertps {{.*#+}} xmm0 = zero,xmm1[0],xmm0[2,3] sched: [1:0.50]
-; ZNVER1-SSE-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0] sched: [8:0.50]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_insertps:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm1[0],xmm0[2,3] sched: [1:0.50]
-; ZNVER1-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0] sched: [8:0.50]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call <4 x float> @llvm.x86.sse41.insertps(<4 x float> %a0, <4 x float> %a1, i8 17)
- %2 = load float, float *%a2
- %3 = insertelement <4 x float> %1, float %2, i32 3
- ret <4 x float> %3
-}
-declare <4 x float> @llvm.x86.sse41.insertps(<4 x float>, <4 x float>, i8) nounwind readnone
-
-define <2 x i64> @test_movntdqa(i8* %a0) {
-; GENERIC-LABEL: test_movntdqa:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movntdqa (%rdi), %xmm0 # sched: [6:0.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_movntdqa:
-; SLM: # %bb.0:
-; SLM-NEXT: movntdqa (%rdi), %xmm0 # sched: [3:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_movntdqa:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: movntdqa (%rdi), %xmm0 # sched: [6:0.50]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_movntdqa:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vmovntdqa (%rdi), %xmm0 # sched: [6:0.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_movntdqa:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: movntdqa (%rdi), %xmm0 # sched: [6:0.50]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_movntdqa:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vmovntdqa (%rdi), %xmm0 # sched: [6:0.50]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_movntdqa:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: movntdqa (%rdi), %xmm0 # sched: [5:0.50]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_movntdqa:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vmovntdqa (%rdi), %xmm0 # sched: [5:0.50]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_movntdqa:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: movntdqa (%rdi), %xmm0 # sched: [6:0.50]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_movntdqa:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vmovntdqa (%rdi), %xmm0 # sched: [6:0.50]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_movntdqa:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: movntdqa (%rdi), %xmm0 # sched: [6:0.50]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_movntdqa:
-; SKX: # %bb.0:
-; SKX-NEXT: vmovntdqa (%rdi), %xmm0 # sched: [6:0.50]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_movntdqa:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: movntdqa (%rdi), %xmm0 # sched: [5:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_movntdqa:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vmovntdqa (%rdi), %xmm0 # sched: [5:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_movntdqa:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: movntdqa (%rdi), %xmm0 # sched: [5:1.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_movntdqa:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vmovntdqa (%rdi), %xmm0 # sched: [5:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_movntdqa:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: movntdqa (%rdi), %xmm0 # sched: [8:0.50]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_movntdqa:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vmovntdqa (%rdi), %xmm0 # sched: [8:0.50]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call <2 x i64> @llvm.x86.sse41.movntdqa(i8* %a0)
- ret <2 x i64> %1
-}
-declare <2 x i64> @llvm.x86.sse41.movntdqa(i8*) nounwind readnone
-
-define <8 x i16> @test_mpsadbw(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> *%a2) {
-; GENERIC-LABEL: test_mpsadbw:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: mpsadbw $7, %xmm1, %xmm0 # sched: [7:1.00]
-; GENERIC-NEXT: mpsadbw $7, (%rdi), %xmm0 # sched: [13:1.00]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_mpsadbw:
-; SLM: # %bb.0:
-; SLM-NEXT: mpsadbw $7, %xmm1, %xmm0 # sched: [7:1.00]
-; SLM-NEXT: mpsadbw $7, (%rdi), %xmm0 # sched: [10:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_mpsadbw:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: mpsadbw $7, %xmm1, %xmm0 # sched: [7:1.00]
-; SANDY-SSE-NEXT: mpsadbw $7, (%rdi), %xmm0 # sched: [13:1.00]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_mpsadbw:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vmpsadbw $7, %xmm1, %xmm0, %xmm0 # sched: [7:1.00]
-; SANDY-NEXT: vmpsadbw $7, (%rdi), %xmm0, %xmm0 # sched: [13:1.00]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_mpsadbw:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: mpsadbw $7, %xmm1, %xmm0 # sched: [7:2.00]
-; HASWELL-SSE-NEXT: mpsadbw $7, (%rdi), %xmm0 # sched: [13:2.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_mpsadbw:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vmpsadbw $7, %xmm1, %xmm0, %xmm0 # sched: [7:2.00]
-; HASWELL-NEXT: vmpsadbw $7, (%rdi), %xmm0, %xmm0 # sched: [13:2.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_mpsadbw:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: mpsadbw $7, %xmm1, %xmm0 # sched: [7:2.00]
-; BROADWELL-SSE-NEXT: mpsadbw $7, (%rdi), %xmm0 # sched: [12:2.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_mpsadbw:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vmpsadbw $7, %xmm1, %xmm0, %xmm0 # sched: [7:2.00]
-; BROADWELL-NEXT: vmpsadbw $7, (%rdi), %xmm0, %xmm0 # sched: [12:2.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_mpsadbw:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: mpsadbw $7, %xmm1, %xmm0 # sched: [4:2.00]
-; SKYLAKE-SSE-NEXT: mpsadbw $7, (%rdi), %xmm0 # sched: [10:2.00]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_mpsadbw:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vmpsadbw $7, %xmm1, %xmm0, %xmm0 # sched: [4:2.00]
-; SKYLAKE-NEXT: vmpsadbw $7, (%rdi), %xmm0, %xmm0 # sched: [10:2.00]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_mpsadbw:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: mpsadbw $7, %xmm1, %xmm0 # sched: [4:2.00]
-; SKX-SSE-NEXT: mpsadbw $7, (%rdi), %xmm0 # sched: [10:2.00]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_mpsadbw:
-; SKX: # %bb.0:
-; SKX-NEXT: vmpsadbw $7, %xmm1, %xmm0, %xmm0 # sched: [4:2.00]
-; SKX-NEXT: vmpsadbw $7, (%rdi), %xmm0, %xmm0 # sched: [10:2.00]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_mpsadbw:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: mpsadbw $7, %xmm1, %xmm0 # sched: [9:2.00]
-; BDVER2-SSE-NEXT: mpsadbw $7, (%rdi), %xmm0 # sched: [14:2.00]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_mpsadbw:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vmpsadbw $7, %xmm1, %xmm0, %xmm0 # sched: [9:2.00]
-; BDVER2-NEXT: vmpsadbw $7, (%rdi), %xmm0, %xmm0 # sched: [14:2.00]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_mpsadbw:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: mpsadbw $7, %xmm1, %xmm0 # sched: [3:2.00]
-; BTVER2-SSE-NEXT: mpsadbw $7, (%rdi), %xmm0 # sched: [8:2.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_mpsadbw:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vmpsadbw $7, %xmm1, %xmm0, %xmm0 # sched: [3:2.00]
-; BTVER2-NEXT: vmpsadbw $7, (%rdi), %xmm0, %xmm0 # sched: [8:2.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_mpsadbw:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: mpsadbw $7, %xmm1, %xmm0 # sched: [100:0.25]
-; ZNVER1-SSE-NEXT: mpsadbw $7, (%rdi), %xmm0 # sched: [100:0.25]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_mpsadbw:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vmpsadbw $7, %xmm1, %xmm0, %xmm0 # sched: [100:0.25]
-; ZNVER1-NEXT: vmpsadbw $7, (%rdi), %xmm0, %xmm0 # sched: [100:0.25]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call <8 x i16> @llvm.x86.sse41.mpsadbw(<16 x i8> %a0, <16 x i8> %a1, i8 7)
- %2 = bitcast <8 x i16> %1 to <16 x i8>
- %3 = load <16 x i8>, <16 x i8> *%a2, align 16
- %4 = call <8 x i16> @llvm.x86.sse41.mpsadbw(<16 x i8> %2, <16 x i8> %3, i8 7)
- ret <8 x i16> %4
-}
-declare <8 x i16> @llvm.x86.sse41.mpsadbw(<16 x i8>, <16 x i8>, i8) nounwind readnone
-
-define <8 x i16> @test_packusdw(<4 x i32> %a0, <4 x i32> %a1, <4 x i32> *%a2) {
-; GENERIC-LABEL: test_packusdw:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: packusdw %xmm1, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: packusdw (%rdi), %xmm0 # sched: [7:0.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_packusdw:
-; SLM: # %bb.0:
-; SLM-NEXT: packusdw %xmm1, %xmm0 # sched: [1:1.00]
-; SLM-NEXT: packusdw (%rdi), %xmm0 # sched: [4:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_packusdw:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: packusdw %xmm1, %xmm0 # sched: [1:0.50]
-; SANDY-SSE-NEXT: packusdw (%rdi), %xmm0 # sched: [7:0.50]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_packusdw:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SANDY-NEXT: vpackusdw (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_packusdw:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: packusdw %xmm1, %xmm0 # sched: [1:1.00]
-; HASWELL-SSE-NEXT: packusdw (%rdi), %xmm0 # sched: [7:1.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_packusdw:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 # sched: [1:1.00]
-; HASWELL-NEXT: vpackusdw (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_packusdw:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: packusdw %xmm1, %xmm0 # sched: [1:1.00]
-; BROADWELL-SSE-NEXT: packusdw (%rdi), %xmm0 # sched: [6:1.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_packusdw:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 # sched: [1:1.00]
-; BROADWELL-NEXT: vpackusdw (%rdi), %xmm0, %xmm0 # sched: [6:1.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_packusdw:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: packusdw %xmm1, %xmm0 # sched: [1:1.00]
-; SKYLAKE-SSE-NEXT: packusdw (%rdi), %xmm0 # sched: [7:1.00]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_packusdw:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 # sched: [1:1.00]
-; SKYLAKE-NEXT: vpackusdw (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_packusdw:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: packusdw %xmm1, %xmm0 # sched: [1:1.00]
-; SKX-SSE-NEXT: packusdw (%rdi), %xmm0 # sched: [7:1.00]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_packusdw:
-; SKX: # %bb.0:
-; SKX-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 # sched: [1:1.00]
-; SKX-NEXT: vpackusdw (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_packusdw:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: packusdw %xmm1, %xmm0 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: packusdw (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_packusdw:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: vpackusdw (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_packusdw:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: packusdw %xmm1, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: packusdw (%rdi), %xmm0 # sched: [6:1.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_packusdw:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: vpackusdw (%rdi), %xmm0, %xmm0 # sched: [6:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_packusdw:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: packusdw %xmm1, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: packusdw (%rdi), %xmm0 # sched: [8:0.50]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_packusdw:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: vpackusdw (%rdi), %xmm0, %xmm0 # sched: [8:0.50]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call <8 x i16> @llvm.x86.sse41.packusdw(<4 x i32> %a0, <4 x i32> %a1)
- %2 = bitcast <8 x i16> %1 to <4 x i32>
- %3 = load <4 x i32>, <4 x i32> *%a2, align 16
- %4 = call <8 x i16> @llvm.x86.sse41.packusdw(<4 x i32> %2, <4 x i32> %3)
- ret <8 x i16> %4
-}
-declare <8 x i16> @llvm.x86.sse41.packusdw(<4 x i32>, <4 x i32>) nounwind readnone
-
-define <16 x i8> @test_pblendvb(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> %a2, <16 x i8> *%a3) {
-; GENERIC-LABEL: test_pblendvb:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movdqa %xmm0, %xmm3 # sched: [1:0.33]
-; GENERIC-NEXT: movaps %xmm2, %xmm0 # sched: [1:1.00]
-; GENERIC-NEXT: pblendvb %xmm0, %xmm1, %xmm3 # sched: [2:1.00]
-; GENERIC-NEXT: pblendvb %xmm0, (%rdi), %xmm3 # sched: [8:1.00]
-; GENERIC-NEXT: movdqa %xmm3, %xmm0 # sched: [1:0.33]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_pblendvb:
-; SLM: # %bb.0:
-; SLM-NEXT: movdqa %xmm0, %xmm3 # sched: [1:0.50]
-; SLM-NEXT: movaps %xmm2, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: pblendvb %xmm0, %xmm1, %xmm3 # sched: [1:1.00]
-; SLM-NEXT: pblendvb %xmm0, (%rdi), %xmm3 # sched: [4:1.00]
-; SLM-NEXT: movdqa %xmm3, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pblendvb:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: movdqa %xmm0, %xmm3 # sched: [1:0.33]
-; SANDY-SSE-NEXT: movaps %xmm2, %xmm0 # sched: [1:1.00]
-; SANDY-SSE-NEXT: pblendvb %xmm0, %xmm1, %xmm3 # sched: [2:1.00]
-; SANDY-SSE-NEXT: pblendvb %xmm0, (%rdi), %xmm3 # sched: [8:1.00]
-; SANDY-SSE-NEXT: movdqa %xmm3, %xmm0 # sched: [1:0.33]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pblendvb:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 # sched: [2:1.00]
-; SANDY-NEXT: vpblendvb %xmm2, (%rdi), %xmm0, %xmm0 # sched: [8:1.00]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pblendvb:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: movdqa %xmm0, %xmm3 # sched: [1:0.33]
-; HASWELL-SSE-NEXT: movaps %xmm2, %xmm0 # sched: [1:1.00]
-; HASWELL-SSE-NEXT: pblendvb %xmm0, %xmm1, %xmm3 # sched: [2:2.00]
-; HASWELL-SSE-NEXT: pblendvb %xmm0, (%rdi), %xmm3 # sched: [8:2.00]
-; HASWELL-SSE-NEXT: movdqa %xmm3, %xmm0 # sched: [1:0.33]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pblendvb:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 # sched: [2:2.00]
-; HASWELL-NEXT: vpblendvb %xmm2, (%rdi), %xmm0, %xmm0 # sched: [8:2.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pblendvb:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: movdqa %xmm0, %xmm3 # sched: [1:0.33]
-; BROADWELL-SSE-NEXT: movaps %xmm2, %xmm0 # sched: [1:1.00]
-; BROADWELL-SSE-NEXT: pblendvb %xmm0, %xmm1, %xmm3 # sched: [2:2.00]
-; BROADWELL-SSE-NEXT: pblendvb %xmm0, (%rdi), %xmm3 # sched: [7:2.00]
-; BROADWELL-SSE-NEXT: movdqa %xmm3, %xmm0 # sched: [1:0.33]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pblendvb:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 # sched: [2:2.00]
-; BROADWELL-NEXT: vpblendvb %xmm2, (%rdi), %xmm0, %xmm0 # sched: [7:2.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pblendvb:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: movdqa %xmm0, %xmm3 # sched: [1:0.33]
-; SKYLAKE-SSE-NEXT: movaps %xmm2, %xmm0 # sched: [1:0.33]
-; SKYLAKE-SSE-NEXT: pblendvb %xmm0, %xmm1, %xmm3 # sched: [2:0.67]
-; SKYLAKE-SSE-NEXT: pblendvb %xmm0, (%rdi), %xmm3 # sched: [8:0.67]
-; SKYLAKE-SSE-NEXT: movdqa %xmm3, %xmm0 # sched: [1:0.33]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pblendvb:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 # sched: [2:0.67]
-; SKYLAKE-NEXT: vpblendvb %xmm2, (%rdi), %xmm0, %xmm0 # sched: [8:0.67]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pblendvb:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: movdqa %xmm0, %xmm3 # sched: [1:0.33]
-; SKX-SSE-NEXT: movaps %xmm2, %xmm0 # sched: [1:0.33]
-; SKX-SSE-NEXT: pblendvb %xmm0, %xmm1, %xmm3 # sched: [2:0.67]
-; SKX-SSE-NEXT: pblendvb %xmm0, (%rdi), %xmm3 # sched: [8:0.67]
-; SKX-SSE-NEXT: movdqa %xmm3, %xmm0 # sched: [1:0.33]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pblendvb:
-; SKX: # %bb.0:
-; SKX-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 # sched: [2:0.67]
-; SKX-NEXT: vpblendvb %xmm2, (%rdi), %xmm0, %xmm0 # sched: [8:0.67]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pblendvb:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: movdqa %xmm0, %xmm3 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: movaps %xmm2, %xmm0 # sched: [1:0.50]
-; BDVER2-SSE-NEXT: pblendvb %xmm0, %xmm1, %xmm3 # sched: [2:2.00]
-; BDVER2-SSE-NEXT: pblendvb %xmm0, (%rdi), %xmm3 # sched: [7:2.00]
-; BDVER2-SSE-NEXT: movdqa %xmm3, %xmm0 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pblendvb:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 # sched: [2:2.00]
-; BDVER2-NEXT: vpblendvb %xmm2, (%rdi), %xmm0, %xmm0 # sched: [7:2.00]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pblendvb:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: movdqa %xmm0, %xmm3 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: movaps %xmm2, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: pblendvb %xmm0, %xmm1, %xmm3 # sched: [2:2.00]
-; BTVER2-SSE-NEXT: pblendvb %xmm0, (%rdi), %xmm3 # sched: [7:2.00]
-; BTVER2-SSE-NEXT: movdqa %xmm3, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pblendvb:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 # sched: [2:2.00]
-; BTVER2-NEXT: vpblendvb %xmm2, (%rdi), %xmm0, %xmm0 # sched: [7:2.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pblendvb:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: movdqa %xmm0, %xmm3 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: movaps %xmm2, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: pblendvb %xmm0, %xmm1, %xmm3 # sched: [1:1.00]
-; ZNVER1-SSE-NEXT: pblendvb %xmm0, (%rdi), %xmm3 # sched: [8:1.00]
-; ZNVER1-SSE-NEXT: movdqa %xmm3, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pblendvb:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 # sched: [1:1.00]
-; ZNVER1-NEXT: vpblendvb %xmm2, (%rdi), %xmm0, %xmm0 # sched: [8:1.00]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call <16 x i8> @llvm.x86.sse41.pblendvb(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> %a2)
- %2 = load <16 x i8>, <16 x i8> *%a3, align 16
- %3 = call <16 x i8> @llvm.x86.sse41.pblendvb(<16 x i8> %1, <16 x i8> %2, <16 x i8> %a2)
- ret <16 x i8> %3
-}
-declare <16 x i8> @llvm.x86.sse41.pblendvb(<16 x i8>, <16 x i8>, <16 x i8>) nounwind readnone
-
-define <8 x i16> @test_pblendw(<8 x i16> %a0, <8 x i16> %a1, <8 x i16> *%a2) {
-; GENERIC-LABEL: test_pblendw:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] sched: [1:0.50]
-; GENERIC-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1],mem[2,3],xmm1[4,5,6],mem[7] sched: [7:0.50]
-; GENERIC-NEXT: paddw %xmm1, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_pblendw:
-; SLM: # %bb.0:
-; SLM-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] sched: [1:1.00]
-; SLM-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1],mem[2,3],xmm1[4,5,6],mem[7] sched: [4:1.00]
-; SLM-NEXT: paddw %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pblendw:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] sched: [1:0.50]
-; SANDY-SSE-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1],mem[2,3],xmm1[4,5,6],mem[7] sched: [7:0.50]
-; SANDY-SSE-NEXT: paddw %xmm1, %xmm0 # sched: [1:0.50]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pblendw:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] sched: [1:0.50]
-; SANDY-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],mem[2,3],xmm1[4,5,6],mem[7] sched: [7:0.50]
-; SANDY-NEXT: vpaddw %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pblendw:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] sched: [1:1.00]
-; HASWELL-SSE-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1],mem[2,3],xmm1[4,5,6],mem[7] sched: [7:1.00]
-; HASWELL-SSE-NEXT: paddw %xmm1, %xmm0 # sched: [1:0.50]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pblendw:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] sched: [1:1.00]
-; HASWELL-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],mem[2,3],xmm1[4,5,6],mem[7] sched: [7:1.00]
-; HASWELL-NEXT: vpaddw %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pblendw:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] sched: [1:1.00]
-; BROADWELL-SSE-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1],mem[2,3],xmm1[4,5,6],mem[7] sched: [6:1.00]
-; BROADWELL-SSE-NEXT: paddw %xmm1, %xmm0 # sched: [1:0.50]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pblendw:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] sched: [1:1.00]
-; BROADWELL-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],mem[2,3],xmm1[4,5,6],mem[7] sched: [6:1.00]
-; BROADWELL-NEXT: vpaddw %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pblendw:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] sched: [1:1.00]
-; SKYLAKE-SSE-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1],mem[2,3],xmm1[4,5,6],mem[7] sched: [7:1.00]
-; SKYLAKE-SSE-NEXT: paddw %xmm1, %xmm0 # sched: [1:0.33]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pblendw:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] sched: [1:1.00]
-; SKYLAKE-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],mem[2,3],xmm1[4,5,6],mem[7] sched: [7:1.00]
-; SKYLAKE-NEXT: vpaddw %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pblendw:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] sched: [1:1.00]
-; SKX-SSE-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1],mem[2,3],xmm1[4,5,6],mem[7] sched: [7:1.00]
-; SKX-SSE-NEXT: paddw %xmm1, %xmm0 # sched: [1:0.33]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pblendw:
-; SKX: # %bb.0:
-; SKX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] sched: [1:1.00]
-; SKX-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],mem[2,3],xmm1[4,5,6],mem[7] sched: [7:1.00]
-; SKX-NEXT: vpaddw %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pblendw:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] sched: [2:0.50]
-; BDVER2-SSE-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1],mem[2,3],xmm1[4,5,6],mem[7] sched: [7:0.50]
-; BDVER2-SSE-NEXT: paddw %xmm1, %xmm0 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pblendw:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] sched: [2:0.50]
-; BDVER2-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],mem[2,3],xmm1[4,5,6],mem[7] sched: [7:0.50]
-; BDVER2-NEXT: vpaddw %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pblendw:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] sched: [1:0.50]
-; BTVER2-SSE-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1],mem[2,3],xmm1[4,5,6],mem[7] sched: [6:1.00]
-; BTVER2-SSE-NEXT: paddw %xmm1, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pblendw:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] sched: [1:0.50]
-; BTVER2-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],mem[2,3],xmm1[4,5,6],mem[7] sched: [6:1.00]
-; BTVER2-NEXT: vpaddw %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pblendw:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] sched: [1:0.33]
-; ZNVER1-SSE-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1],mem[2,3],xmm1[4,5,6],mem[7] sched: [8:0.50]
-; ZNVER1-SSE-NEXT: paddw %xmm1, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pblendw:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] sched: [1:0.33]
-; ZNVER1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],mem[2,3],xmm1[4,5,6],mem[7] sched: [8:0.50]
-; ZNVER1-NEXT: vpaddw %xmm1, %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = shufflevector <8 x i16> %a0, <8 x i16> %a1, <8 x i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>
- %2 = load <8 x i16>, <8 x i16> *%a2, align 16
- %3 = shufflevector <8 x i16> %a1, <8 x i16> %2, <8 x i32> <i32 0, i32 1, i32 10, i32 11, i32 4, i32 5, i32 6, i32 15>
- %4 = add <8 x i16> %1, %3
- ret <8 x i16> %4
-}
-
-define <2 x i64> @test_pcmpeqq(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> *%a2) {
-; GENERIC-LABEL: test_pcmpeqq:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pcmpeqq %xmm1, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: pcmpeqq (%rdi), %xmm0 # sched: [7:0.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_pcmpeqq:
-; SLM: # %bb.0:
-; SLM-NEXT: pcmpeqq %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: pcmpeqq (%rdi), %xmm0 # sched: [4:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pcmpeqq:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pcmpeqq %xmm1, %xmm0 # sched: [1:0.50]
-; SANDY-SSE-NEXT: pcmpeqq (%rdi), %xmm0 # sched: [7:0.50]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pcmpeqq:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpcmpeqq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SANDY-NEXT: vpcmpeqq (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pcmpeqq:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pcmpeqq %xmm1, %xmm0 # sched: [1:0.50]
-; HASWELL-SSE-NEXT: pcmpeqq (%rdi), %xmm0 # sched: [7:0.50]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pcmpeqq:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpcmpeqq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; HASWELL-NEXT: vpcmpeqq (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pcmpeqq:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pcmpeqq %xmm1, %xmm0 # sched: [1:0.50]
-; BROADWELL-SSE-NEXT: pcmpeqq (%rdi), %xmm0 # sched: [6:0.50]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pcmpeqq:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpcmpeqq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BROADWELL-NEXT: vpcmpeqq (%rdi), %xmm0, %xmm0 # sched: [6:0.50]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pcmpeqq:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pcmpeqq %xmm1, %xmm0 # sched: [1:0.50]
-; SKYLAKE-SSE-NEXT: pcmpeqq (%rdi), %xmm0 # sched: [7:0.50]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pcmpeqq:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpcmpeqq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SKYLAKE-NEXT: vpcmpeqq (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pcmpeqq:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pcmpeqq %xmm1, %xmm0 # sched: [1:0.50]
-; SKX-SSE-NEXT: pcmpeqq (%rdi), %xmm0 # sched: [7:0.50]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pcmpeqq:
-; SKX: # %bb.0:
-; SKX-NEXT: vpcmpeqq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SKX-NEXT: vpcmpeqq (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pcmpeqq:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pcmpeqq %xmm1, %xmm0 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: pcmpeqq (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pcmpeqq:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpcmpeqq %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: vpcmpeqq (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pcmpeqq:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pcmpeqq %xmm1, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: pcmpeqq (%rdi), %xmm0 # sched: [6:1.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pcmpeqq:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpcmpeqq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: vpcmpeqq (%rdi), %xmm0, %xmm0 # sched: [6:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pcmpeqq:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pcmpeqq %xmm1, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: pcmpeqq (%rdi), %xmm0 # sched: [8:0.50]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pcmpeqq:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpcmpeqq %xmm1, %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: vpcmpeqq (%rdi), %xmm0, %xmm0 # sched: [8:0.50]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = icmp eq <2 x i64> %a0, %a1
- %2 = sext <2 x i1> %1 to <2 x i64>
- %3 = load <2 x i64>, <2 x i64>*%a2, align 16
- %4 = icmp eq <2 x i64> %2, %3
- %5 = sext <2 x i1> %4 to <2 x i64>
- ret <2 x i64> %5
-}
-
-define i32 @test_pextrb(<16 x i8> %a0, i8 *%a1) {
-; GENERIC-LABEL: test_pextrb:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pextrb $3, %xmm0, %eax # sched: [3:1.00]
-; GENERIC-NEXT: pextrb $1, %xmm0, (%rdi) # sched: [5:1.00]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_pextrb:
-; SLM: # %bb.0:
-; SLM-NEXT: pextrb $3, %xmm0, %eax # sched: [1:1.00]
-; SLM-NEXT: pextrb $1, %xmm0, (%rdi) # sched: [4:2.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pextrb:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pextrb $3, %xmm0, %eax # sched: [3:1.00]
-; SANDY-SSE-NEXT: pextrb $1, %xmm0, (%rdi) # sched: [5:1.00]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pextrb:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpextrb $3, %xmm0, %eax # sched: [3:1.00]
-; SANDY-NEXT: vpextrb $1, %xmm0, (%rdi) # sched: [5:1.00]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pextrb:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pextrb $3, %xmm0, %eax # sched: [2:1.00]
-; HASWELL-SSE-NEXT: pextrb $1, %xmm0, (%rdi) # sched: [2:1.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pextrb:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpextrb $3, %xmm0, %eax # sched: [2:1.00]
-; HASWELL-NEXT: vpextrb $1, %xmm0, (%rdi) # sched: [2:1.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pextrb:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pextrb $3, %xmm0, %eax # sched: [2:1.00]
-; BROADWELL-SSE-NEXT: pextrb $1, %xmm0, (%rdi) # sched: [2:1.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pextrb:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpextrb $3, %xmm0, %eax # sched: [2:1.00]
-; BROADWELL-NEXT: vpextrb $1, %xmm0, (%rdi) # sched: [2:1.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pextrb:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pextrb $3, %xmm0, %eax # sched: [3:1.00]
-; SKYLAKE-SSE-NEXT: pextrb $1, %xmm0, (%rdi) # sched: [2:1.00]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pextrb:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpextrb $3, %xmm0, %eax # sched: [3:1.00]
-; SKYLAKE-NEXT: vpextrb $1, %xmm0, (%rdi) # sched: [2:1.00]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pextrb:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pextrb $3, %xmm0, %eax # sched: [3:1.00]
-; SKX-SSE-NEXT: pextrb $1, %xmm0, (%rdi) # sched: [2:1.00]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pextrb:
-; SKX: # %bb.0:
-; SKX-NEXT: vpextrb $3, %xmm0, %eax # sched: [3:1.00]
-; SKX-NEXT: vpextrb $1, %xmm0, (%rdi) # sched: [2:1.00]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pextrb:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pextrb $3, %xmm0, %eax # sched: [13:1.00]
-; BDVER2-SSE-NEXT: pextrb $1, %xmm0, (%rdi) # sched: [13:1.00]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pextrb:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpextrb $3, %xmm0, %eax # sched: [13:1.00]
-; BDVER2-NEXT: vpextrb $1, %xmm0, (%rdi) # sched: [13:1.00]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pextrb:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pextrb $3, %xmm0, %eax # sched: [3:1.00]
-; BTVER2-SSE-NEXT: pextrb $1, %xmm0, (%rdi) # sched: [3:1.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pextrb:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpextrb $3, %xmm0, %eax # sched: [3:1.00]
-; BTVER2-NEXT: vpextrb $1, %xmm0, (%rdi) # sched: [3:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pextrb:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pextrb $3, %xmm0, %eax # sched: [2:2.00]
-; ZNVER1-SSE-NEXT: pextrb $1, %xmm0, (%rdi) # sched: [5:3.00]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pextrb:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpextrb $3, %xmm0, %eax # sched: [2:2.00]
-; ZNVER1-NEXT: vpextrb $1, %xmm0, (%rdi) # sched: [5:3.00]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = extractelement <16 x i8> %a0, i32 3
- %2 = extractelement <16 x i8> %a0, i32 1
- store i8 %2, i8 *%a1
- %3 = zext i8 %1 to i32
- ret i32 %3
-}
-
-define i32 @test_pextrd(<4 x i32> %a0, i32 *%a1) {
-; GENERIC-LABEL: test_pextrd:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: paddd %xmm0, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: pextrd $3, %xmm0, %eax # sched: [3:1.00]
-; GENERIC-NEXT: pextrd $1, %xmm0, (%rdi) # sched: [5:1.00]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_pextrd:
-; SLM: # %bb.0:
-; SLM-NEXT: paddd %xmm0, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: pextrd $3, %xmm0, %eax # sched: [1:1.00]
-; SLM-NEXT: pextrd $1, %xmm0, (%rdi) # sched: [4:2.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pextrd:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: paddd %xmm0, %xmm0 # sched: [1:0.50]
-; SANDY-SSE-NEXT: pextrd $3, %xmm0, %eax # sched: [3:1.00]
-; SANDY-SSE-NEXT: pextrd $1, %xmm0, (%rdi) # sched: [5:1.00]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pextrd:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpaddd %xmm0, %xmm0, %xmm0 # sched: [1:0.50]
-; SANDY-NEXT: vpextrd $3, %xmm0, %eax # sched: [3:1.00]
-; SANDY-NEXT: vpextrd $1, %xmm0, (%rdi) # sched: [5:1.00]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pextrd:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: paddd %xmm0, %xmm0 # sched: [1:0.50]
-; HASWELL-SSE-NEXT: pextrd $3, %xmm0, %eax # sched: [2:1.00]
-; HASWELL-SSE-NEXT: pextrd $1, %xmm0, (%rdi) # sched: [2:1.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pextrd:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpaddd %xmm0, %xmm0, %xmm0 # sched: [1:0.50]
-; HASWELL-NEXT: vpextrd $3, %xmm0, %eax # sched: [2:1.00]
-; HASWELL-NEXT: vpextrd $1, %xmm0, (%rdi) # sched: [2:1.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pextrd:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: paddd %xmm0, %xmm0 # sched: [1:0.50]
-; BROADWELL-SSE-NEXT: pextrd $3, %xmm0, %eax # sched: [2:1.00]
-; BROADWELL-SSE-NEXT: pextrd $1, %xmm0, (%rdi) # sched: [2:1.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pextrd:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpaddd %xmm0, %xmm0, %xmm0 # sched: [1:0.50]
-; BROADWELL-NEXT: vpextrd $3, %xmm0, %eax # sched: [2:1.00]
-; BROADWELL-NEXT: vpextrd $1, %xmm0, (%rdi) # sched: [2:1.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pextrd:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: paddd %xmm0, %xmm0 # sched: [1:0.33]
-; SKYLAKE-SSE-NEXT: pextrd $3, %xmm0, %eax # sched: [3:1.00]
-; SKYLAKE-SSE-NEXT: pextrd $1, %xmm0, (%rdi) # sched: [2:1.00]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pextrd:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpaddd %xmm0, %xmm0, %xmm0 # sched: [1:0.33]
-; SKYLAKE-NEXT: vpextrd $3, %xmm0, %eax # sched: [3:1.00]
-; SKYLAKE-NEXT: vpextrd $1, %xmm0, (%rdi) # sched: [2:1.00]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pextrd:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: paddd %xmm0, %xmm0 # sched: [1:0.33]
-; SKX-SSE-NEXT: pextrd $3, %xmm0, %eax # sched: [3:1.00]
-; SKX-SSE-NEXT: pextrd $1, %xmm0, (%rdi) # sched: [2:1.00]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pextrd:
-; SKX: # %bb.0:
-; SKX-NEXT: vpaddd %xmm0, %xmm0, %xmm0 # sched: [1:0.33]
-; SKX-NEXT: vpextrd $3, %xmm0, %eax # sched: [3:1.00]
-; SKX-NEXT: vpextrd $1, %xmm0, (%rdi) # sched: [2:1.00]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pextrd:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: paddd %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: pextrd $3, %xmm0, %eax # sched: [13:1.00]
-; BDVER2-SSE-NEXT: pextrd $1, %xmm0, (%rdi) # sched: [13:1.00]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pextrd:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpaddd %xmm0, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: vpextrd $3, %xmm0, %eax # sched: [13:1.00]
-; BDVER2-NEXT: vpextrd $1, %xmm0, (%rdi) # sched: [13:1.00]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pextrd:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: paddd %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: pextrd $3, %xmm0, %eax # sched: [3:1.00]
-; BTVER2-SSE-NEXT: pextrd $1, %xmm0, (%rdi) # sched: [3:1.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pextrd:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpaddd %xmm0, %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: vpextrd $3, %xmm0, %eax # sched: [3:1.00]
-; BTVER2-NEXT: vpextrd $1, %xmm0, (%rdi) # sched: [3:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pextrd:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: paddd %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: pextrd $3, %xmm0, %eax # sched: [2:2.00]
-; ZNVER1-SSE-NEXT: pextrd $1, %xmm0, (%rdi) # sched: [5:3.00]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pextrd:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpaddd %xmm0, %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: vpextrd $3, %xmm0, %eax # sched: [2:2.00]
-; ZNVER1-NEXT: vpextrd $1, %xmm0, (%rdi) # sched: [5:3.00]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = add <4 x i32> %a0, %a0
- %2 = extractelement <4 x i32> %1, i32 3
- %3 = extractelement <4 x i32> %1, i32 1
- store i32 %3, i32 *%a1
- ret i32 %2
-}
-
-define i64 @test_pextrq(<2 x i64> %a0, <2 x i64> %a1, i64 *%a2) {
-; GENERIC-LABEL: test_pextrq:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pextrq $1, %xmm0, %rax # sched: [3:1.00]
-; GENERIC-NEXT: pextrq $1, %xmm0, (%rdi) # sched: [5:1.00]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_pextrq:
-; SLM: # %bb.0:
-; SLM-NEXT: pextrq $1, %xmm0, %rax # sched: [1:1.00]
-; SLM-NEXT: pextrq $1, %xmm0, (%rdi) # sched: [4:2.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pextrq:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pextrq $1, %xmm0, %rax # sched: [3:1.00]
-; SANDY-SSE-NEXT: pextrq $1, %xmm0, (%rdi) # sched: [5:1.00]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pextrq:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpextrq $1, %xmm0, %rax # sched: [3:1.00]
-; SANDY-NEXT: vpextrq $1, %xmm0, (%rdi) # sched: [5:1.00]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pextrq:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pextrq $1, %xmm0, %rax # sched: [2:1.00]
-; HASWELL-SSE-NEXT: pextrq $1, %xmm0, (%rdi) # sched: [2:1.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pextrq:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpextrq $1, %xmm0, %rax # sched: [2:1.00]
-; HASWELL-NEXT: vpextrq $1, %xmm0, (%rdi) # sched: [2:1.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pextrq:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pextrq $1, %xmm0, %rax # sched: [2:1.00]
-; BROADWELL-SSE-NEXT: pextrq $1, %xmm0, (%rdi) # sched: [2:1.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pextrq:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpextrq $1, %xmm0, %rax # sched: [2:1.00]
-; BROADWELL-NEXT: vpextrq $1, %xmm0, (%rdi) # sched: [2:1.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pextrq:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pextrq $1, %xmm0, %rax # sched: [3:1.00]
-; SKYLAKE-SSE-NEXT: pextrq $1, %xmm0, (%rdi) # sched: [2:1.00]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pextrq:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpextrq $1, %xmm0, %rax # sched: [3:1.00]
-; SKYLAKE-NEXT: vpextrq $1, %xmm0, (%rdi) # sched: [2:1.00]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pextrq:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pextrq $1, %xmm0, %rax # sched: [3:1.00]
-; SKX-SSE-NEXT: pextrq $1, %xmm0, (%rdi) # sched: [2:1.00]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pextrq:
-; SKX: # %bb.0:
-; SKX-NEXT: vpextrq $1, %xmm0, %rax # sched: [3:1.00]
-; SKX-NEXT: vpextrq $1, %xmm0, (%rdi) # sched: [2:1.00]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pextrq:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pextrq $1, %xmm0, %rax # sched: [13:1.00]
-; BDVER2-SSE-NEXT: pextrq $1, %xmm0, (%rdi) # sched: [13:1.00]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pextrq:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpextrq $1, %xmm0, %rax # sched: [13:1.00]
-; BDVER2-NEXT: vpextrq $1, %xmm0, (%rdi) # sched: [13:1.00]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pextrq:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pextrq $1, %xmm0, %rax # sched: [3:1.00]
-; BTVER2-SSE-NEXT: pextrq $1, %xmm0, (%rdi) # sched: [3:1.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pextrq:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpextrq $1, %xmm0, %rax # sched: [3:1.00]
-; BTVER2-NEXT: vpextrq $1, %xmm0, (%rdi) # sched: [3:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pextrq:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pextrq $1, %xmm0, %rax # sched: [2:2.00]
-; ZNVER1-SSE-NEXT: pextrq $1, %xmm0, (%rdi) # sched: [5:3.00]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pextrq:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpextrq $1, %xmm0, %rax # sched: [2:2.00]
-; ZNVER1-NEXT: vpextrq $1, %xmm0, (%rdi) # sched: [5:3.00]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = extractelement <2 x i64> %a0, i32 1
- %2 = extractelement <2 x i64> %a0, i32 1
- store i64 %2, i64 *%a2
- ret i64 %1
-}
-
-define i32 @test_pextrw(<8 x i16> %a0, i16 *%a1) {
-; GENERIC-LABEL: test_pextrw:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pextrw $3, %xmm0, %eax # sched: [3:1.00]
-; GENERIC-NEXT: pextrw $1, %xmm0, (%rdi) # sched: [5:1.00]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_pextrw:
-; SLM: # %bb.0:
-; SLM-NEXT: pextrw $3, %xmm0, %eax # sched: [1:1.00]
-; SLM-NEXT: pextrw $1, %xmm0, (%rdi) # sched: [4:2.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pextrw:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pextrw $3, %xmm0, %eax # sched: [3:1.00]
-; SANDY-SSE-NEXT: pextrw $1, %xmm0, (%rdi) # sched: [5:1.00]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pextrw:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpextrw $3, %xmm0, %eax # sched: [3:1.00]
-; SANDY-NEXT: vpextrw $1, %xmm0, (%rdi) # sched: [5:1.00]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pextrw:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pextrw $3, %xmm0, %eax # sched: [2:1.00]
-; HASWELL-SSE-NEXT: pextrw $1, %xmm0, (%rdi) # sched: [2:1.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pextrw:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpextrw $3, %xmm0, %eax # sched: [2:1.00]
-; HASWELL-NEXT: vpextrw $1, %xmm0, (%rdi) # sched: [2:1.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pextrw:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pextrw $3, %xmm0, %eax # sched: [2:1.00]
-; BROADWELL-SSE-NEXT: pextrw $1, %xmm0, (%rdi) # sched: [2:1.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pextrw:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpextrw $3, %xmm0, %eax # sched: [2:1.00]
-; BROADWELL-NEXT: vpextrw $1, %xmm0, (%rdi) # sched: [2:1.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pextrw:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pextrw $3, %xmm0, %eax # sched: [3:1.00]
-; SKYLAKE-SSE-NEXT: pextrw $1, %xmm0, (%rdi) # sched: [2:1.00]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pextrw:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpextrw $3, %xmm0, %eax # sched: [3:1.00]
-; SKYLAKE-NEXT: vpextrw $1, %xmm0, (%rdi) # sched: [2:1.00]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pextrw:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pextrw $3, %xmm0, %eax # sched: [3:1.00]
-; SKX-SSE-NEXT: pextrw $1, %xmm0, (%rdi) # sched: [2:1.00]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pextrw:
-; SKX: # %bb.0:
-; SKX-NEXT: vpextrw $3, %xmm0, %eax # sched: [3:1.00]
-; SKX-NEXT: vpextrw $1, %xmm0, (%rdi) # sched: [2:1.00]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pextrw:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pextrw $3, %xmm0, %eax # sched: [13:1.00]
-; BDVER2-SSE-NEXT: pextrw $1, %xmm0, (%rdi) # sched: [13:1.00]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pextrw:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpextrw $3, %xmm0, %eax # sched: [13:1.00]
-; BDVER2-NEXT: vpextrw $1, %xmm0, (%rdi) # sched: [13:1.00]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pextrw:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pextrw $3, %xmm0, %eax # sched: [3:1.00]
-; BTVER2-SSE-NEXT: pextrw $1, %xmm0, (%rdi) # sched: [3:1.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pextrw:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpextrw $3, %xmm0, %eax # sched: [3:1.00]
-; BTVER2-NEXT: vpextrw $1, %xmm0, (%rdi) # sched: [3:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pextrw:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pextrw $3, %xmm0, %eax # sched: [2:2.00]
-; ZNVER1-SSE-NEXT: pextrw $1, %xmm0, (%rdi) # sched: [5:3.00]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pextrw:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpextrw $3, %xmm0, %eax # sched: [2:2.00]
-; ZNVER1-NEXT: vpextrw $1, %xmm0, (%rdi) # sched: [5:3.00]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = extractelement <8 x i16> %a0, i32 3
- %2 = extractelement <8 x i16> %a0, i32 1
- store i16 %2, i16 *%a1
- %3 = zext i16 %1 to i32
- ret i32 %3
-}
-
-define <8 x i16> @test_phminposuw(<8 x i16> *%a0) {
-; GENERIC-LABEL: test_phminposuw:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: phminposuw (%rdi), %xmm0 # sched: [11:1.00]
-; GENERIC-NEXT: phminposuw %xmm0, %xmm0 # sched: [5:1.00]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_phminposuw:
-; SLM: # %bb.0:
-; SLM-NEXT: phminposuw (%rdi), %xmm0 # sched: [7:1.00]
-; SLM-NEXT: phminposuw %xmm0, %xmm0 # sched: [4:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_phminposuw:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: phminposuw (%rdi), %xmm0 # sched: [11:1.00]
-; SANDY-SSE-NEXT: phminposuw %xmm0, %xmm0 # sched: [5:1.00]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_phminposuw:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vphminposuw (%rdi), %xmm0 # sched: [11:1.00]
-; SANDY-NEXT: vphminposuw %xmm0, %xmm0 # sched: [5:1.00]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_phminposuw:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: phminposuw (%rdi), %xmm0 # sched: [11:1.00]
-; HASWELL-SSE-NEXT: phminposuw %xmm0, %xmm0 # sched: [5:1.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_phminposuw:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vphminposuw (%rdi), %xmm0 # sched: [11:1.00]
-; HASWELL-NEXT: vphminposuw %xmm0, %xmm0 # sched: [5:1.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_phminposuw:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: phminposuw (%rdi), %xmm0 # sched: [10:1.00]
-; BROADWELL-SSE-NEXT: phminposuw %xmm0, %xmm0 # sched: [5:1.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_phminposuw:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vphminposuw (%rdi), %xmm0 # sched: [10:1.00]
-; BROADWELL-NEXT: vphminposuw %xmm0, %xmm0 # sched: [5:1.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_phminposuw:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: phminposuw (%rdi), %xmm0 # sched: [10:0.50]
-; SKYLAKE-SSE-NEXT: phminposuw %xmm0, %xmm0 # sched: [4:0.50]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_phminposuw:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vphminposuw (%rdi), %xmm0 # sched: [10:0.50]
-; SKYLAKE-NEXT: vphminposuw %xmm0, %xmm0 # sched: [4:0.50]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_phminposuw:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: phminposuw (%rdi), %xmm0 # sched: [10:1.00]
-; SKX-SSE-NEXT: phminposuw %xmm0, %xmm0 # sched: [4:1.00]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_phminposuw:
-; SKX: # %bb.0:
-; SKX-NEXT: vphminposuw (%rdi), %xmm0 # sched: [10:1.00]
-; SKX-NEXT: vphminposuw %xmm0, %xmm0 # sched: [4:1.00]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_phminposuw:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: phminposuw (%rdi), %xmm0 # sched: [9:1.00]
-; BDVER2-SSE-NEXT: phminposuw %xmm0, %xmm0 # sched: [4:1.00]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_phminposuw:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vphminposuw (%rdi), %xmm0 # sched: [9:1.00]
-; BDVER2-NEXT: vphminposuw %xmm0, %xmm0 # sched: [4:1.00]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_phminposuw:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: phminposuw (%rdi), %xmm0 # sched: [7:1.00]
-; BTVER2-SSE-NEXT: phminposuw %xmm0, %xmm0 # sched: [2:0.50]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_phminposuw:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vphminposuw (%rdi), %xmm0 # sched: [7:1.00]
-; BTVER2-NEXT: vphminposuw %xmm0, %xmm0 # sched: [2:0.50]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_phminposuw:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: phminposuw (%rdi), %xmm0 # sched: [11:1.00]
-; ZNVER1-SSE-NEXT: phminposuw %xmm0, %xmm0 # sched: [4:1.00]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_phminposuw:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vphminposuw (%rdi), %xmm0 # sched: [11:1.00]
-; ZNVER1-NEXT: vphminposuw %xmm0, %xmm0 # sched: [4:1.00]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = load <8 x i16>, <8 x i16> *%a0, align 16
- %2 = call <8 x i16> @llvm.x86.sse41.phminposuw(<8 x i16> %1)
- %3 = call <8 x i16> @llvm.x86.sse41.phminposuw(<8 x i16> %2)
- ret <8 x i16> %3
-}
-declare <8 x i16> @llvm.x86.sse41.phminposuw(<8 x i16>) nounwind readnone
-
-define <16 x i8> @test_pinsrb(<16 x i8> %a0, i8 %a1, i8 *%a2) {
-; GENERIC-LABEL: test_pinsrb:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pinsrb $1, %edi, %xmm0 # sched: [2:1.00]
-; GENERIC-NEXT: pinsrb $3, (%rsi), %xmm0 # sched: [7:0.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_pinsrb:
-; SLM: # %bb.0:
-; SLM-NEXT: pinsrb $1, %edi, %xmm0 # sched: [1:1.00]
-; SLM-NEXT: pinsrb $3, (%rsi), %xmm0 # sched: [4:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pinsrb:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pinsrb $1, %edi, %xmm0 # sched: [2:1.00]
-; SANDY-SSE-NEXT: pinsrb $3, (%rsi), %xmm0 # sched: [7:0.50]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pinsrb:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpinsrb $1, %edi, %xmm0, %xmm0 # sched: [2:1.00]
-; SANDY-NEXT: vpinsrb $3, (%rsi), %xmm0, %xmm0 # sched: [7:0.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pinsrb:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pinsrb $1, %edi, %xmm0 # sched: [2:2.00]
-; HASWELL-SSE-NEXT: pinsrb $3, (%rsi), %xmm0 # sched: [6:1.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pinsrb:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpinsrb $1, %edi, %xmm0, %xmm0 # sched: [2:2.00]
-; HASWELL-NEXT: vpinsrb $3, (%rsi), %xmm0, %xmm0 # sched: [6:1.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pinsrb:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pinsrb $1, %edi, %xmm0 # sched: [2:2.00]
-; BROADWELL-SSE-NEXT: pinsrb $3, (%rsi), %xmm0 # sched: [6:1.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pinsrb:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpinsrb $1, %edi, %xmm0, %xmm0 # sched: [2:2.00]
-; BROADWELL-NEXT: vpinsrb $3, (%rsi), %xmm0, %xmm0 # sched: [6:1.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pinsrb:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pinsrb $1, %edi, %xmm0 # sched: [2:2.00]
-; SKYLAKE-SSE-NEXT: pinsrb $3, (%rsi), %xmm0 # sched: [6:1.00]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pinsrb:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpinsrb $1, %edi, %xmm0, %xmm0 # sched: [2:2.00]
-; SKYLAKE-NEXT: vpinsrb $3, (%rsi), %xmm0, %xmm0 # sched: [6:1.00]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pinsrb:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pinsrb $1, %edi, %xmm0 # sched: [2:2.00]
-; SKX-SSE-NEXT: pinsrb $3, (%rsi), %xmm0 # sched: [6:1.00]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pinsrb:
-; SKX: # %bb.0:
-; SKX-NEXT: vpinsrb $1, %edi, %xmm0, %xmm0 # sched: [2:2.00]
-; SKX-NEXT: vpinsrb $3, (%rsi), %xmm0, %xmm0 # sched: [6:1.00]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pinsrb:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pinsrb $1, %edi, %xmm0 # sched: [12:0.50]
-; BDVER2-SSE-NEXT: pinsrb $3, (%rsi), %xmm0 # sched: [6:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pinsrb:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpinsrb $1, %edi, %xmm0, %xmm0 # sched: [12:0.50]
-; BDVER2-NEXT: vpinsrb $3, (%rsi), %xmm0, %xmm0 # sched: [6:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pinsrb:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pinsrb $1, %edi, %xmm0 # sched: [7:0.50]
-; BTVER2-SSE-NEXT: pinsrb $3, (%rsi), %xmm0 # sched: [4:1.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pinsrb:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpinsrb $1, %edi, %xmm0, %xmm0 # sched: [7:0.50]
-; BTVER2-NEXT: vpinsrb $3, (%rsi), %xmm0, %xmm0 # sched: [4:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pinsrb:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pinsrb $1, %edi, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: pinsrb $3, (%rsi), %xmm0 # sched: [8:0.50]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pinsrb:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpinsrb $1, %edi, %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: vpinsrb $3, (%rsi), %xmm0, %xmm0 # sched: [8:0.50]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = insertelement <16 x i8> %a0, i8 %a1, i32 1
- %2 = load i8, i8 *%a2
- %3 = insertelement <16 x i8> %1, i8 %2, i32 3
- ret <16 x i8> %3
-}
-
-define <4 x i32> @test_pinsrd(<4 x i32> %a0, i32 %a1, i32 *%a2) {
-; GENERIC-LABEL: test_pinsrd:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pinsrd $1, %edi, %xmm0 # sched: [2:1.00]
-; GENERIC-NEXT: pinsrd $3, (%rsi), %xmm0 # sched: [7:0.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_pinsrd:
-; SLM: # %bb.0:
-; SLM-NEXT: pinsrd $1, %edi, %xmm0 # sched: [1:1.00]
-; SLM-NEXT: pinsrd $3, (%rsi), %xmm0 # sched: [4:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pinsrd:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pinsrd $1, %edi, %xmm0 # sched: [2:1.00]
-; SANDY-SSE-NEXT: pinsrd $3, (%rsi), %xmm0 # sched: [7:0.50]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pinsrd:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpinsrd $1, %edi, %xmm0, %xmm0 # sched: [2:1.00]
-; SANDY-NEXT: vpinsrd $3, (%rsi), %xmm0, %xmm0 # sched: [7:0.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pinsrd:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pinsrd $1, %edi, %xmm0 # sched: [2:2.00]
-; HASWELL-SSE-NEXT: pinsrd $3, (%rsi), %xmm0 # sched: [6:1.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pinsrd:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpinsrd $1, %edi, %xmm0, %xmm0 # sched: [2:2.00]
-; HASWELL-NEXT: vpinsrd $3, (%rsi), %xmm0, %xmm0 # sched: [6:1.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pinsrd:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pinsrd $1, %edi, %xmm0 # sched: [2:2.00]
-; BROADWELL-SSE-NEXT: pinsrd $3, (%rsi), %xmm0 # sched: [6:1.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pinsrd:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpinsrd $1, %edi, %xmm0, %xmm0 # sched: [2:2.00]
-; BROADWELL-NEXT: vpinsrd $3, (%rsi), %xmm0, %xmm0 # sched: [6:1.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pinsrd:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pinsrd $1, %edi, %xmm0 # sched: [2:2.00]
-; SKYLAKE-SSE-NEXT: pinsrd $3, (%rsi), %xmm0 # sched: [6:1.00]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pinsrd:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpinsrd $1, %edi, %xmm0, %xmm0 # sched: [2:2.00]
-; SKYLAKE-NEXT: vpinsrd $3, (%rsi), %xmm0, %xmm0 # sched: [6:1.00]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pinsrd:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pinsrd $1, %edi, %xmm0 # sched: [2:2.00]
-; SKX-SSE-NEXT: pinsrd $3, (%rsi), %xmm0 # sched: [6:1.00]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pinsrd:
-; SKX: # %bb.0:
-; SKX-NEXT: vpinsrd $1, %edi, %xmm0, %xmm0 # sched: [2:2.00]
-; SKX-NEXT: vpinsrd $3, (%rsi), %xmm0, %xmm0 # sched: [6:1.00]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pinsrd:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pinsrd $1, %edi, %xmm0 # sched: [12:0.50]
-; BDVER2-SSE-NEXT: pinsrd $3, (%rsi), %xmm0 # sched: [6:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pinsrd:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpinsrd $1, %edi, %xmm0, %xmm0 # sched: [12:0.50]
-; BDVER2-NEXT: vpinsrd $3, (%rsi), %xmm0, %xmm0 # sched: [6:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pinsrd:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pinsrd $1, %edi, %xmm0 # sched: [7:0.50]
-; BTVER2-SSE-NEXT: pinsrd $3, (%rsi), %xmm0 # sched: [4:1.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pinsrd:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpinsrd $1, %edi, %xmm0, %xmm0 # sched: [7:0.50]
-; BTVER2-NEXT: vpinsrd $3, (%rsi), %xmm0, %xmm0 # sched: [4:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pinsrd:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pinsrd $1, %edi, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: pinsrd $3, (%rsi), %xmm0 # sched: [8:0.50]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pinsrd:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpinsrd $1, %edi, %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: vpinsrd $3, (%rsi), %xmm0, %xmm0 # sched: [8:0.50]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = insertelement <4 x i32> %a0, i32 %a1, i32 1
- %2 = load i32, i32 *%a2
- %3 = insertelement <4 x i32> %1, i32 %2, i32 3
- ret <4 x i32> %3
-}
-
-define <2 x i64> @test_pinsrq(<2 x i64> %a0, <2 x i64> %a1, i64 %a2, i64 *%a3) {
-; GENERIC-LABEL: test_pinsrq:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pinsrq $1, %rdi, %xmm0 # sched: [2:1.00]
-; GENERIC-NEXT: pinsrq $1, (%rsi), %xmm1 # sched: [7:0.50]
-; GENERIC-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_pinsrq:
-; SLM: # %bb.0:
-; SLM-NEXT: pinsrq $1, (%rsi), %xmm1 # sched: [4:1.00]
-; SLM-NEXT: pinsrq $1, %rdi, %xmm0 # sched: [1:1.00]
-; SLM-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pinsrq:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pinsrq $1, %rdi, %xmm0 # sched: [2:1.00]
-; SANDY-SSE-NEXT: pinsrq $1, (%rsi), %xmm1 # sched: [7:0.50]
-; SANDY-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pinsrq:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpinsrq $1, %rdi, %xmm0, %xmm0 # sched: [2:1.00]
-; SANDY-NEXT: vpinsrq $1, (%rsi), %xmm1, %xmm1 # sched: [7:0.50]
-; SANDY-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pinsrq:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pinsrq $1, %rdi, %xmm0 # sched: [2:2.00]
-; HASWELL-SSE-NEXT: pinsrq $1, (%rsi), %xmm1 # sched: [6:1.00]
-; HASWELL-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pinsrq:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpinsrq $1, %rdi, %xmm0, %xmm0 # sched: [2:2.00]
-; HASWELL-NEXT: vpinsrq $1, (%rsi), %xmm1, %xmm1 # sched: [6:1.00]
-; HASWELL-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pinsrq:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pinsrq $1, %rdi, %xmm0 # sched: [2:2.00]
-; BROADWELL-SSE-NEXT: pinsrq $1, (%rsi), %xmm1 # sched: [6:1.00]
-; BROADWELL-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pinsrq:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpinsrq $1, %rdi, %xmm0, %xmm0 # sched: [2:2.00]
-; BROADWELL-NEXT: vpinsrq $1, (%rsi), %xmm1, %xmm1 # sched: [6:1.00]
-; BROADWELL-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pinsrq:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pinsrq $1, %rdi, %xmm0 # sched: [2:2.00]
-; SKYLAKE-SSE-NEXT: pinsrq $1, (%rsi), %xmm1 # sched: [6:1.00]
-; SKYLAKE-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.33]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pinsrq:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpinsrq $1, %rdi, %xmm0, %xmm0 # sched: [2:2.00]
-; SKYLAKE-NEXT: vpinsrq $1, (%rsi), %xmm1, %xmm1 # sched: [6:1.00]
-; SKYLAKE-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pinsrq:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pinsrq $1, %rdi, %xmm0 # sched: [2:2.00]
-; SKX-SSE-NEXT: pinsrq $1, (%rsi), %xmm1 # sched: [6:1.00]
-; SKX-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.33]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pinsrq:
-; SKX: # %bb.0:
-; SKX-NEXT: vpinsrq $1, %rdi, %xmm0, %xmm0 # sched: [2:2.00]
-; SKX-NEXT: vpinsrq $1, (%rsi), %xmm1, %xmm1 # sched: [6:1.00]
-; SKX-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pinsrq:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pinsrq $1, (%rsi), %xmm1 # sched: [6:0.50]
-; BDVER2-SSE-NEXT: pinsrq $1, %rdi, %xmm0 # sched: [12:0.50]
-; BDVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pinsrq:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpinsrq $1, (%rsi), %xmm1, %xmm1 # sched: [6:0.50]
-; BDVER2-NEXT: vpinsrq $1, %rdi, %xmm0, %xmm0 # sched: [12:0.50]
-; BDVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pinsrq:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pinsrq $1, (%rsi), %xmm1 # sched: [4:1.00]
-; BTVER2-SSE-NEXT: pinsrq $1, %rdi, %xmm0 # sched: [7:0.50]
-; BTVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pinsrq:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpinsrq $1, (%rsi), %xmm1, %xmm1 # sched: [4:1.00]
-; BTVER2-NEXT: vpinsrq $1, %rdi, %xmm0, %xmm0 # sched: [7:0.50]
-; BTVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pinsrq:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pinsrq $1, (%rsi), %xmm1 # sched: [8:0.50]
-; ZNVER1-SSE-NEXT: pinsrq $1, %rdi, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pinsrq:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpinsrq $1, (%rsi), %xmm1, %xmm1 # sched: [8:0.50]
-; ZNVER1-NEXT: vpinsrq $1, %rdi, %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = insertelement <2 x i64> %a0, i64 %a2, i32 1
- %2 = load i64, i64 *%a3
- %3 = insertelement <2 x i64> %a1, i64 %2, i32 1
- %4 = add <2 x i64> %1, %3
- ret <2 x i64> %4
-}
-
-define <16 x i8> @test_pmaxsb(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> *%a2) {
-; GENERIC-LABEL: test_pmaxsb:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pmaxsb %xmm1, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: pmaxsb (%rdi), %xmm0 # sched: [7:0.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_pmaxsb:
-; SLM: # %bb.0:
-; SLM-NEXT: pmaxsb %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: pmaxsb (%rdi), %xmm0 # sched: [4:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pmaxsb:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pmaxsb %xmm1, %xmm0 # sched: [1:0.50]
-; SANDY-SSE-NEXT: pmaxsb (%rdi), %xmm0 # sched: [7:0.50]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pmaxsb:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpmaxsb %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SANDY-NEXT: vpmaxsb (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pmaxsb:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pmaxsb %xmm1, %xmm0 # sched: [1:0.50]
-; HASWELL-SSE-NEXT: pmaxsb (%rdi), %xmm0 # sched: [7:0.50]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pmaxsb:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpmaxsb %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; HASWELL-NEXT: vpmaxsb (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pmaxsb:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pmaxsb %xmm1, %xmm0 # sched: [1:0.50]
-; BROADWELL-SSE-NEXT: pmaxsb (%rdi), %xmm0 # sched: [6:0.50]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pmaxsb:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpmaxsb %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BROADWELL-NEXT: vpmaxsb (%rdi), %xmm0, %xmm0 # sched: [6:0.50]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pmaxsb:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pmaxsb %xmm1, %xmm0 # sched: [1:0.50]
-; SKYLAKE-SSE-NEXT: pmaxsb (%rdi), %xmm0 # sched: [7:0.50]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pmaxsb:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpmaxsb %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SKYLAKE-NEXT: vpmaxsb (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pmaxsb:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pmaxsb %xmm1, %xmm0 # sched: [1:0.50]
-; SKX-SSE-NEXT: pmaxsb (%rdi), %xmm0 # sched: [7:0.50]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pmaxsb:
-; SKX: # %bb.0:
-; SKX-NEXT: vpmaxsb %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SKX-NEXT: vpmaxsb (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pmaxsb:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pmaxsb %xmm1, %xmm0 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: pmaxsb (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pmaxsb:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpmaxsb %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: vpmaxsb (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pmaxsb:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pmaxsb %xmm1, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: pmaxsb (%rdi), %xmm0 # sched: [6:1.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pmaxsb:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpmaxsb %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: vpmaxsb (%rdi), %xmm0, %xmm0 # sched: [6:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pmaxsb:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pmaxsb %xmm1, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: pmaxsb (%rdi), %xmm0 # sched: [8:0.50]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pmaxsb:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpmaxsb %xmm1, %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: vpmaxsb (%rdi), %xmm0, %xmm0 # sched: [8:0.50]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call <16 x i8> @llvm.x86.sse41.pmaxsb(<16 x i8> %a0, <16 x i8> %a1)
- %2 = load <16 x i8>, <16 x i8> *%a2, align 16
- %3 = call <16 x i8> @llvm.x86.sse41.pmaxsb(<16 x i8> %1, <16 x i8> %2)
- ret <16 x i8> %3
-}
-declare <16 x i8> @llvm.x86.sse41.pmaxsb(<16 x i8>, <16 x i8>) nounwind readnone
-
-define <4 x i32> @test_pmaxsd(<4 x i32> %a0, <4 x i32> %a1, <4 x i32> *%a2) {
-; GENERIC-LABEL: test_pmaxsd:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pmaxsd %xmm1, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: pmaxsd (%rdi), %xmm0 # sched: [7:0.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_pmaxsd:
-; SLM: # %bb.0:
-; SLM-NEXT: pmaxsd %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: pmaxsd (%rdi), %xmm0 # sched: [4:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pmaxsd:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pmaxsd %xmm1, %xmm0 # sched: [1:0.50]
-; SANDY-SSE-NEXT: pmaxsd (%rdi), %xmm0 # sched: [7:0.50]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pmaxsd:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpmaxsd %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SANDY-NEXT: vpmaxsd (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pmaxsd:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pmaxsd %xmm1, %xmm0 # sched: [1:0.50]
-; HASWELL-SSE-NEXT: pmaxsd (%rdi), %xmm0 # sched: [7:0.50]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pmaxsd:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpmaxsd %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; HASWELL-NEXT: vpmaxsd (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pmaxsd:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pmaxsd %xmm1, %xmm0 # sched: [1:0.50]
-; BROADWELL-SSE-NEXT: pmaxsd (%rdi), %xmm0 # sched: [6:0.50]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pmaxsd:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpmaxsd %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BROADWELL-NEXT: vpmaxsd (%rdi), %xmm0, %xmm0 # sched: [6:0.50]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pmaxsd:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pmaxsd %xmm1, %xmm0 # sched: [1:0.50]
-; SKYLAKE-SSE-NEXT: pmaxsd (%rdi), %xmm0 # sched: [7:0.50]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pmaxsd:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpmaxsd %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SKYLAKE-NEXT: vpmaxsd (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pmaxsd:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pmaxsd %xmm1, %xmm0 # sched: [1:0.50]
-; SKX-SSE-NEXT: pmaxsd (%rdi), %xmm0 # sched: [7:0.50]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pmaxsd:
-; SKX: # %bb.0:
-; SKX-NEXT: vpmaxsd %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SKX-NEXT: vpmaxsd (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pmaxsd:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pmaxsd %xmm1, %xmm0 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: pmaxsd (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pmaxsd:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpmaxsd %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: vpmaxsd (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pmaxsd:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pmaxsd %xmm1, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: pmaxsd (%rdi), %xmm0 # sched: [6:1.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pmaxsd:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpmaxsd %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: vpmaxsd (%rdi), %xmm0, %xmm0 # sched: [6:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pmaxsd:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pmaxsd %xmm1, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: pmaxsd (%rdi), %xmm0 # sched: [8:0.50]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pmaxsd:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpmaxsd %xmm1, %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: vpmaxsd (%rdi), %xmm0, %xmm0 # sched: [8:0.50]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call <4 x i32> @llvm.x86.sse41.pmaxsd(<4 x i32> %a0, <4 x i32> %a1)
- %2 = load <4 x i32>, <4 x i32> *%a2, align 16
- %3 = call <4 x i32> @llvm.x86.sse41.pmaxsd(<4 x i32> %1, <4 x i32> %2)
- ret <4 x i32> %3
-}
-declare <4 x i32> @llvm.x86.sse41.pmaxsd(<4 x i32>, <4 x i32>) nounwind readnone
-
-define <4 x i32> @test_pmaxud(<4 x i32> %a0, <4 x i32> %a1, <4 x i32> *%a2) {
-; GENERIC-LABEL: test_pmaxud:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pmaxud %xmm1, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: pmaxud (%rdi), %xmm0 # sched: [7:0.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_pmaxud:
-; SLM: # %bb.0:
-; SLM-NEXT: pmaxud %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: pmaxud (%rdi), %xmm0 # sched: [4:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pmaxud:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pmaxud %xmm1, %xmm0 # sched: [1:0.50]
-; SANDY-SSE-NEXT: pmaxud (%rdi), %xmm0 # sched: [7:0.50]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pmaxud:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpmaxud %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SANDY-NEXT: vpmaxud (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pmaxud:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pmaxud %xmm1, %xmm0 # sched: [1:0.50]
-; HASWELL-SSE-NEXT: pmaxud (%rdi), %xmm0 # sched: [7:0.50]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pmaxud:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpmaxud %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; HASWELL-NEXT: vpmaxud (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pmaxud:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pmaxud %xmm1, %xmm0 # sched: [1:0.50]
-; BROADWELL-SSE-NEXT: pmaxud (%rdi), %xmm0 # sched: [6:0.50]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pmaxud:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpmaxud %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BROADWELL-NEXT: vpmaxud (%rdi), %xmm0, %xmm0 # sched: [6:0.50]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pmaxud:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pmaxud %xmm1, %xmm0 # sched: [1:0.50]
-; SKYLAKE-SSE-NEXT: pmaxud (%rdi), %xmm0 # sched: [7:0.50]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pmaxud:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpmaxud %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SKYLAKE-NEXT: vpmaxud (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pmaxud:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pmaxud %xmm1, %xmm0 # sched: [1:0.50]
-; SKX-SSE-NEXT: pmaxud (%rdi), %xmm0 # sched: [7:0.50]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pmaxud:
-; SKX: # %bb.0:
-; SKX-NEXT: vpmaxud %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SKX-NEXT: vpmaxud (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pmaxud:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pmaxud %xmm1, %xmm0 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: pmaxud (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pmaxud:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpmaxud %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: vpmaxud (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pmaxud:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pmaxud %xmm1, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: pmaxud (%rdi), %xmm0 # sched: [6:1.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pmaxud:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpmaxud %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: vpmaxud (%rdi), %xmm0, %xmm0 # sched: [6:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pmaxud:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pmaxud %xmm1, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: pmaxud (%rdi), %xmm0 # sched: [8:0.50]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pmaxud:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpmaxud %xmm1, %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: vpmaxud (%rdi), %xmm0, %xmm0 # sched: [8:0.50]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call <4 x i32> @llvm.x86.sse41.pmaxud(<4 x i32> %a0, <4 x i32> %a1)
- %2 = load <4 x i32>, <4 x i32> *%a2, align 16
- %3 = call <4 x i32> @llvm.x86.sse41.pmaxud(<4 x i32> %1, <4 x i32> %2)
- ret <4 x i32> %3
-}
-declare <4 x i32> @llvm.x86.sse41.pmaxud(<4 x i32>, <4 x i32>) nounwind readnone
-
-define <8 x i16> @test_pmaxuw(<8 x i16> %a0, <8 x i16> %a1, <8 x i16> *%a2) {
-; GENERIC-LABEL: test_pmaxuw:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pmaxuw %xmm1, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: pmaxuw (%rdi), %xmm0 # sched: [7:0.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_pmaxuw:
-; SLM: # %bb.0:
-; SLM-NEXT: pmaxuw %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: pmaxuw (%rdi), %xmm0 # sched: [4:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pmaxuw:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pmaxuw %xmm1, %xmm0 # sched: [1:0.50]
-; SANDY-SSE-NEXT: pmaxuw (%rdi), %xmm0 # sched: [7:0.50]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pmaxuw:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpmaxuw %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SANDY-NEXT: vpmaxuw (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pmaxuw:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pmaxuw %xmm1, %xmm0 # sched: [1:0.50]
-; HASWELL-SSE-NEXT: pmaxuw (%rdi), %xmm0 # sched: [7:0.50]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pmaxuw:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpmaxuw %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; HASWELL-NEXT: vpmaxuw (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pmaxuw:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pmaxuw %xmm1, %xmm0 # sched: [1:0.50]
-; BROADWELL-SSE-NEXT: pmaxuw (%rdi), %xmm0 # sched: [6:0.50]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pmaxuw:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpmaxuw %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BROADWELL-NEXT: vpmaxuw (%rdi), %xmm0, %xmm0 # sched: [6:0.50]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pmaxuw:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pmaxuw %xmm1, %xmm0 # sched: [1:0.50]
-; SKYLAKE-SSE-NEXT: pmaxuw (%rdi), %xmm0 # sched: [7:0.50]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pmaxuw:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpmaxuw %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SKYLAKE-NEXT: vpmaxuw (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pmaxuw:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pmaxuw %xmm1, %xmm0 # sched: [1:0.50]
-; SKX-SSE-NEXT: pmaxuw (%rdi), %xmm0 # sched: [7:0.50]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pmaxuw:
-; SKX: # %bb.0:
-; SKX-NEXT: vpmaxuw %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SKX-NEXT: vpmaxuw (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pmaxuw:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pmaxuw %xmm1, %xmm0 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: pmaxuw (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pmaxuw:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpmaxuw %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: vpmaxuw (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pmaxuw:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pmaxuw %xmm1, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: pmaxuw (%rdi), %xmm0 # sched: [6:1.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pmaxuw:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpmaxuw %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: vpmaxuw (%rdi), %xmm0, %xmm0 # sched: [6:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pmaxuw:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pmaxuw %xmm1, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: pmaxuw (%rdi), %xmm0 # sched: [8:0.50]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pmaxuw:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpmaxuw %xmm1, %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: vpmaxuw (%rdi), %xmm0, %xmm0 # sched: [8:0.50]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call <8 x i16> @llvm.x86.sse41.pmaxuw(<8 x i16> %a0, <8 x i16> %a1)
- %2 = load <8 x i16>, <8 x i16> *%a2, align 16
- %3 = call <8 x i16> @llvm.x86.sse41.pmaxuw(<8 x i16> %1, <8 x i16> %2)
- ret <8 x i16> %3
-}
-declare <8 x i16> @llvm.x86.sse41.pmaxuw(<8 x i16>, <8 x i16>) nounwind readnone
-
-define <16 x i8> @test_pminsb(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> *%a2) {
-; GENERIC-LABEL: test_pminsb:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pminsb %xmm1, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: pminsb (%rdi), %xmm0 # sched: [7:0.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_pminsb:
-; SLM: # %bb.0:
-; SLM-NEXT: pminsb %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: pminsb (%rdi), %xmm0 # sched: [4:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pminsb:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pminsb %xmm1, %xmm0 # sched: [1:0.50]
-; SANDY-SSE-NEXT: pminsb (%rdi), %xmm0 # sched: [7:0.50]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pminsb:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpminsb %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SANDY-NEXT: vpminsb (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pminsb:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pminsb %xmm1, %xmm0 # sched: [1:0.50]
-; HASWELL-SSE-NEXT: pminsb (%rdi), %xmm0 # sched: [7:0.50]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pminsb:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpminsb %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; HASWELL-NEXT: vpminsb (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pminsb:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pminsb %xmm1, %xmm0 # sched: [1:0.50]
-; BROADWELL-SSE-NEXT: pminsb (%rdi), %xmm0 # sched: [6:0.50]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pminsb:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpminsb %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BROADWELL-NEXT: vpminsb (%rdi), %xmm0, %xmm0 # sched: [6:0.50]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pminsb:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pminsb %xmm1, %xmm0 # sched: [1:0.50]
-; SKYLAKE-SSE-NEXT: pminsb (%rdi), %xmm0 # sched: [7:0.50]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pminsb:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpminsb %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SKYLAKE-NEXT: vpminsb (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pminsb:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pminsb %xmm1, %xmm0 # sched: [1:0.50]
-; SKX-SSE-NEXT: pminsb (%rdi), %xmm0 # sched: [7:0.50]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pminsb:
-; SKX: # %bb.0:
-; SKX-NEXT: vpminsb %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SKX-NEXT: vpminsb (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pminsb:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pminsb %xmm1, %xmm0 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: pminsb (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pminsb:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpminsb %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: vpminsb (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pminsb:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pminsb %xmm1, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: pminsb (%rdi), %xmm0 # sched: [6:1.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pminsb:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpminsb %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: vpminsb (%rdi), %xmm0, %xmm0 # sched: [6:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pminsb:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pminsb %xmm1, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: pminsb (%rdi), %xmm0 # sched: [8:0.50]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pminsb:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpminsb %xmm1, %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: vpminsb (%rdi), %xmm0, %xmm0 # sched: [8:0.50]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call <16 x i8> @llvm.x86.sse41.pminsb(<16 x i8> %a0, <16 x i8> %a1)
- %2 = load <16 x i8>, <16 x i8> *%a2, align 16
- %3 = call <16 x i8> @llvm.x86.sse41.pminsb(<16 x i8> %1, <16 x i8> %2)
- ret <16 x i8> %3
-}
-declare <16 x i8> @llvm.x86.sse41.pminsb(<16 x i8>, <16 x i8>) nounwind readnone
-
-define <4 x i32> @test_pminsd(<4 x i32> %a0, <4 x i32> %a1, <4 x i32> *%a2) {
-; GENERIC-LABEL: test_pminsd:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pminsd %xmm1, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: pminsd (%rdi), %xmm0 # sched: [7:0.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_pminsd:
-; SLM: # %bb.0:
-; SLM-NEXT: pminsd %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: pminsd (%rdi), %xmm0 # sched: [4:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pminsd:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pminsd %xmm1, %xmm0 # sched: [1:0.50]
-; SANDY-SSE-NEXT: pminsd (%rdi), %xmm0 # sched: [7:0.50]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pminsd:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpminsd %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SANDY-NEXT: vpminsd (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pminsd:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pminsd %xmm1, %xmm0 # sched: [1:0.50]
-; HASWELL-SSE-NEXT: pminsd (%rdi), %xmm0 # sched: [7:0.50]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pminsd:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpminsd %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; HASWELL-NEXT: vpminsd (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pminsd:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pminsd %xmm1, %xmm0 # sched: [1:0.50]
-; BROADWELL-SSE-NEXT: pminsd (%rdi), %xmm0 # sched: [6:0.50]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pminsd:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpminsd %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BROADWELL-NEXT: vpminsd (%rdi), %xmm0, %xmm0 # sched: [6:0.50]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pminsd:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pminsd %xmm1, %xmm0 # sched: [1:0.50]
-; SKYLAKE-SSE-NEXT: pminsd (%rdi), %xmm0 # sched: [7:0.50]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pminsd:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpminsd %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SKYLAKE-NEXT: vpminsd (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pminsd:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pminsd %xmm1, %xmm0 # sched: [1:0.50]
-; SKX-SSE-NEXT: pminsd (%rdi), %xmm0 # sched: [7:0.50]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pminsd:
-; SKX: # %bb.0:
-; SKX-NEXT: vpminsd %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SKX-NEXT: vpminsd (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pminsd:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pminsd %xmm1, %xmm0 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: pminsd (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pminsd:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpminsd %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: vpminsd (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pminsd:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pminsd %xmm1, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: pminsd (%rdi), %xmm0 # sched: [6:1.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pminsd:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpminsd %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: vpminsd (%rdi), %xmm0, %xmm0 # sched: [6:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pminsd:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pminsd %xmm1, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: pminsd (%rdi), %xmm0 # sched: [8:0.50]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pminsd:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpminsd %xmm1, %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: vpminsd (%rdi), %xmm0, %xmm0 # sched: [8:0.50]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call <4 x i32> @llvm.x86.sse41.pminsd(<4 x i32> %a0, <4 x i32> %a1)
- %2 = load <4 x i32>, <4 x i32> *%a2, align 16
- %3 = call <4 x i32> @llvm.x86.sse41.pminsd(<4 x i32> %1, <4 x i32> %2)
- ret <4 x i32> %3
-}
-declare <4 x i32> @llvm.x86.sse41.pminsd(<4 x i32>, <4 x i32>) nounwind readnone
-
-define <4 x i32> @test_pminud(<4 x i32> %a0, <4 x i32> %a1, <4 x i32> *%a2) {
-; GENERIC-LABEL: test_pminud:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pminud %xmm1, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: pminud (%rdi), %xmm0 # sched: [7:0.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_pminud:
-; SLM: # %bb.0:
-; SLM-NEXT: pminud %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: pminud (%rdi), %xmm0 # sched: [4:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pminud:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pminud %xmm1, %xmm0 # sched: [1:0.50]
-; SANDY-SSE-NEXT: pminud (%rdi), %xmm0 # sched: [7:0.50]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pminud:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpminud %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SANDY-NEXT: vpminud (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pminud:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pminud %xmm1, %xmm0 # sched: [1:0.50]
-; HASWELL-SSE-NEXT: pminud (%rdi), %xmm0 # sched: [7:0.50]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pminud:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpminud %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; HASWELL-NEXT: vpminud (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pminud:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pminud %xmm1, %xmm0 # sched: [1:0.50]
-; BROADWELL-SSE-NEXT: pminud (%rdi), %xmm0 # sched: [6:0.50]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pminud:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpminud %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BROADWELL-NEXT: vpminud (%rdi), %xmm0, %xmm0 # sched: [6:0.50]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pminud:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pminud %xmm1, %xmm0 # sched: [1:0.50]
-; SKYLAKE-SSE-NEXT: pminud (%rdi), %xmm0 # sched: [7:0.50]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pminud:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpminud %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SKYLAKE-NEXT: vpminud (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pminud:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pminud %xmm1, %xmm0 # sched: [1:0.50]
-; SKX-SSE-NEXT: pminud (%rdi), %xmm0 # sched: [7:0.50]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pminud:
-; SKX: # %bb.0:
-; SKX-NEXT: vpminud %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SKX-NEXT: vpminud (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pminud:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pminud %xmm1, %xmm0 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: pminud (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pminud:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpminud %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: vpminud (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pminud:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pminud %xmm1, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: pminud (%rdi), %xmm0 # sched: [6:1.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pminud:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpminud %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: vpminud (%rdi), %xmm0, %xmm0 # sched: [6:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pminud:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pminud %xmm1, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: pminud (%rdi), %xmm0 # sched: [8:0.50]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pminud:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpminud %xmm1, %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: vpminud (%rdi), %xmm0, %xmm0 # sched: [8:0.50]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call <4 x i32> @llvm.x86.sse41.pminud(<4 x i32> %a0, <4 x i32> %a1)
- %2 = load <4 x i32>, <4 x i32> *%a2, align 16
- %3 = call <4 x i32> @llvm.x86.sse41.pminud(<4 x i32> %1, <4 x i32> %2)
- ret <4 x i32> %3
-}
-declare <4 x i32> @llvm.x86.sse41.pminud(<4 x i32>, <4 x i32>) nounwind readnone
-
-define <8 x i16> @test_pminuw(<8 x i16> %a0, <8 x i16> %a1, <8 x i16> *%a2) {
-; GENERIC-LABEL: test_pminuw:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pminuw %xmm1, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: pminuw (%rdi), %xmm0 # sched: [7:0.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_pminuw:
-; SLM: # %bb.0:
-; SLM-NEXT: pminuw %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: pminuw (%rdi), %xmm0 # sched: [4:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pminuw:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pminuw %xmm1, %xmm0 # sched: [1:0.50]
-; SANDY-SSE-NEXT: pminuw (%rdi), %xmm0 # sched: [7:0.50]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pminuw:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpminuw %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SANDY-NEXT: vpminuw (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pminuw:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pminuw %xmm1, %xmm0 # sched: [1:0.50]
-; HASWELL-SSE-NEXT: pminuw (%rdi), %xmm0 # sched: [7:0.50]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pminuw:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpminuw %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; HASWELL-NEXT: vpminuw (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pminuw:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pminuw %xmm1, %xmm0 # sched: [1:0.50]
-; BROADWELL-SSE-NEXT: pminuw (%rdi), %xmm0 # sched: [6:0.50]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pminuw:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpminuw %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BROADWELL-NEXT: vpminuw (%rdi), %xmm0, %xmm0 # sched: [6:0.50]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pminuw:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pminuw %xmm1, %xmm0 # sched: [1:0.50]
-; SKYLAKE-SSE-NEXT: pminuw (%rdi), %xmm0 # sched: [7:0.50]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pminuw:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpminuw %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SKYLAKE-NEXT: vpminuw (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pminuw:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pminuw %xmm1, %xmm0 # sched: [1:0.50]
-; SKX-SSE-NEXT: pminuw (%rdi), %xmm0 # sched: [7:0.50]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pminuw:
-; SKX: # %bb.0:
-; SKX-NEXT: vpminuw %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SKX-NEXT: vpminuw (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pminuw:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pminuw %xmm1, %xmm0 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: pminuw (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pminuw:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpminuw %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: vpminuw (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pminuw:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pminuw %xmm1, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: pminuw (%rdi), %xmm0 # sched: [6:1.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pminuw:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpminuw %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: vpminuw (%rdi), %xmm0, %xmm0 # sched: [6:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pminuw:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pminuw %xmm1, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: pminuw (%rdi), %xmm0 # sched: [8:0.50]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pminuw:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpminuw %xmm1, %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: vpminuw (%rdi), %xmm0, %xmm0 # sched: [8:0.50]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call <8 x i16> @llvm.x86.sse41.pminuw(<8 x i16> %a0, <8 x i16> %a1)
- %2 = load <8 x i16>, <8 x i16> *%a2, align 16
- %3 = call <8 x i16> @llvm.x86.sse41.pminuw(<8 x i16> %1, <8 x i16> %2)
- ret <8 x i16> %3
-}
-declare <8 x i16> @llvm.x86.sse41.pminuw(<8 x i16>, <8 x i16>) nounwind readnone
-
-define <8 x i16> @test_pmovsxbw(<16 x i8> %a0, <8 x i8> *%a1) {
-; GENERIC-LABEL: test_pmovsxbw:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pmovsxbw %xmm0, %xmm1 # sched: [1:0.50]
-; GENERIC-NEXT: pmovsxbw (%rdi), %xmm0 # sched: [7:0.50]
-; GENERIC-NEXT: paddw %xmm1, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_pmovsxbw:
-; SLM: # %bb.0:
-; SLM-NEXT: pmovsxbw (%rdi), %xmm1 # sched: [4:1.00]
-; SLM-NEXT: pmovsxbw %xmm0, %xmm0 # sched: [1:1.00]
-; SLM-NEXT: paddw %xmm0, %xmm1 # sched: [1:0.50]
-; SLM-NEXT: movdqa %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pmovsxbw:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pmovsxbw %xmm0, %xmm1 # sched: [1:0.50]
-; SANDY-SSE-NEXT: pmovsxbw (%rdi), %xmm0 # sched: [7:0.50]
-; SANDY-SSE-NEXT: paddw %xmm1, %xmm0 # sched: [1:0.50]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pmovsxbw:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpmovsxbw %xmm0, %xmm0 # sched: [1:0.50]
-; SANDY-NEXT: vpmovsxbw (%rdi), %xmm1 # sched: [7:0.50]
-; SANDY-NEXT: vpaddw %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pmovsxbw:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pmovsxbw %xmm0, %xmm1 # sched: [1:1.00]
-; HASWELL-SSE-NEXT: pmovsxbw (%rdi), %xmm0 # sched: [6:1.00]
-; HASWELL-SSE-NEXT: paddw %xmm1, %xmm0 # sched: [1:0.50]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pmovsxbw:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpmovsxbw %xmm0, %xmm0 # sched: [1:1.00]
-; HASWELL-NEXT: vpmovsxbw (%rdi), %xmm1 # sched: [6:1.00]
-; HASWELL-NEXT: vpaddw %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pmovsxbw:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pmovsxbw %xmm0, %xmm1 # sched: [1:1.00]
-; BROADWELL-SSE-NEXT: pmovsxbw (%rdi), %xmm0 # sched: [6:1.00]
-; BROADWELL-SSE-NEXT: paddw %xmm1, %xmm0 # sched: [1:0.50]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pmovsxbw:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpmovsxbw %xmm0, %xmm0 # sched: [1:1.00]
-; BROADWELL-NEXT: vpmovsxbw (%rdi), %xmm1 # sched: [6:1.00]
-; BROADWELL-NEXT: vpaddw %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pmovsxbw:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pmovsxbw %xmm0, %xmm1 # sched: [1:1.00]
-; SKYLAKE-SSE-NEXT: pmovsxbw (%rdi), %xmm0 # sched: [6:1.00]
-; SKYLAKE-SSE-NEXT: paddw %xmm1, %xmm0 # sched: [1:0.33]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pmovsxbw:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpmovsxbw %xmm0, %xmm0 # sched: [1:1.00]
-; SKYLAKE-NEXT: vpmovsxbw (%rdi), %xmm1 # sched: [6:1.00]
-; SKYLAKE-NEXT: vpaddw %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pmovsxbw:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pmovsxbw %xmm0, %xmm1 # sched: [1:1.00]
-; SKX-SSE-NEXT: pmovsxbw (%rdi), %xmm0 # sched: [6:1.00]
-; SKX-SSE-NEXT: paddw %xmm1, %xmm0 # sched: [1:0.33]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pmovsxbw:
-; SKX: # %bb.0:
-; SKX-NEXT: vpmovsxbw %xmm0, %xmm0 # sched: [1:1.00]
-; SKX-NEXT: vpmovsxbw (%rdi), %xmm1 # sched: [6:1.00]
-; SKX-NEXT: vpaddw %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pmovsxbw:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pmovsxbw %xmm0, %xmm1 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: pmovsxbw (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER2-SSE-NEXT: paddw %xmm1, %xmm0 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pmovsxbw:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpmovsxbw (%rdi), %xmm1 # sched: [7:0.50]
-; BDVER2-NEXT: vpmovsxbw %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: vpaddw %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pmovsxbw:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pmovsxbw %xmm0, %xmm1 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: pmovsxbw (%rdi), %xmm0 # sched: [6:1.00]
-; BTVER2-SSE-NEXT: paddw %xmm1, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pmovsxbw:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpmovsxbw (%rdi), %xmm1 # sched: [6:1.00]
-; BTVER2-NEXT: vpmovsxbw %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: vpaddw %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pmovsxbw:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pmovsxbw %xmm0, %xmm1 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: pmovsxbw (%rdi), %xmm0 # sched: [8:0.50]
-; ZNVER1-SSE-NEXT: paddw %xmm1, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pmovsxbw:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpmovsxbw (%rdi), %xmm1 # sched: [8:0.50]
-; ZNVER1-NEXT: vpmovsxbw %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: vpaddw %xmm1, %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = shufflevector <16 x i8> %a0, <16 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
- %2 = sext <8 x i8> %1 to <8 x i16>
- %3 = load <8 x i8>, <8 x i8>* %a1, align 1
- %4 = sext <8 x i8> %3 to <8 x i16>
- %5 = add <8 x i16> %2, %4
- ret <8 x i16> %5
-}
-
-define <4 x i32> @test_pmovsxbd(<16 x i8> %a0, <4 x i8> *%a1) {
-; GENERIC-LABEL: test_pmovsxbd:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pmovsxbd %xmm0, %xmm1 # sched: [1:0.50]
-; GENERIC-NEXT: pmovsxbd (%rdi), %xmm0 # sched: [7:0.50]
-; GENERIC-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_pmovsxbd:
-; SLM: # %bb.0:
-; SLM-NEXT: pmovsxbd (%rdi), %xmm1 # sched: [4:1.00]
-; SLM-NEXT: pmovsxbd %xmm0, %xmm0 # sched: [1:1.00]
-; SLM-NEXT: paddd %xmm0, %xmm1 # sched: [1:0.50]
-; SLM-NEXT: movdqa %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pmovsxbd:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pmovsxbd %xmm0, %xmm1 # sched: [1:0.50]
-; SANDY-SSE-NEXT: pmovsxbd (%rdi), %xmm0 # sched: [7:0.50]
-; SANDY-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.50]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pmovsxbd:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpmovsxbd %xmm0, %xmm0 # sched: [1:0.50]
-; SANDY-NEXT: vpmovsxbd (%rdi), %xmm1 # sched: [7:0.50]
-; SANDY-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pmovsxbd:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pmovsxbd %xmm0, %xmm1 # sched: [1:1.00]
-; HASWELL-SSE-NEXT: pmovsxbd (%rdi), %xmm0 # sched: [6:1.00]
-; HASWELL-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.50]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pmovsxbd:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpmovsxbd %xmm0, %xmm0 # sched: [1:1.00]
-; HASWELL-NEXT: vpmovsxbd (%rdi), %xmm1 # sched: [6:1.00]
-; HASWELL-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pmovsxbd:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pmovsxbd %xmm0, %xmm1 # sched: [1:1.00]
-; BROADWELL-SSE-NEXT: pmovsxbd (%rdi), %xmm0 # sched: [6:1.00]
-; BROADWELL-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.50]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pmovsxbd:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpmovsxbd %xmm0, %xmm0 # sched: [1:1.00]
-; BROADWELL-NEXT: vpmovsxbd (%rdi), %xmm1 # sched: [6:1.00]
-; BROADWELL-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pmovsxbd:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pmovsxbd %xmm0, %xmm1 # sched: [1:1.00]
-; SKYLAKE-SSE-NEXT: pmovsxbd (%rdi), %xmm0 # sched: [6:1.00]
-; SKYLAKE-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.33]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pmovsxbd:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpmovsxbd %xmm0, %xmm0 # sched: [1:1.00]
-; SKYLAKE-NEXT: vpmovsxbd (%rdi), %xmm1 # sched: [6:1.00]
-; SKYLAKE-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pmovsxbd:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pmovsxbd %xmm0, %xmm1 # sched: [1:1.00]
-; SKX-SSE-NEXT: pmovsxbd (%rdi), %xmm0 # sched: [6:1.00]
-; SKX-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.33]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pmovsxbd:
-; SKX: # %bb.0:
-; SKX-NEXT: vpmovsxbd %xmm0, %xmm0 # sched: [1:1.00]
-; SKX-NEXT: vpmovsxbd (%rdi), %xmm1 # sched: [6:1.00]
-; SKX-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pmovsxbd:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pmovsxbd %xmm0, %xmm1 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: pmovsxbd (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER2-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pmovsxbd:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpmovsxbd (%rdi), %xmm1 # sched: [7:0.50]
-; BDVER2-NEXT: vpmovsxbd %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pmovsxbd:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pmovsxbd %xmm0, %xmm1 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: pmovsxbd (%rdi), %xmm0 # sched: [6:1.00]
-; BTVER2-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pmovsxbd:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpmovsxbd (%rdi), %xmm1 # sched: [6:1.00]
-; BTVER2-NEXT: vpmovsxbd %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pmovsxbd:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pmovsxbd %xmm0, %xmm1 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: pmovsxbd (%rdi), %xmm0 # sched: [8:0.50]
-; ZNVER1-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pmovsxbd:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpmovsxbd (%rdi), %xmm1 # sched: [8:0.50]
-; ZNVER1-NEXT: vpmovsxbd %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = shufflevector <16 x i8> %a0, <16 x i8> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
- %2 = sext <4 x i8> %1 to <4 x i32>
- %3 = load <4 x i8>, <4 x i8>* %a1, align 1
- %4 = sext <4 x i8> %3 to <4 x i32>
- %5 = add <4 x i32> %2, %4
- ret <4 x i32> %5
-}
-
-define <2 x i64> @test_pmovsxbq(<16 x i8> %a0, <2 x i8> *%a1) {
-; GENERIC-LABEL: test_pmovsxbq:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pmovsxbq %xmm0, %xmm1 # sched: [1:0.50]
-; GENERIC-NEXT: pmovsxbq (%rdi), %xmm0 # sched: [7:0.50]
-; GENERIC-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_pmovsxbq:
-; SLM: # %bb.0:
-; SLM-NEXT: pmovsxbq (%rdi), %xmm1 # sched: [4:1.00]
-; SLM-NEXT: pmovsxbq %xmm0, %xmm0 # sched: [1:1.00]
-; SLM-NEXT: paddq %xmm0, %xmm1 # sched: [1:0.50]
-; SLM-NEXT: movdqa %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pmovsxbq:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pmovsxbq %xmm0, %xmm1 # sched: [1:0.50]
-; SANDY-SSE-NEXT: pmovsxbq (%rdi), %xmm0 # sched: [7:0.50]
-; SANDY-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pmovsxbq:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpmovsxbq %xmm0, %xmm0 # sched: [1:0.50]
-; SANDY-NEXT: vpmovsxbq (%rdi), %xmm1 # sched: [7:0.50]
-; SANDY-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pmovsxbq:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pmovsxbq %xmm0, %xmm1 # sched: [1:1.00]
-; HASWELL-SSE-NEXT: pmovsxbq (%rdi), %xmm0 # sched: [6:1.00]
-; HASWELL-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pmovsxbq:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpmovsxbq %xmm0, %xmm0 # sched: [1:1.00]
-; HASWELL-NEXT: vpmovsxbq (%rdi), %xmm1 # sched: [6:1.00]
-; HASWELL-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pmovsxbq:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pmovsxbq %xmm0, %xmm1 # sched: [1:1.00]
-; BROADWELL-SSE-NEXT: pmovsxbq (%rdi), %xmm0 # sched: [6:1.00]
-; BROADWELL-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pmovsxbq:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpmovsxbq %xmm0, %xmm0 # sched: [1:1.00]
-; BROADWELL-NEXT: vpmovsxbq (%rdi), %xmm1 # sched: [6:1.00]
-; BROADWELL-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pmovsxbq:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pmovsxbq %xmm0, %xmm1 # sched: [1:1.00]
-; SKYLAKE-SSE-NEXT: pmovsxbq (%rdi), %xmm0 # sched: [6:1.00]
-; SKYLAKE-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.33]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pmovsxbq:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpmovsxbq %xmm0, %xmm0 # sched: [1:1.00]
-; SKYLAKE-NEXT: vpmovsxbq (%rdi), %xmm1 # sched: [6:1.00]
-; SKYLAKE-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pmovsxbq:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pmovsxbq %xmm0, %xmm1 # sched: [1:1.00]
-; SKX-SSE-NEXT: pmovsxbq (%rdi), %xmm0 # sched: [6:1.00]
-; SKX-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.33]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pmovsxbq:
-; SKX: # %bb.0:
-; SKX-NEXT: vpmovsxbq %xmm0, %xmm0 # sched: [1:1.00]
-; SKX-NEXT: vpmovsxbq (%rdi), %xmm1 # sched: [6:1.00]
-; SKX-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pmovsxbq:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pmovsxbq %xmm0, %xmm1 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: pmovsxbq (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pmovsxbq:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpmovsxbq (%rdi), %xmm1 # sched: [7:0.50]
-; BDVER2-NEXT: vpmovsxbq %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pmovsxbq:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pmovsxbq %xmm0, %xmm1 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: pmovsxbq (%rdi), %xmm0 # sched: [6:1.00]
-; BTVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pmovsxbq:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpmovsxbq (%rdi), %xmm1 # sched: [6:1.00]
-; BTVER2-NEXT: vpmovsxbq %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pmovsxbq:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pmovsxbq %xmm0, %xmm1 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: pmovsxbq (%rdi), %xmm0 # sched: [8:0.50]
-; ZNVER1-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pmovsxbq:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpmovsxbq (%rdi), %xmm1 # sched: [8:0.50]
-; ZNVER1-NEXT: vpmovsxbq %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = shufflevector <16 x i8> %a0, <16 x i8> undef, <2 x i32> <i32 0, i32 1>
- %2 = sext <2 x i8> %1 to <2 x i64>
- %3 = load <2 x i8>, <2 x i8>* %a1, align 1
- %4 = sext <2 x i8> %3 to <2 x i64>
- %5 = add <2 x i64> %2, %4
- ret <2 x i64> %5
-}
-
-define <2 x i64> @test_pmovsxdq(<4 x i32> %a0, <2 x i32> *%a1) {
-; GENERIC-LABEL: test_pmovsxdq:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pmovsxdq %xmm0, %xmm1 # sched: [1:0.50]
-; GENERIC-NEXT: pmovsxdq (%rdi), %xmm0 # sched: [7:0.50]
-; GENERIC-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_pmovsxdq:
-; SLM: # %bb.0:
-; SLM-NEXT: pmovsxdq (%rdi), %xmm1 # sched: [4:1.00]
-; SLM-NEXT: pmovsxdq %xmm0, %xmm0 # sched: [1:1.00]
-; SLM-NEXT: paddq %xmm0, %xmm1 # sched: [1:0.50]
-; SLM-NEXT: movdqa %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pmovsxdq:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pmovsxdq %xmm0, %xmm1 # sched: [1:0.50]
-; SANDY-SSE-NEXT: pmovsxdq (%rdi), %xmm0 # sched: [7:0.50]
-; SANDY-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pmovsxdq:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpmovsxdq %xmm0, %xmm0 # sched: [1:0.50]
-; SANDY-NEXT: vpmovsxdq (%rdi), %xmm1 # sched: [7:0.50]
-; SANDY-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pmovsxdq:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pmovsxdq %xmm0, %xmm1 # sched: [1:1.00]
-; HASWELL-SSE-NEXT: pmovsxdq (%rdi), %xmm0 # sched: [6:1.00]
-; HASWELL-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pmovsxdq:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpmovsxdq %xmm0, %xmm0 # sched: [1:1.00]
-; HASWELL-NEXT: vpmovsxdq (%rdi), %xmm1 # sched: [6:1.00]
-; HASWELL-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pmovsxdq:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pmovsxdq %xmm0, %xmm1 # sched: [1:1.00]
-; BROADWELL-SSE-NEXT: pmovsxdq (%rdi), %xmm0 # sched: [6:1.00]
-; BROADWELL-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pmovsxdq:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpmovsxdq %xmm0, %xmm0 # sched: [1:1.00]
-; BROADWELL-NEXT: vpmovsxdq (%rdi), %xmm1 # sched: [6:1.00]
-; BROADWELL-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pmovsxdq:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pmovsxdq %xmm0, %xmm1 # sched: [1:1.00]
-; SKYLAKE-SSE-NEXT: pmovsxdq (%rdi), %xmm0 # sched: [6:1.00]
-; SKYLAKE-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.33]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pmovsxdq:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpmovsxdq %xmm0, %xmm0 # sched: [1:1.00]
-; SKYLAKE-NEXT: vpmovsxdq (%rdi), %xmm1 # sched: [6:1.00]
-; SKYLAKE-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pmovsxdq:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pmovsxdq %xmm0, %xmm1 # sched: [1:1.00]
-; SKX-SSE-NEXT: pmovsxdq (%rdi), %xmm0 # sched: [6:1.00]
-; SKX-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.33]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pmovsxdq:
-; SKX: # %bb.0:
-; SKX-NEXT: vpmovsxdq %xmm0, %xmm0 # sched: [1:1.00]
-; SKX-NEXT: vpmovsxdq (%rdi), %xmm1 # sched: [6:1.00]
-; SKX-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pmovsxdq:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pmovsxdq %xmm0, %xmm1 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: pmovsxdq (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pmovsxdq:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpmovsxdq (%rdi), %xmm1 # sched: [7:0.50]
-; BDVER2-NEXT: vpmovsxdq %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pmovsxdq:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pmovsxdq %xmm0, %xmm1 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: pmovsxdq (%rdi), %xmm0 # sched: [6:1.00]
-; BTVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pmovsxdq:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpmovsxdq (%rdi), %xmm1 # sched: [6:1.00]
-; BTVER2-NEXT: vpmovsxdq %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pmovsxdq:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pmovsxdq %xmm0, %xmm1 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: pmovsxdq (%rdi), %xmm0 # sched: [8:0.50]
-; ZNVER1-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pmovsxdq:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpmovsxdq (%rdi), %xmm1 # sched: [8:0.50]
-; ZNVER1-NEXT: vpmovsxdq %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = shufflevector <4 x i32> %a0, <4 x i32> undef, <2 x i32> <i32 0, i32 1>
- %2 = sext <2 x i32> %1 to <2 x i64>
- %3 = load <2 x i32>, <2 x i32>* %a1, align 1
- %4 = sext <2 x i32> %3 to <2 x i64>
- %5 = add <2 x i64> %2, %4
- ret <2 x i64> %5
-}
-
-define <4 x i32> @test_pmovsxwd(<8 x i16> %a0, <4 x i16> *%a1) {
-; GENERIC-LABEL: test_pmovsxwd:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pmovsxwd %xmm0, %xmm1 # sched: [1:0.50]
-; GENERIC-NEXT: pmovsxwd (%rdi), %xmm0 # sched: [7:0.50]
-; GENERIC-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_pmovsxwd:
-; SLM: # %bb.0:
-; SLM-NEXT: pmovsxwd (%rdi), %xmm1 # sched: [4:1.00]
-; SLM-NEXT: pmovsxwd %xmm0, %xmm0 # sched: [1:1.00]
-; SLM-NEXT: paddd %xmm0, %xmm1 # sched: [1:0.50]
-; SLM-NEXT: movdqa %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pmovsxwd:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pmovsxwd %xmm0, %xmm1 # sched: [1:0.50]
-; SANDY-SSE-NEXT: pmovsxwd (%rdi), %xmm0 # sched: [7:0.50]
-; SANDY-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.50]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pmovsxwd:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpmovsxwd %xmm0, %xmm0 # sched: [1:0.50]
-; SANDY-NEXT: vpmovsxwd (%rdi), %xmm1 # sched: [7:0.50]
-; SANDY-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pmovsxwd:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pmovsxwd %xmm0, %xmm1 # sched: [1:1.00]
-; HASWELL-SSE-NEXT: pmovsxwd (%rdi), %xmm0 # sched: [6:1.00]
-; HASWELL-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.50]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pmovsxwd:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpmovsxwd %xmm0, %xmm0 # sched: [1:1.00]
-; HASWELL-NEXT: vpmovsxwd (%rdi), %xmm1 # sched: [6:1.00]
-; HASWELL-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pmovsxwd:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pmovsxwd %xmm0, %xmm1 # sched: [1:1.00]
-; BROADWELL-SSE-NEXT: pmovsxwd (%rdi), %xmm0 # sched: [6:1.00]
-; BROADWELL-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.50]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pmovsxwd:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpmovsxwd %xmm0, %xmm0 # sched: [1:1.00]
-; BROADWELL-NEXT: vpmovsxwd (%rdi), %xmm1 # sched: [6:1.00]
-; BROADWELL-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pmovsxwd:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pmovsxwd %xmm0, %xmm1 # sched: [1:1.00]
-; SKYLAKE-SSE-NEXT: pmovsxwd (%rdi), %xmm0 # sched: [6:1.00]
-; SKYLAKE-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.33]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pmovsxwd:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpmovsxwd %xmm0, %xmm0 # sched: [1:1.00]
-; SKYLAKE-NEXT: vpmovsxwd (%rdi), %xmm1 # sched: [6:1.00]
-; SKYLAKE-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pmovsxwd:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pmovsxwd %xmm0, %xmm1 # sched: [1:1.00]
-; SKX-SSE-NEXT: pmovsxwd (%rdi), %xmm0 # sched: [6:1.00]
-; SKX-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.33]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pmovsxwd:
-; SKX: # %bb.0:
-; SKX-NEXT: vpmovsxwd %xmm0, %xmm0 # sched: [1:1.00]
-; SKX-NEXT: vpmovsxwd (%rdi), %xmm1 # sched: [6:1.00]
-; SKX-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pmovsxwd:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pmovsxwd %xmm0, %xmm1 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: pmovsxwd (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER2-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pmovsxwd:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpmovsxwd (%rdi), %xmm1 # sched: [7:0.50]
-; BDVER2-NEXT: vpmovsxwd %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pmovsxwd:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pmovsxwd %xmm0, %xmm1 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: pmovsxwd (%rdi), %xmm0 # sched: [6:1.00]
-; BTVER2-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pmovsxwd:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpmovsxwd (%rdi), %xmm1 # sched: [6:1.00]
-; BTVER2-NEXT: vpmovsxwd %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pmovsxwd:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pmovsxwd %xmm0, %xmm1 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: pmovsxwd (%rdi), %xmm0 # sched: [8:0.50]
-; ZNVER1-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pmovsxwd:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpmovsxwd (%rdi), %xmm1 # sched: [8:0.50]
-; ZNVER1-NEXT: vpmovsxwd %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = shufflevector <8 x i16> %a0, <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
- %2 = sext <4 x i16> %1 to <4 x i32>
- %3 = load <4 x i16>, <4 x i16>* %a1, align 1
- %4 = sext <4 x i16> %3 to <4 x i32>
- %5 = add <4 x i32> %2, %4
- ret <4 x i32> %5
-}
-
-define <2 x i64> @test_pmovsxwq(<8 x i16> %a0, <2 x i16> *%a1) {
-; GENERIC-LABEL: test_pmovsxwq:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pmovsxwq %xmm0, %xmm1 # sched: [1:0.50]
-; GENERIC-NEXT: pmovsxwq (%rdi), %xmm0 # sched: [7:0.50]
-; GENERIC-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_pmovsxwq:
-; SLM: # %bb.0:
-; SLM-NEXT: pmovsxwq (%rdi), %xmm1 # sched: [4:1.00]
-; SLM-NEXT: pmovsxwq %xmm0, %xmm0 # sched: [1:1.00]
-; SLM-NEXT: paddq %xmm0, %xmm1 # sched: [1:0.50]
-; SLM-NEXT: movdqa %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pmovsxwq:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pmovsxwq %xmm0, %xmm1 # sched: [1:0.50]
-; SANDY-SSE-NEXT: pmovsxwq (%rdi), %xmm0 # sched: [7:0.50]
-; SANDY-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pmovsxwq:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpmovsxwq %xmm0, %xmm0 # sched: [1:0.50]
-; SANDY-NEXT: vpmovsxwq (%rdi), %xmm1 # sched: [7:0.50]
-; SANDY-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pmovsxwq:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pmovsxwq %xmm0, %xmm1 # sched: [1:1.00]
-; HASWELL-SSE-NEXT: pmovsxwq (%rdi), %xmm0 # sched: [6:1.00]
-; HASWELL-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pmovsxwq:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpmovsxwq %xmm0, %xmm0 # sched: [1:1.00]
-; HASWELL-NEXT: vpmovsxwq (%rdi), %xmm1 # sched: [6:1.00]
-; HASWELL-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pmovsxwq:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pmovsxwq %xmm0, %xmm1 # sched: [1:1.00]
-; BROADWELL-SSE-NEXT: pmovsxwq (%rdi), %xmm0 # sched: [6:1.00]
-; BROADWELL-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pmovsxwq:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpmovsxwq %xmm0, %xmm0 # sched: [1:1.00]
-; BROADWELL-NEXT: vpmovsxwq (%rdi), %xmm1 # sched: [6:1.00]
-; BROADWELL-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pmovsxwq:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pmovsxwq %xmm0, %xmm1 # sched: [1:1.00]
-; SKYLAKE-SSE-NEXT: pmovsxwq (%rdi), %xmm0 # sched: [6:1.00]
-; SKYLAKE-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.33]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pmovsxwq:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpmovsxwq %xmm0, %xmm0 # sched: [1:1.00]
-; SKYLAKE-NEXT: vpmovsxwq (%rdi), %xmm1 # sched: [6:1.00]
-; SKYLAKE-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pmovsxwq:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pmovsxwq %xmm0, %xmm1 # sched: [1:1.00]
-; SKX-SSE-NEXT: pmovsxwq (%rdi), %xmm0 # sched: [6:1.00]
-; SKX-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.33]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pmovsxwq:
-; SKX: # %bb.0:
-; SKX-NEXT: vpmovsxwq %xmm0, %xmm0 # sched: [1:1.00]
-; SKX-NEXT: vpmovsxwq (%rdi), %xmm1 # sched: [6:1.00]
-; SKX-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pmovsxwq:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pmovsxwq %xmm0, %xmm1 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: pmovsxwq (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pmovsxwq:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpmovsxwq (%rdi), %xmm1 # sched: [7:0.50]
-; BDVER2-NEXT: vpmovsxwq %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pmovsxwq:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pmovsxwq %xmm0, %xmm1 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: pmovsxwq (%rdi), %xmm0 # sched: [6:1.00]
-; BTVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pmovsxwq:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpmovsxwq (%rdi), %xmm1 # sched: [6:1.00]
-; BTVER2-NEXT: vpmovsxwq %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pmovsxwq:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pmovsxwq %xmm0, %xmm1 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: pmovsxwq (%rdi), %xmm0 # sched: [8:0.50]
-; ZNVER1-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pmovsxwq:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpmovsxwq (%rdi), %xmm1 # sched: [8:0.50]
-; ZNVER1-NEXT: vpmovsxwq %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = shufflevector <8 x i16> %a0, <8 x i16> undef, <2 x i32> <i32 0, i32 1>
- %2 = sext <2 x i16> %1 to <2 x i64>
- %3 = load <2 x i16>, <2 x i16>* %a1, align 1
- %4 = sext <2 x i16> %3 to <2 x i64>
- %5 = add <2 x i64> %2, %4
- ret <2 x i64> %5
-}
-
-define <8 x i16> @test_pmovzxbw(<16 x i8> %a0, <8 x i8> *%a1) {
-; GENERIC-LABEL: test_pmovzxbw:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pmovzxbw {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero sched: [1:0.50]
-; GENERIC-NEXT: pmovzxbw {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero sched: [7:0.50]
-; GENERIC-NEXT: paddw %xmm1, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_pmovzxbw:
-; SLM: # %bb.0:
-; SLM-NEXT: pmovzxbw {{.*#+}} xmm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero sched: [4:1.00]
-; SLM-NEXT: pmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero sched: [1:1.00]
-; SLM-NEXT: paddw %xmm0, %xmm1 # sched: [1:0.50]
-; SLM-NEXT: movdqa %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pmovzxbw:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pmovzxbw {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero sched: [1:0.50]
-; SANDY-SSE-NEXT: pmovzxbw {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero sched: [7:0.50]
-; SANDY-SSE-NEXT: paddw %xmm1, %xmm0 # sched: [1:0.50]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pmovzxbw:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero sched: [1:0.50]
-; SANDY-NEXT: vpmovzxbw {{.*#+}} xmm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero sched: [7:0.50]
-; SANDY-NEXT: vpaddw %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pmovzxbw:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pmovzxbw {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero sched: [1:1.00]
-; HASWELL-SSE-NEXT: pmovzxbw {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero sched: [6:1.00]
-; HASWELL-SSE-NEXT: paddw %xmm1, %xmm0 # sched: [1:0.50]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pmovzxbw:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero sched: [1:1.00]
-; HASWELL-NEXT: vpmovzxbw {{.*#+}} xmm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero sched: [6:1.00]
-; HASWELL-NEXT: vpaddw %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pmovzxbw:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pmovzxbw {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero sched: [1:1.00]
-; BROADWELL-SSE-NEXT: pmovzxbw {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero sched: [6:1.00]
-; BROADWELL-SSE-NEXT: paddw %xmm1, %xmm0 # sched: [1:0.50]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pmovzxbw:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero sched: [1:1.00]
-; BROADWELL-NEXT: vpmovzxbw {{.*#+}} xmm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero sched: [6:1.00]
-; BROADWELL-NEXT: vpaddw %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pmovzxbw:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pmovzxbw {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero sched: [1:1.00]
-; SKYLAKE-SSE-NEXT: pmovzxbw {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero sched: [6:1.00]
-; SKYLAKE-SSE-NEXT: paddw %xmm1, %xmm0 # sched: [1:0.33]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pmovzxbw:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero sched: [1:1.00]
-; SKYLAKE-NEXT: vpmovzxbw {{.*#+}} xmm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero sched: [6:1.00]
-; SKYLAKE-NEXT: vpaddw %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pmovzxbw:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pmovzxbw {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero sched: [1:1.00]
-; SKX-SSE-NEXT: pmovzxbw {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero sched: [6:1.00]
-; SKX-SSE-NEXT: paddw %xmm1, %xmm0 # sched: [1:0.33]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pmovzxbw:
-; SKX: # %bb.0:
-; SKX-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero sched: [1:1.00]
-; SKX-NEXT: vpmovzxbw {{.*#+}} xmm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero sched: [6:1.00]
-; SKX-NEXT: vpaddw %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pmovzxbw:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pmovzxbw {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero sched: [2:0.50]
-; BDVER2-SSE-NEXT: pmovzxbw {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero sched: [7:0.50]
-; BDVER2-SSE-NEXT: paddw %xmm1, %xmm0 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pmovzxbw:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpmovzxbw {{.*#+}} xmm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero sched: [7:0.50]
-; BDVER2-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero sched: [2:0.50]
-; BDVER2-NEXT: vpaddw %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pmovzxbw:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pmovzxbw {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero sched: [1:0.50]
-; BTVER2-SSE-NEXT: pmovzxbw {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero sched: [6:1.00]
-; BTVER2-SSE-NEXT: paddw %xmm1, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pmovzxbw:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpmovzxbw {{.*#+}} xmm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero sched: [6:1.00]
-; BTVER2-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero sched: [1:0.50]
-; BTVER2-NEXT: vpaddw %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pmovzxbw:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pmovzxbw {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero sched: [1:0.25]
-; ZNVER1-SSE-NEXT: pmovzxbw {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero sched: [8:0.50]
-; ZNVER1-SSE-NEXT: paddw %xmm1, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pmovzxbw:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpmovzxbw {{.*#+}} xmm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero sched: [8:0.50]
-; ZNVER1-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero sched: [1:0.25]
-; ZNVER1-NEXT: vpaddw %xmm1, %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = shufflevector <16 x i8> %a0, <16 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
- %2 = zext <8 x i8> %1 to <8 x i16>
- %3 = load <8 x i8>, <8 x i8>* %a1, align 1
- %4 = zext <8 x i8> %3 to <8 x i16>
- %5 = add <8 x i16> %2, %4
- ret <8 x i16> %5
-}
-
-define <4 x i32> @test_pmovzxbd(<16 x i8> %a0, <4 x i8> *%a1) {
-; GENERIC-LABEL: test_pmovzxbd:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero sched: [1:0.50]
-; GENERIC-NEXT: pmovzxbd {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero sched: [7:0.50]
-; GENERIC-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_pmovzxbd:
-; SLM: # %bb.0:
-; SLM-NEXT: pmovzxbd {{.*#+}} xmm1 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero sched: [4:1.00]
-; SLM-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero sched: [1:1.00]
-; SLM-NEXT: paddd %xmm0, %xmm1 # sched: [1:0.50]
-; SLM-NEXT: movdqa %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pmovzxbd:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero sched: [1:0.50]
-; SANDY-SSE-NEXT: pmovzxbd {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero sched: [7:0.50]
-; SANDY-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.50]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pmovzxbd:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero sched: [1:0.50]
-; SANDY-NEXT: vpmovzxbd {{.*#+}} xmm1 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero sched: [7:0.50]
-; SANDY-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pmovzxbd:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero sched: [1:1.00]
-; HASWELL-SSE-NEXT: pmovzxbd {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero sched: [6:1.00]
-; HASWELL-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.50]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pmovzxbd:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero sched: [1:1.00]
-; HASWELL-NEXT: vpmovzxbd {{.*#+}} xmm1 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero sched: [6:1.00]
-; HASWELL-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pmovzxbd:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero sched: [1:1.00]
-; BROADWELL-SSE-NEXT: pmovzxbd {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero sched: [6:1.00]
-; BROADWELL-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.50]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pmovzxbd:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero sched: [1:1.00]
-; BROADWELL-NEXT: vpmovzxbd {{.*#+}} xmm1 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero sched: [6:1.00]
-; BROADWELL-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pmovzxbd:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero sched: [1:1.00]
-; SKYLAKE-SSE-NEXT: pmovzxbd {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero sched: [6:1.00]
-; SKYLAKE-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.33]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pmovzxbd:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero sched: [1:1.00]
-; SKYLAKE-NEXT: vpmovzxbd {{.*#+}} xmm1 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero sched: [6:1.00]
-; SKYLAKE-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pmovzxbd:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero sched: [1:1.00]
-; SKX-SSE-NEXT: pmovzxbd {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero sched: [6:1.00]
-; SKX-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.33]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pmovzxbd:
-; SKX: # %bb.0:
-; SKX-NEXT: vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero sched: [1:1.00]
-; SKX-NEXT: vpmovzxbd {{.*#+}} xmm1 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero sched: [6:1.00]
-; SKX-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pmovzxbd:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero sched: [2:0.50]
-; BDVER2-SSE-NEXT: pmovzxbd {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero sched: [7:0.50]
-; BDVER2-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pmovzxbd:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpmovzxbd {{.*#+}} xmm1 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero sched: [7:0.50]
-; BDVER2-NEXT: vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero sched: [2:0.50]
-; BDVER2-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pmovzxbd:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero sched: [1:0.50]
-; BTVER2-SSE-NEXT: pmovzxbd {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero sched: [6:1.00]
-; BTVER2-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pmovzxbd:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpmovzxbd {{.*#+}} xmm1 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero sched: [6:1.00]
-; BTVER2-NEXT: vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero sched: [1:0.50]
-; BTVER2-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pmovzxbd:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero sched: [1:0.25]
-; ZNVER1-SSE-NEXT: pmovzxbd {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero sched: [8:0.50]
-; ZNVER1-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pmovzxbd:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpmovzxbd {{.*#+}} xmm1 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero sched: [8:0.50]
-; ZNVER1-NEXT: vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero sched: [1:0.25]
-; ZNVER1-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = shufflevector <16 x i8> %a0, <16 x i8> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
- %2 = zext <4 x i8> %1 to <4 x i32>
- %3 = load <4 x i8>, <4 x i8>* %a1, align 1
- %4 = zext <4 x i8> %3 to <4 x i32>
- %5 = add <4 x i32> %2, %4
- ret <4 x i32> %5
-}
-
-define <2 x i64> @test_pmovzxbq(<16 x i8> %a0, <2 x i8> *%a1) {
-; GENERIC-LABEL: test_pmovzxbq:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pmovzxbq {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero sched: [1:0.50]
-; GENERIC-NEXT: pmovzxbq {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero sched: [7:0.50]
-; GENERIC-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_pmovzxbq:
-; SLM: # %bb.0:
-; SLM-NEXT: pmovzxbq {{.*#+}} xmm1 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero sched: [4:1.00]
-; SLM-NEXT: pmovzxbq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero sched: [1:1.00]
-; SLM-NEXT: paddq %xmm0, %xmm1 # sched: [1:0.50]
-; SLM-NEXT: movdqa %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pmovzxbq:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pmovzxbq {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero sched: [1:0.50]
-; SANDY-SSE-NEXT: pmovzxbq {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero sched: [7:0.50]
-; SANDY-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pmovzxbq:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpmovzxbq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero sched: [1:0.50]
-; SANDY-NEXT: vpmovzxbq {{.*#+}} xmm1 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero sched: [7:0.50]
-; SANDY-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pmovzxbq:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pmovzxbq {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero sched: [1:1.00]
-; HASWELL-SSE-NEXT: pmovzxbq {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero sched: [6:1.00]
-; HASWELL-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pmovzxbq:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpmovzxbq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero sched: [1:1.00]
-; HASWELL-NEXT: vpmovzxbq {{.*#+}} xmm1 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero sched: [6:1.00]
-; HASWELL-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pmovzxbq:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pmovzxbq {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero sched: [1:1.00]
-; BROADWELL-SSE-NEXT: pmovzxbq {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero sched: [6:1.00]
-; BROADWELL-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pmovzxbq:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpmovzxbq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero sched: [1:1.00]
-; BROADWELL-NEXT: vpmovzxbq {{.*#+}} xmm1 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero sched: [6:1.00]
-; BROADWELL-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pmovzxbq:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pmovzxbq {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero sched: [1:1.00]
-; SKYLAKE-SSE-NEXT: pmovzxbq {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero sched: [6:1.00]
-; SKYLAKE-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.33]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pmovzxbq:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpmovzxbq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero sched: [1:1.00]
-; SKYLAKE-NEXT: vpmovzxbq {{.*#+}} xmm1 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero sched: [6:1.00]
-; SKYLAKE-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pmovzxbq:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pmovzxbq {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero sched: [1:1.00]
-; SKX-SSE-NEXT: pmovzxbq {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero sched: [6:1.00]
-; SKX-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.33]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pmovzxbq:
-; SKX: # %bb.0:
-; SKX-NEXT: vpmovzxbq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero sched: [1:1.00]
-; SKX-NEXT: vpmovzxbq {{.*#+}} xmm1 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero sched: [6:1.00]
-; SKX-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pmovzxbq:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pmovzxbq {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero sched: [2:0.50]
-; BDVER2-SSE-NEXT: pmovzxbq {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero sched: [7:0.50]
-; BDVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pmovzxbq:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpmovzxbq {{.*#+}} xmm1 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero sched: [7:0.50]
-; BDVER2-NEXT: vpmovzxbq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero sched: [2:0.50]
-; BDVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pmovzxbq:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pmovzxbq {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero sched: [1:0.50]
-; BTVER2-SSE-NEXT: pmovzxbq {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero sched: [6:1.00]
-; BTVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pmovzxbq:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpmovzxbq {{.*#+}} xmm1 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero sched: [6:1.00]
-; BTVER2-NEXT: vpmovzxbq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero sched: [1:0.50]
-; BTVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pmovzxbq:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pmovzxbq {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero sched: [1:0.25]
-; ZNVER1-SSE-NEXT: pmovzxbq {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero sched: [8:0.50]
-; ZNVER1-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pmovzxbq:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpmovzxbq {{.*#+}} xmm1 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero sched: [8:0.50]
-; ZNVER1-NEXT: vpmovzxbq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero sched: [1:0.25]
-; ZNVER1-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = shufflevector <16 x i8> %a0, <16 x i8> undef, <2 x i32> <i32 0, i32 1>
- %2 = zext <2 x i8> %1 to <2 x i64>
- %3 = load <2 x i8>, <2 x i8>* %a1, align 1
- %4 = zext <2 x i8> %3 to <2 x i64>
- %5 = add <2 x i64> %2, %4
- ret <2 x i64> %5
-}
-
-define <2 x i64> @test_pmovzxdq(<4 x i32> %a0, <2 x i32> *%a1) {
-; GENERIC-LABEL: test_pmovzxdq:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pmovzxdq {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero sched: [1:0.50]
-; GENERIC-NEXT: pmovzxdq {{.*#+}} xmm0 = mem[0],zero,mem[1],zero sched: [7:0.50]
-; GENERIC-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_pmovzxdq:
-; SLM: # %bb.0:
-; SLM-NEXT: pmovzxdq {{.*#+}} xmm1 = mem[0],zero,mem[1],zero sched: [4:1.00]
-; SLM-NEXT: pmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero sched: [1:1.00]
-; SLM-NEXT: paddq %xmm0, %xmm1 # sched: [1:0.50]
-; SLM-NEXT: movdqa %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pmovzxdq:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pmovzxdq {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero sched: [1:0.50]
-; SANDY-SSE-NEXT: pmovzxdq {{.*#+}} xmm0 = mem[0],zero,mem[1],zero sched: [7:0.50]
-; SANDY-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pmovzxdq:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero sched: [1:0.50]
-; SANDY-NEXT: vpmovzxdq {{.*#+}} xmm1 = mem[0],zero,mem[1],zero sched: [7:0.50]
-; SANDY-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pmovzxdq:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pmovzxdq {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero sched: [1:1.00]
-; HASWELL-SSE-NEXT: pmovzxdq {{.*#+}} xmm0 = mem[0],zero,mem[1],zero sched: [6:1.00]
-; HASWELL-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pmovzxdq:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero sched: [1:1.00]
-; HASWELL-NEXT: vpmovzxdq {{.*#+}} xmm1 = mem[0],zero,mem[1],zero sched: [6:1.00]
-; HASWELL-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pmovzxdq:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pmovzxdq {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero sched: [1:1.00]
-; BROADWELL-SSE-NEXT: pmovzxdq {{.*#+}} xmm0 = mem[0],zero,mem[1],zero sched: [6:1.00]
-; BROADWELL-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pmovzxdq:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero sched: [1:1.00]
-; BROADWELL-NEXT: vpmovzxdq {{.*#+}} xmm1 = mem[0],zero,mem[1],zero sched: [6:1.00]
-; BROADWELL-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pmovzxdq:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pmovzxdq {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero sched: [1:1.00]
-; SKYLAKE-SSE-NEXT: pmovzxdq {{.*#+}} xmm0 = mem[0],zero,mem[1],zero sched: [6:1.00]
-; SKYLAKE-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.33]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pmovzxdq:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero sched: [1:1.00]
-; SKYLAKE-NEXT: vpmovzxdq {{.*#+}} xmm1 = mem[0],zero,mem[1],zero sched: [6:1.00]
-; SKYLAKE-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pmovzxdq:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pmovzxdq {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero sched: [1:1.00]
-; SKX-SSE-NEXT: pmovzxdq {{.*#+}} xmm0 = mem[0],zero,mem[1],zero sched: [6:1.00]
-; SKX-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.33]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pmovzxdq:
-; SKX: # %bb.0:
-; SKX-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero sched: [1:1.00]
-; SKX-NEXT: vpmovzxdq {{.*#+}} xmm1 = mem[0],zero,mem[1],zero sched: [6:1.00]
-; SKX-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pmovzxdq:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pmovzxdq {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero sched: [2:0.50]
-; BDVER2-SSE-NEXT: pmovzxdq {{.*#+}} xmm0 = mem[0],zero,mem[1],zero sched: [7:0.50]
-; BDVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pmovzxdq:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpmovzxdq {{.*#+}} xmm1 = mem[0],zero,mem[1],zero sched: [7:0.50]
-; BDVER2-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero sched: [2:0.50]
-; BDVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pmovzxdq:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pmovzxdq {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero sched: [1:0.50]
-; BTVER2-SSE-NEXT: pmovzxdq {{.*#+}} xmm0 = mem[0],zero,mem[1],zero sched: [6:1.00]
-; BTVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pmovzxdq:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpmovzxdq {{.*#+}} xmm1 = mem[0],zero,mem[1],zero sched: [6:1.00]
-; BTVER2-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero sched: [1:0.50]
-; BTVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pmovzxdq:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pmovzxdq {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero sched: [1:0.25]
-; ZNVER1-SSE-NEXT: pmovzxdq {{.*#+}} xmm0 = mem[0],zero,mem[1],zero sched: [8:0.50]
-; ZNVER1-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pmovzxdq:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpmovzxdq {{.*#+}} xmm1 = mem[0],zero,mem[1],zero sched: [8:0.50]
-; ZNVER1-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero sched: [1:0.25]
-; ZNVER1-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = shufflevector <4 x i32> %a0, <4 x i32> undef, <2 x i32> <i32 0, i32 1>
- %2 = zext <2 x i32> %1 to <2 x i64>
- %3 = load <2 x i32>, <2 x i32>* %a1, align 1
- %4 = zext <2 x i32> %3 to <2 x i64>
- %5 = add <2 x i64> %2, %4
- ret <2 x i64> %5
-}
-
-define <4 x i32> @test_pmovzxwd(<8 x i16> %a0, <4 x i16> *%a1) {
-; GENERIC-LABEL: test_pmovzxwd:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pmovzxwd {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero sched: [1:0.50]
-; GENERIC-NEXT: pmovzxwd {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero sched: [7:0.50]
-; GENERIC-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_pmovzxwd:
-; SLM: # %bb.0:
-; SLM-NEXT: pmovzxwd {{.*#+}} xmm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero sched: [4:1.00]
-; SLM-NEXT: pmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero sched: [1:1.00]
-; SLM-NEXT: paddd %xmm0, %xmm1 # sched: [1:0.50]
-; SLM-NEXT: movdqa %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pmovzxwd:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pmovzxwd {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero sched: [1:0.50]
-; SANDY-SSE-NEXT: pmovzxwd {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero sched: [7:0.50]
-; SANDY-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.50]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pmovzxwd:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero sched: [1:0.50]
-; SANDY-NEXT: vpmovzxwd {{.*#+}} xmm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero sched: [7:0.50]
-; SANDY-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pmovzxwd:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pmovzxwd {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero sched: [1:1.00]
-; HASWELL-SSE-NEXT: pmovzxwd {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero sched: [6:1.00]
-; HASWELL-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.50]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pmovzxwd:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero sched: [1:1.00]
-; HASWELL-NEXT: vpmovzxwd {{.*#+}} xmm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero sched: [6:1.00]
-; HASWELL-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pmovzxwd:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pmovzxwd {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero sched: [1:1.00]
-; BROADWELL-SSE-NEXT: pmovzxwd {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero sched: [6:1.00]
-; BROADWELL-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.50]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pmovzxwd:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero sched: [1:1.00]
-; BROADWELL-NEXT: vpmovzxwd {{.*#+}} xmm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero sched: [6:1.00]
-; BROADWELL-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pmovzxwd:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pmovzxwd {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero sched: [1:1.00]
-; SKYLAKE-SSE-NEXT: pmovzxwd {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero sched: [6:1.00]
-; SKYLAKE-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.33]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pmovzxwd:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero sched: [1:1.00]
-; SKYLAKE-NEXT: vpmovzxwd {{.*#+}} xmm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero sched: [6:1.00]
-; SKYLAKE-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pmovzxwd:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pmovzxwd {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero sched: [1:1.00]
-; SKX-SSE-NEXT: pmovzxwd {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero sched: [6:1.00]
-; SKX-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.33]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pmovzxwd:
-; SKX: # %bb.0:
-; SKX-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero sched: [1:1.00]
-; SKX-NEXT: vpmovzxwd {{.*#+}} xmm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero sched: [6:1.00]
-; SKX-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pmovzxwd:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pmovzxwd {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero sched: [2:0.50]
-; BDVER2-SSE-NEXT: pmovzxwd {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero sched: [7:0.50]
-; BDVER2-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pmovzxwd:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpmovzxwd {{.*#+}} xmm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero sched: [7:0.50]
-; BDVER2-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero sched: [2:0.50]
-; BDVER2-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pmovzxwd:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pmovzxwd {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero sched: [1:0.50]
-; BTVER2-SSE-NEXT: pmovzxwd {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero sched: [6:1.00]
-; BTVER2-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pmovzxwd:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpmovzxwd {{.*#+}} xmm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero sched: [6:1.00]
-; BTVER2-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero sched: [1:0.50]
-; BTVER2-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pmovzxwd:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pmovzxwd {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero sched: [1:0.25]
-; ZNVER1-SSE-NEXT: pmovzxwd {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero sched: [8:0.50]
-; ZNVER1-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pmovzxwd:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpmovzxwd {{.*#+}} xmm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero sched: [8:0.50]
-; ZNVER1-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero sched: [1:0.25]
-; ZNVER1-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = shufflevector <8 x i16> %a0, <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
- %2 = zext <4 x i16> %1 to <4 x i32>
- %3 = load <4 x i16>, <4 x i16>* %a1, align 1
- %4 = zext <4 x i16> %3 to <4 x i32>
- %5 = add <4 x i32> %2, %4
- ret <4 x i32> %5
-}
-
-define <2 x i64> @test_pmovzxwq(<8 x i16> %a0, <2 x i16> *%a1) {
-; GENERIC-LABEL: test_pmovzxwq:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pmovzxwq {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero sched: [1:0.50]
-; GENERIC-NEXT: pmovzxwq {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero sched: [7:0.50]
-; GENERIC-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_pmovzxwq:
-; SLM: # %bb.0:
-; SLM-NEXT: pmovzxwq {{.*#+}} xmm1 = mem[0],zero,zero,zero,mem[1],zero,zero,zero sched: [4:1.00]
-; SLM-NEXT: pmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero sched: [1:1.00]
-; SLM-NEXT: paddq %xmm0, %xmm1 # sched: [1:0.50]
-; SLM-NEXT: movdqa %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pmovzxwq:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pmovzxwq {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero sched: [1:0.50]
-; SANDY-SSE-NEXT: pmovzxwq {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero sched: [7:0.50]
-; SANDY-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pmovzxwq:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero sched: [1:0.50]
-; SANDY-NEXT: vpmovzxwq {{.*#+}} xmm1 = mem[0],zero,zero,zero,mem[1],zero,zero,zero sched: [7:0.50]
-; SANDY-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pmovzxwq:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pmovzxwq {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero sched: [1:1.00]
-; HASWELL-SSE-NEXT: pmovzxwq {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero sched: [6:1.00]
-; HASWELL-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pmovzxwq:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero sched: [1:1.00]
-; HASWELL-NEXT: vpmovzxwq {{.*#+}} xmm1 = mem[0],zero,zero,zero,mem[1],zero,zero,zero sched: [6:1.00]
-; HASWELL-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pmovzxwq:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pmovzxwq {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero sched: [1:1.00]
-; BROADWELL-SSE-NEXT: pmovzxwq {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero sched: [6:1.00]
-; BROADWELL-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pmovzxwq:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero sched: [1:1.00]
-; BROADWELL-NEXT: vpmovzxwq {{.*#+}} xmm1 = mem[0],zero,zero,zero,mem[1],zero,zero,zero sched: [6:1.00]
-; BROADWELL-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pmovzxwq:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pmovzxwq {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero sched: [1:1.00]
-; SKYLAKE-SSE-NEXT: pmovzxwq {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero sched: [6:1.00]
-; SKYLAKE-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.33]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pmovzxwq:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero sched: [1:1.00]
-; SKYLAKE-NEXT: vpmovzxwq {{.*#+}} xmm1 = mem[0],zero,zero,zero,mem[1],zero,zero,zero sched: [6:1.00]
-; SKYLAKE-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pmovzxwq:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pmovzxwq {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero sched: [1:1.00]
-; SKX-SSE-NEXT: pmovzxwq {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero sched: [6:1.00]
-; SKX-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.33]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pmovzxwq:
-; SKX: # %bb.0:
-; SKX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero sched: [1:1.00]
-; SKX-NEXT: vpmovzxwq {{.*#+}} xmm1 = mem[0],zero,zero,zero,mem[1],zero,zero,zero sched: [6:1.00]
-; SKX-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pmovzxwq:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pmovzxwq {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero sched: [2:0.50]
-; BDVER2-SSE-NEXT: pmovzxwq {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero sched: [7:0.50]
-; BDVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pmovzxwq:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpmovzxwq {{.*#+}} xmm1 = mem[0],zero,zero,zero,mem[1],zero,zero,zero sched: [7:0.50]
-; BDVER2-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero sched: [2:0.50]
-; BDVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pmovzxwq:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pmovzxwq {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero sched: [1:0.50]
-; BTVER2-SSE-NEXT: pmovzxwq {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero sched: [6:1.00]
-; BTVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pmovzxwq:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpmovzxwq {{.*#+}} xmm1 = mem[0],zero,zero,zero,mem[1],zero,zero,zero sched: [6:1.00]
-; BTVER2-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero sched: [1:0.50]
-; BTVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pmovzxwq:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pmovzxwq {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero sched: [1:0.25]
-; ZNVER1-SSE-NEXT: pmovzxwq {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero sched: [8:0.50]
-; ZNVER1-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pmovzxwq:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpmovzxwq {{.*#+}} xmm1 = mem[0],zero,zero,zero,mem[1],zero,zero,zero sched: [8:0.50]
-; ZNVER1-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero sched: [1:0.25]
-; ZNVER1-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = shufflevector <8 x i16> %a0, <8 x i16> undef, <2 x i32> <i32 0, i32 1>
- %2 = zext <2 x i16> %1 to <2 x i64>
- %3 = load <2 x i16>, <2 x i16>* %a1, align 1
- %4 = zext <2 x i16> %3 to <2 x i64>
- %5 = add <2 x i64> %2, %4
- ret <2 x i64> %5
-}
-
-define <2 x i64> @test_pmuldq(<4 x i32> %a0, <4 x i32> %a1, <4 x i32> %a2, <4 x i32> *%a3) {
-; GENERIC-LABEL: test_pmuldq:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pmuldq %xmm1, %xmm0 # sched: [5:1.00]
-; GENERIC-NEXT: pmuldq (%rdi), %xmm2 # sched: [11:1.00]
-; GENERIC-NEXT: por %xmm2, %xmm0 # sched: [1:0.33]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_pmuldq:
-; SLM: # %bb.0:
-; SLM-NEXT: pmuldq (%rdi), %xmm2 # sched: [7:1.00]
-; SLM-NEXT: pmuldq %xmm1, %xmm0 # sched: [4:1.00]
-; SLM-NEXT: por %xmm2, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pmuldq:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pmuldq %xmm1, %xmm0 # sched: [5:1.00]
-; SANDY-SSE-NEXT: pmuldq (%rdi), %xmm2 # sched: [11:1.00]
-; SANDY-SSE-NEXT: por %xmm2, %xmm0 # sched: [1:0.33]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pmuldq:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpmuldq %xmm1, %xmm0, %xmm0 # sched: [5:1.00]
-; SANDY-NEXT: vpmuldq (%rdi), %xmm2, %xmm1 # sched: [11:1.00]
-; SANDY-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pmuldq:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pmuldq %xmm1, %xmm0 # sched: [5:1.00]
-; HASWELL-SSE-NEXT: pmuldq (%rdi), %xmm2 # sched: [11:1.00]
-; HASWELL-SSE-NEXT: por %xmm2, %xmm0 # sched: [1:0.33]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pmuldq:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpmuldq %xmm1, %xmm0, %xmm0 # sched: [5:1.00]
-; HASWELL-NEXT: vpmuldq (%rdi), %xmm2, %xmm1 # sched: [11:1.00]
-; HASWELL-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pmuldq:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pmuldq %xmm1, %xmm0 # sched: [5:1.00]
-; BROADWELL-SSE-NEXT: pmuldq (%rdi), %xmm2 # sched: [10:1.00]
-; BROADWELL-SSE-NEXT: por %xmm2, %xmm0 # sched: [1:0.33]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pmuldq:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpmuldq %xmm1, %xmm0, %xmm0 # sched: [5:1.00]
-; BROADWELL-NEXT: vpmuldq (%rdi), %xmm2, %xmm1 # sched: [10:1.00]
-; BROADWELL-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pmuldq:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pmuldq %xmm1, %xmm0 # sched: [4:0.50]
-; SKYLAKE-SSE-NEXT: pmuldq (%rdi), %xmm2 # sched: [10:0.50]
-; SKYLAKE-SSE-NEXT: por %xmm2, %xmm0 # sched: [1:0.33]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pmuldq:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpmuldq %xmm1, %xmm0, %xmm0 # sched: [4:0.50]
-; SKYLAKE-NEXT: vpmuldq (%rdi), %xmm2, %xmm1 # sched: [10:0.50]
-; SKYLAKE-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pmuldq:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pmuldq %xmm1, %xmm0 # sched: [4:0.50]
-; SKX-SSE-NEXT: pmuldq (%rdi), %xmm2 # sched: [10:0.50]
-; SKX-SSE-NEXT: por %xmm2, %xmm0 # sched: [1:0.33]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pmuldq:
-; SKX: # %bb.0:
-; SKX-NEXT: vpmuldq %xmm1, %xmm0, %xmm0 # sched: [4:0.50]
-; SKX-NEXT: vpmuldq (%rdi), %xmm2, %xmm1 # sched: [10:0.50]
-; SKX-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pmuldq:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pmuldq (%rdi), %xmm2 # sched: [9:1.00]
-; BDVER2-SSE-NEXT: pmuldq %xmm1, %xmm0 # sched: [4:1.00]
-; BDVER2-SSE-NEXT: por %xmm2, %xmm0 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pmuldq:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpmuldq (%rdi), %xmm2, %xmm2 # sched: [9:1.00]
-; BDVER2-NEXT: vpmuldq %xmm1, %xmm0, %xmm0 # sched: [4:1.00]
-; BDVER2-NEXT: vpor %xmm2, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pmuldq:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pmuldq (%rdi), %xmm2 # sched: [7:1.00]
-; BTVER2-SSE-NEXT: pmuldq %xmm1, %xmm0 # sched: [2:1.00]
-; BTVER2-SSE-NEXT: por %xmm2, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pmuldq:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpmuldq (%rdi), %xmm2, %xmm2 # sched: [7:1.00]
-; BTVER2-NEXT: vpmuldq %xmm1, %xmm0, %xmm0 # sched: [2:1.00]
-; BTVER2-NEXT: vpor %xmm2, %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pmuldq:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pmuldq (%rdi), %xmm2 # sched: [11:1.00]
-; ZNVER1-SSE-NEXT: pmuldq %xmm1, %xmm0 # sched: [4:1.00]
-; ZNVER1-SSE-NEXT: por %xmm2, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pmuldq:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpmuldq (%rdi), %xmm2, %xmm2 # sched: [11:1.00]
-; ZNVER1-NEXT: vpmuldq %xmm1, %xmm0, %xmm0 # sched: [4:1.00]
-; ZNVER1-NEXT: vpor %xmm2, %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call <2 x i64> @llvm.x86.sse41.pmuldq(<4 x i32> %a0, <4 x i32> %a1)
- %2 = load <4 x i32>, <4 x i32> *%a3, align 16
- %3 = call <2 x i64> @llvm.x86.sse41.pmuldq(<4 x i32> %a2, <4 x i32> %2)
- %4 = or <2 x i64> %1, %3
- ret <2 x i64> %4
-}
-declare <2 x i64> @llvm.x86.sse41.pmuldq(<4 x i32>, <4 x i32>) nounwind readnone
-
-define <4 x i32> @test_pmulld(<4 x i32> %a0, <4 x i32> %a1, <4 x i32> *%a2) {
-; GENERIC-LABEL: test_pmulld:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pmulld %xmm1, %xmm0 # sched: [5:1.00]
-; GENERIC-NEXT: pmulld (%rdi), %xmm0 # sched: [11:1.00]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_pmulld:
-; SLM: # %bb.0:
-; SLM-NEXT: pmulld %xmm1, %xmm0 # sched: [4:1.00]
-; SLM-NEXT: pmulld (%rdi), %xmm0 # sched: [7:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pmulld:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pmulld %xmm1, %xmm0 # sched: [5:1.00]
-; SANDY-SSE-NEXT: pmulld (%rdi), %xmm0 # sched: [11:1.00]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pmulld:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpmulld %xmm1, %xmm0, %xmm0 # sched: [5:1.00]
-; SANDY-NEXT: vpmulld (%rdi), %xmm0, %xmm0 # sched: [11:1.00]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pmulld:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pmulld %xmm1, %xmm0 # sched: [10:2.00]
-; HASWELL-SSE-NEXT: pmulld (%rdi), %xmm0 # sched: [16:2.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pmulld:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpmulld %xmm1, %xmm0, %xmm0 # sched: [10:2.00]
-; HASWELL-NEXT: vpmulld (%rdi), %xmm0, %xmm0 # sched: [16:2.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pmulld:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pmulld %xmm1, %xmm0 # sched: [10:2.00]
-; BROADWELL-SSE-NEXT: pmulld (%rdi), %xmm0 # sched: [15:2.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pmulld:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpmulld %xmm1, %xmm0, %xmm0 # sched: [10:2.00]
-; BROADWELL-NEXT: vpmulld (%rdi), %xmm0, %xmm0 # sched: [15:2.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pmulld:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pmulld %xmm1, %xmm0 # sched: [10:1.00]
-; SKYLAKE-SSE-NEXT: pmulld (%rdi), %xmm0 # sched: [16:1.00]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pmulld:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpmulld %xmm1, %xmm0, %xmm0 # sched: [10:1.00]
-; SKYLAKE-NEXT: vpmulld (%rdi), %xmm0, %xmm0 # sched: [16:1.00]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pmulld:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pmulld %xmm1, %xmm0 # sched: [10:1.00]
-; SKX-SSE-NEXT: pmulld (%rdi), %xmm0 # sched: [16:1.00]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pmulld:
-; SKX: # %bb.0:
-; SKX-NEXT: vpmulld %xmm1, %xmm0, %xmm0 # sched: [10:1.00]
-; SKX-NEXT: vpmulld (%rdi), %xmm0, %xmm0 # sched: [16:1.00]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pmulld:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pmulld %xmm1, %xmm0 # sched: [5:2.00]
-; BDVER2-SSE-NEXT: pmulld (%rdi), %xmm0 # sched: [10:2.00]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pmulld:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpmulld %xmm1, %xmm0, %xmm0 # sched: [5:2.00]
-; BDVER2-NEXT: vpmulld (%rdi), %xmm0, %xmm0 # sched: [10:2.00]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pmulld:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pmulld %xmm1, %xmm0 # sched: [4:2.00]
-; BTVER2-SSE-NEXT: pmulld (%rdi), %xmm0 # sched: [9:2.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pmulld:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpmulld %xmm1, %xmm0, %xmm0 # sched: [4:2.00]
-; BTVER2-NEXT: vpmulld (%rdi), %xmm0, %xmm0 # sched: [9:2.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pmulld:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pmulld %xmm1, %xmm0 # sched: [4:1.00]
-; ZNVER1-SSE-NEXT: pmulld (%rdi), %xmm0 # sched: [11:1.00]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pmulld:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpmulld %xmm1, %xmm0, %xmm0 # sched: [4:1.00]
-; ZNVER1-NEXT: vpmulld (%rdi), %xmm0, %xmm0 # sched: [11:1.00]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = mul <4 x i32> %a0, %a1
- %2 = load <4 x i32>, <4 x i32> *%a2, align 16
- %3 = mul <4 x i32> %1, %2
- ret <4 x i32> %3
-}
-
-define i32 @test_ptest(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> *%a2) {
-; GENERIC-LABEL: test_ptest:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: ptest %xmm1, %xmm0 # sched: [2:1.00]
-; GENERIC-NEXT: setb %al # sched: [1:0.50]
-; GENERIC-NEXT: ptest (%rdi), %xmm0 # sched: [8:1.00]
-; GENERIC-NEXT: setb %cl # sched: [1:0.50]
-; GENERIC-NEXT: andb %al, %cl # sched: [1:0.33]
-; GENERIC-NEXT: movzbl %cl, %eax # sched: [1:0.33]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_ptest:
-; SLM: # %bb.0:
-; SLM-NEXT: ptest %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: setb %al # sched: [1:0.50]
-; SLM-NEXT: ptest (%rdi), %xmm0 # sched: [4:1.00]
-; SLM-NEXT: setb %cl # sched: [1:0.50]
-; SLM-NEXT: andb %al, %cl # sched: [1:0.50]
-; SLM-NEXT: movzbl %cl, %eax # sched: [1:0.50]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_ptest:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: ptest %xmm1, %xmm0 # sched: [2:1.00]
-; SANDY-SSE-NEXT: setb %al # sched: [1:0.50]
-; SANDY-SSE-NEXT: ptest (%rdi), %xmm0 # sched: [8:1.00]
-; SANDY-SSE-NEXT: setb %cl # sched: [1:0.50]
-; SANDY-SSE-NEXT: andb %al, %cl # sched: [1:0.33]
-; SANDY-SSE-NEXT: movzbl %cl, %eax # sched: [1:0.33]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_ptest:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vptest %xmm1, %xmm0 # sched: [2:1.00]
-; SANDY-NEXT: setb %al # sched: [1:0.50]
-; SANDY-NEXT: vptest (%rdi), %xmm0 # sched: [8:1.00]
-; SANDY-NEXT: setb %cl # sched: [1:0.50]
-; SANDY-NEXT: andb %al, %cl # sched: [1:0.33]
-; SANDY-NEXT: movzbl %cl, %eax # sched: [1:0.33]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_ptest:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: ptest %xmm1, %xmm0 # sched: [2:1.00]
-; HASWELL-SSE-NEXT: setb %al # sched: [1:0.50]
-; HASWELL-SSE-NEXT: ptest (%rdi), %xmm0 # sched: [8:1.00]
-; HASWELL-SSE-NEXT: setb %cl # sched: [1:0.50]
-; HASWELL-SSE-NEXT: andb %al, %cl # sched: [1:0.25]
-; HASWELL-SSE-NEXT: movzbl %cl, %eax # sched: [1:0.25]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_ptest:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vptest %xmm1, %xmm0 # sched: [2:1.00]
-; HASWELL-NEXT: setb %al # sched: [1:0.50]
-; HASWELL-NEXT: vptest (%rdi), %xmm0 # sched: [8:1.00]
-; HASWELL-NEXT: setb %cl # sched: [1:0.50]
-; HASWELL-NEXT: andb %al, %cl # sched: [1:0.25]
-; HASWELL-NEXT: movzbl %cl, %eax # sched: [1:0.25]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_ptest:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: ptest %xmm1, %xmm0 # sched: [2:1.00]
-; BROADWELL-SSE-NEXT: setb %al # sched: [1:0.50]
-; BROADWELL-SSE-NEXT: ptest (%rdi), %xmm0 # sched: [7:1.00]
-; BROADWELL-SSE-NEXT: setb %cl # sched: [1:0.50]
-; BROADWELL-SSE-NEXT: andb %al, %cl # sched: [1:0.25]
-; BROADWELL-SSE-NEXT: movzbl %cl, %eax # sched: [1:0.25]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_ptest:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vptest %xmm1, %xmm0 # sched: [2:1.00]
-; BROADWELL-NEXT: setb %al # sched: [1:0.50]
-; BROADWELL-NEXT: vptest (%rdi), %xmm0 # sched: [7:1.00]
-; BROADWELL-NEXT: setb %cl # sched: [1:0.50]
-; BROADWELL-NEXT: andb %al, %cl # sched: [1:0.25]
-; BROADWELL-NEXT: movzbl %cl, %eax # sched: [1:0.25]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_ptest:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: ptest %xmm1, %xmm0 # sched: [3:1.00]
-; SKYLAKE-SSE-NEXT: setb %al # sched: [1:0.50]
-; SKYLAKE-SSE-NEXT: ptest (%rdi), %xmm0 # sched: [9:1.00]
-; SKYLAKE-SSE-NEXT: setb %cl # sched: [1:0.50]
-; SKYLAKE-SSE-NEXT: andb %al, %cl # sched: [1:0.25]
-; SKYLAKE-SSE-NEXT: movzbl %cl, %eax # sched: [1:0.25]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_ptest:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vptest %xmm1, %xmm0 # sched: [3:1.00]
-; SKYLAKE-NEXT: setb %al # sched: [1:0.50]
-; SKYLAKE-NEXT: vptest (%rdi), %xmm0 # sched: [9:1.00]
-; SKYLAKE-NEXT: setb %cl # sched: [1:0.50]
-; SKYLAKE-NEXT: andb %al, %cl # sched: [1:0.25]
-; SKYLAKE-NEXT: movzbl %cl, %eax # sched: [1:0.25]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_ptest:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: ptest %xmm1, %xmm0 # sched: [3:1.00]
-; SKX-SSE-NEXT: setb %al # sched: [1:0.50]
-; SKX-SSE-NEXT: ptest (%rdi), %xmm0 # sched: [9:1.00]
-; SKX-SSE-NEXT: setb %cl # sched: [1:0.50]
-; SKX-SSE-NEXT: andb %al, %cl # sched: [1:0.25]
-; SKX-SSE-NEXT: movzbl %cl, %eax # sched: [1:0.25]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_ptest:
-; SKX: # %bb.0:
-; SKX-NEXT: vptest %xmm1, %xmm0 # sched: [3:1.00]
-; SKX-NEXT: setb %al # sched: [1:0.50]
-; SKX-NEXT: vptest (%rdi), %xmm0 # sched: [9:1.00]
-; SKX-NEXT: setb %cl # sched: [1:0.50]
-; SKX-NEXT: andb %al, %cl # sched: [1:0.25]
-; SKX-NEXT: movzbl %cl, %eax # sched: [1:0.25]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_ptest:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: ptest %xmm1, %xmm0 # sched: [1:1.00]
-; BDVER2-SSE-NEXT: setb %al # sched: [1:0.50]
-; BDVER2-SSE-NEXT: ptest (%rdi), %xmm0 # sched: [6:1.00]
-; BDVER2-SSE-NEXT: setb %cl # sched: [1:0.50]
-; BDVER2-SSE-NEXT: andb %al, %cl # sched: [1:0.50]
-; BDVER2-SSE-NEXT: movzbl %cl, %eax # sched: [1:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_ptest:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vptest %xmm1, %xmm0 # sched: [1:1.00]
-; BDVER2-NEXT: setb %al # sched: [1:0.50]
-; BDVER2-NEXT: vptest (%rdi), %xmm0 # sched: [6:1.00]
-; BDVER2-NEXT: setb %cl # sched: [1:0.50]
-; BDVER2-NEXT: andb %al, %cl # sched: [1:0.50]
-; BDVER2-NEXT: movzbl %cl, %eax # sched: [1:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_ptest:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: ptest %xmm1, %xmm0 # sched: [3:1.00]
-; BTVER2-SSE-NEXT: setb %al # sched: [1:0.50]
-; BTVER2-SSE-NEXT: ptest (%rdi), %xmm0 # sched: [8:1.00]
-; BTVER2-SSE-NEXT: setb %cl # sched: [1:0.50]
-; BTVER2-SSE-NEXT: andb %al, %cl # sched: [1:0.50]
-; BTVER2-SSE-NEXT: movzbl %cl, %eax # sched: [1:0.50]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_ptest:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vptest %xmm1, %xmm0 # sched: [3:1.00]
-; BTVER2-NEXT: setb %al # sched: [1:0.50]
-; BTVER2-NEXT: vptest (%rdi), %xmm0 # sched: [8:1.00]
-; BTVER2-NEXT: setb %cl # sched: [1:0.50]
-; BTVER2-NEXT: andb %al, %cl # sched: [1:0.50]
-; BTVER2-NEXT: movzbl %cl, %eax # sched: [1:0.50]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_ptest:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: ptest %xmm1, %xmm0 # sched: [1:1.00]
-; ZNVER1-SSE-NEXT: setb %al # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: ptest (%rdi), %xmm0 # sched: [8:1.00]
-; ZNVER1-SSE-NEXT: setb %cl # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: andb %al, %cl # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: movzbl %cl, %eax # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_ptest:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vptest %xmm1, %xmm0 # sched: [1:1.00]
-; ZNVER1-NEXT: setb %al # sched: [1:0.25]
-; ZNVER1-NEXT: vptest (%rdi), %xmm0 # sched: [8:1.00]
-; ZNVER1-NEXT: setb %cl # sched: [1:0.25]
-; ZNVER1-NEXT: andb %al, %cl # sched: [1:0.25]
-; ZNVER1-NEXT: movzbl %cl, %eax # sched: [1:0.25]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call i32 @llvm.x86.sse41.ptestc(<2 x i64> %a0, <2 x i64> %a1)
- %2 = load <2 x i64>, <2 x i64> *%a2, align 16
- %3 = call i32 @llvm.x86.sse41.ptestc(<2 x i64> %a0, <2 x i64> %2)
- %4 = and i32 %1, %3
- ret i32 %4
-}
-declare i32 @llvm.x86.sse41.ptestc(<2 x i64>, <2 x i64>) nounwind readnone
-
-define <2 x double> @test_roundpd(<2 x double> %a0, <2 x double> *%a1) {
-; GENERIC-LABEL: test_roundpd:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: roundpd $7, %xmm0, %xmm1 # sched: [3:1.00]
-; GENERIC-NEXT: roundpd $7, (%rdi), %xmm0 # sched: [9:1.00]
-; GENERIC-NEXT: addpd %xmm1, %xmm0 # sched: [3:1.00]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_roundpd:
-; SLM: # %bb.0:
-; SLM-NEXT: roundpd $7, (%rdi), %xmm1 # sched: [6:1.00]
-; SLM-NEXT: roundpd $7, %xmm0, %xmm0 # sched: [3:1.00]
-; SLM-NEXT: addpd %xmm0, %xmm1 # sched: [3:1.00]
-; SLM-NEXT: movapd %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_roundpd:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: roundpd $7, %xmm0, %xmm1 # sched: [3:1.00]
-; SANDY-SSE-NEXT: roundpd $7, (%rdi), %xmm0 # sched: [9:1.00]
-; SANDY-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [3:1.00]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_roundpd:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vroundpd $7, %xmm0, %xmm0 # sched: [3:1.00]
-; SANDY-NEXT: vroundpd $7, (%rdi), %xmm1 # sched: [9:1.00]
-; SANDY-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_roundpd:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: roundpd $7, %xmm0, %xmm1 # sched: [6:0.50]
-; HASWELL-SSE-NEXT: roundpd $7, (%rdi), %xmm0 # sched: [12:2.00]
-; HASWELL-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [3:1.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_roundpd:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vroundpd $7, %xmm0, %xmm0 # sched: [6:0.50]
-; HASWELL-NEXT: vroundpd $7, (%rdi), %xmm1 # sched: [12:2.00]
-; HASWELL-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_roundpd:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: roundpd $7, (%rdi), %xmm1 # sched: [11:2.00]
-; BROADWELL-SSE-NEXT: roundpd $7, %xmm0, %xmm0 # sched: [6:0.50]
-; BROADWELL-SSE-NEXT: addpd %xmm0, %xmm1 # sched: [3:1.00]
-; BROADWELL-SSE-NEXT: movapd %xmm1, %xmm0 # sched: [1:1.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_roundpd:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vroundpd $7, (%rdi), %xmm1 # sched: [11:2.00]
-; BROADWELL-NEXT: vroundpd $7, %xmm0, %xmm0 # sched: [6:0.50]
-; BROADWELL-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_roundpd:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: roundpd $7, %xmm0, %xmm1 # sched: [8:1.00]
-; SKYLAKE-SSE-NEXT: roundpd $7, (%rdi), %xmm0 # sched: [14:1.00]
-; SKYLAKE-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [4:0.50]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_roundpd:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vroundpd $7, %xmm0, %xmm0 # sched: [8:1.00]
-; SKYLAKE-NEXT: vroundpd $7, (%rdi), %xmm1 # sched: [14:1.00]
-; SKYLAKE-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [4:0.50]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_roundpd:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: roundpd $7, %xmm0, %xmm1 # sched: [8:1.00]
-; SKX-SSE-NEXT: roundpd $7, (%rdi), %xmm0 # sched: [14:1.00]
-; SKX-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [4:0.50]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_roundpd:
-; SKX: # %bb.0:
-; SKX-NEXT: vroundpd $7, %xmm0, %xmm0 # sched: [8:1.00]
-; SKX-NEXT: vroundpd $7, (%rdi), %xmm1 # sched: [14:1.00]
-; SKX-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [4:0.50]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_roundpd:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: roundpd $7, %xmm0, %xmm1 # sched: [4:1.00]
-; BDVER2-SSE-NEXT: roundpd $7, (%rdi), %xmm0 # sched: [9:1.00]
-; BDVER2-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [5:1.00]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_roundpd:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vroundpd $7, (%rdi), %xmm1 # sched: [9:1.00]
-; BDVER2-NEXT: vroundpd $7, %xmm0, %xmm0 # sched: [4:1.00]
-; BDVER2-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [5:1.00]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_roundpd:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: roundpd $7, %xmm0, %xmm1 # sched: [3:1.00]
-; BTVER2-SSE-NEXT: roundpd $7, (%rdi), %xmm0 # sched: [8:1.00]
-; BTVER2-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [3:1.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_roundpd:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vroundpd $7, (%rdi), %xmm1 # sched: [8:1.00]
-; BTVER2-NEXT: vroundpd $7, %xmm0, %xmm0 # sched: [3:1.00]
-; BTVER2-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_roundpd:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: roundpd $7, %xmm0, %xmm1 # sched: [4:1.00]
-; ZNVER1-SSE-NEXT: roundpd $7, (%rdi), %xmm0 # sched: [11:1.00]
-; ZNVER1-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [3:1.00]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_roundpd:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vroundpd $7, (%rdi), %xmm1 # sched: [11:1.00]
-; ZNVER1-NEXT: vroundpd $7, %xmm0, %xmm0 # sched: [4:1.00]
-; ZNVER1-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call <2 x double> @llvm.x86.sse41.round.pd(<2 x double> %a0, i32 7)
- %2 = load <2 x double>, <2 x double> *%a1, align 16
- %3 = call <2 x double> @llvm.x86.sse41.round.pd(<2 x double> %2, i32 7)
- %4 = fadd <2 x double> %1, %3
- ret <2 x double> %4
-}
-declare <2 x double> @llvm.x86.sse41.round.pd(<2 x double>, i32) nounwind readnone
-
-define <4 x float> @test_roundps(<4 x float> %a0, <4 x float> *%a1) {
-; GENERIC-LABEL: test_roundps:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: roundps $7, %xmm0, %xmm1 # sched: [3:1.00]
-; GENERIC-NEXT: roundps $7, (%rdi), %xmm0 # sched: [9:1.00]
-; GENERIC-NEXT: addps %xmm1, %xmm0 # sched: [3:1.00]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_roundps:
-; SLM: # %bb.0:
-; SLM-NEXT: roundps $7, (%rdi), %xmm1 # sched: [6:1.00]
-; SLM-NEXT: roundps $7, %xmm0, %xmm0 # sched: [3:1.00]
-; SLM-NEXT: addps %xmm0, %xmm1 # sched: [3:1.00]
-; SLM-NEXT: movaps %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_roundps:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: roundps $7, %xmm0, %xmm1 # sched: [3:1.00]
-; SANDY-SSE-NEXT: roundps $7, (%rdi), %xmm0 # sched: [9:1.00]
-; SANDY-SSE-NEXT: addps %xmm1, %xmm0 # sched: [3:1.00]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_roundps:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vroundps $7, %xmm0, %xmm0 # sched: [3:1.00]
-; SANDY-NEXT: vroundps $7, (%rdi), %xmm1 # sched: [9:1.00]
-; SANDY-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_roundps:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: roundps $7, %xmm0, %xmm1 # sched: [6:0.50]
-; HASWELL-SSE-NEXT: roundps $7, (%rdi), %xmm0 # sched: [12:2.00]
-; HASWELL-SSE-NEXT: addps %xmm1, %xmm0 # sched: [3:1.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_roundps:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vroundps $7, %xmm0, %xmm0 # sched: [6:0.50]
-; HASWELL-NEXT: vroundps $7, (%rdi), %xmm1 # sched: [12:2.00]
-; HASWELL-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_roundps:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: roundps $7, (%rdi), %xmm1 # sched: [11:2.00]
-; BROADWELL-SSE-NEXT: roundps $7, %xmm0, %xmm0 # sched: [6:0.50]
-; BROADWELL-SSE-NEXT: addps %xmm0, %xmm1 # sched: [3:1.00]
-; BROADWELL-SSE-NEXT: movaps %xmm1, %xmm0 # sched: [1:1.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_roundps:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vroundps $7, (%rdi), %xmm1 # sched: [11:2.00]
-; BROADWELL-NEXT: vroundps $7, %xmm0, %xmm0 # sched: [6:0.50]
-; BROADWELL-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_roundps:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: roundps $7, %xmm0, %xmm1 # sched: [8:1.00]
-; SKYLAKE-SSE-NEXT: roundps $7, (%rdi), %xmm0 # sched: [14:1.00]
-; SKYLAKE-SSE-NEXT: addps %xmm1, %xmm0 # sched: [4:0.50]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_roundps:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vroundps $7, %xmm0, %xmm0 # sched: [8:1.00]
-; SKYLAKE-NEXT: vroundps $7, (%rdi), %xmm1 # sched: [14:1.00]
-; SKYLAKE-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [4:0.50]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_roundps:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: roundps $7, %xmm0, %xmm1 # sched: [8:1.00]
-; SKX-SSE-NEXT: roundps $7, (%rdi), %xmm0 # sched: [14:1.00]
-; SKX-SSE-NEXT: addps %xmm1, %xmm0 # sched: [4:0.50]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_roundps:
-; SKX: # %bb.0:
-; SKX-NEXT: vroundps $7, %xmm0, %xmm0 # sched: [8:1.00]
-; SKX-NEXT: vroundps $7, (%rdi), %xmm1 # sched: [14:1.00]
-; SKX-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [4:0.50]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_roundps:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: roundps $7, %xmm0, %xmm1 # sched: [4:1.00]
-; BDVER2-SSE-NEXT: roundps $7, (%rdi), %xmm0 # sched: [9:1.00]
-; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [5:1.00]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_roundps:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vroundps $7, (%rdi), %xmm1 # sched: [9:1.00]
-; BDVER2-NEXT: vroundps $7, %xmm0, %xmm0 # sched: [4:1.00]
-; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [5:1.00]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_roundps:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: roundps $7, %xmm0, %xmm1 # sched: [3:1.00]
-; BTVER2-SSE-NEXT: roundps $7, (%rdi), %xmm0 # sched: [8:1.00]
-; BTVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [3:1.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_roundps:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vroundps $7, (%rdi), %xmm1 # sched: [8:1.00]
-; BTVER2-NEXT: vroundps $7, %xmm0, %xmm0 # sched: [3:1.00]
-; BTVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_roundps:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: roundps $7, %xmm0, %xmm1 # sched: [4:1.00]
-; ZNVER1-SSE-NEXT: roundps $7, (%rdi), %xmm0 # sched: [11:1.00]
-; ZNVER1-SSE-NEXT: addps %xmm1, %xmm0 # sched: [3:1.00]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_roundps:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vroundps $7, (%rdi), %xmm1 # sched: [11:1.00]
-; ZNVER1-NEXT: vroundps $7, %xmm0, %xmm0 # sched: [4:1.00]
-; ZNVER1-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call <4 x float> @llvm.x86.sse41.round.ps(<4 x float> %a0, i32 7)
- %2 = load <4 x float>, <4 x float> *%a1, align 16
- %3 = call <4 x float> @llvm.x86.sse41.round.ps(<4 x float> %2, i32 7)
- %4 = fadd <4 x float> %1, %3
- ret <4 x float> %4
-}
-declare <4 x float> @llvm.x86.sse41.round.ps(<4 x float>, i32) nounwind readnone
-
-define <2 x double> @test_roundsd(<2 x double> %a0, <2 x double> %a1, <2 x double> *%a2) {
-; GENERIC-LABEL: test_roundsd:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movapd %xmm0, %xmm2 # sched: [1:1.00]
-; GENERIC-NEXT: roundsd $7, %xmm1, %xmm2 # sched: [3:1.00]
-; GENERIC-NEXT: roundsd $7, (%rdi), %xmm0 # sched: [9:1.00]
-; GENERIC-NEXT: addpd %xmm2, %xmm0 # sched: [3:1.00]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_roundsd:
-; SLM: # %bb.0:
-; SLM-NEXT: movapd %xmm0, %xmm2 # sched: [1:0.50]
-; SLM-NEXT: roundsd $7, (%rdi), %xmm0 # sched: [6:1.00]
-; SLM-NEXT: roundsd $7, %xmm1, %xmm2 # sched: [3:1.00]
-; SLM-NEXT: addpd %xmm2, %xmm0 # sched: [3:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_roundsd:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: movapd %xmm0, %xmm2 # sched: [1:1.00]
-; SANDY-SSE-NEXT: roundsd $7, %xmm1, %xmm2 # sched: [3:1.00]
-; SANDY-SSE-NEXT: roundsd $7, (%rdi), %xmm0 # sched: [9:1.00]
-; SANDY-SSE-NEXT: addpd %xmm2, %xmm0 # sched: [3:1.00]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_roundsd:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vroundsd $7, %xmm1, %xmm0, %xmm1 # sched: [3:1.00]
-; SANDY-NEXT: vroundsd $7, (%rdi), %xmm0, %xmm0 # sched: [9:1.00]
-; SANDY-NEXT: vaddpd %xmm0, %xmm1, %xmm0 # sched: [3:1.00]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_roundsd:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: movapd %xmm0, %xmm2 # sched: [1:1.00]
-; HASWELL-SSE-NEXT: roundsd $7, %xmm1, %xmm2 # sched: [6:0.50]
-; HASWELL-SSE-NEXT: roundsd $7, (%rdi), %xmm0 # sched: [12:2.00]
-; HASWELL-SSE-NEXT: addpd %xmm2, %xmm0 # sched: [3:1.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_roundsd:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vroundsd $7, %xmm1, %xmm0, %xmm1 # sched: [6:0.50]
-; HASWELL-NEXT: vroundsd $7, (%rdi), %xmm0, %xmm0 # sched: [12:2.00]
-; HASWELL-NEXT: vaddpd %xmm0, %xmm1, %xmm0 # sched: [3:1.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_roundsd:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: movapd %xmm0, %xmm2 # sched: [1:1.00]
-; BROADWELL-SSE-NEXT: roundsd $7, (%rdi), %xmm0 # sched: [11:2.00]
-; BROADWELL-SSE-NEXT: roundsd $7, %xmm1, %xmm2 # sched: [6:0.50]
-; BROADWELL-SSE-NEXT: addpd %xmm2, %xmm0 # sched: [3:1.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_roundsd:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vroundsd $7, (%rdi), %xmm0, %xmm2 # sched: [11:2.00]
-; BROADWELL-NEXT: vroundsd $7, %xmm1, %xmm0, %xmm0 # sched: [6:0.50]
-; BROADWELL-NEXT: vaddpd %xmm2, %xmm0, %xmm0 # sched: [3:1.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_roundsd:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: movapd %xmm0, %xmm2 # sched: [1:0.33]
-; SKYLAKE-SSE-NEXT: roundsd $7, %xmm1, %xmm2 # sched: [8:1.00]
-; SKYLAKE-SSE-NEXT: roundsd $7, (%rdi), %xmm0 # sched: [14:1.00]
-; SKYLAKE-SSE-NEXT: addpd %xmm2, %xmm0 # sched: [4:0.50]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_roundsd:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vroundsd $7, %xmm1, %xmm0, %xmm1 # sched: [8:1.00]
-; SKYLAKE-NEXT: vroundsd $7, (%rdi), %xmm0, %xmm0 # sched: [14:1.00]
-; SKYLAKE-NEXT: vaddpd %xmm0, %xmm1, %xmm0 # sched: [4:0.50]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_roundsd:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: movapd %xmm0, %xmm2 # sched: [1:0.33]
-; SKX-SSE-NEXT: roundsd $7, %xmm1, %xmm2 # sched: [8:1.00]
-; SKX-SSE-NEXT: roundsd $7, (%rdi), %xmm0 # sched: [14:1.00]
-; SKX-SSE-NEXT: addpd %xmm2, %xmm0 # sched: [4:0.50]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_roundsd:
-; SKX: # %bb.0:
-; SKX-NEXT: vroundsd $7, %xmm1, %xmm0, %xmm1 # sched: [8:1.00]
-; SKX-NEXT: vroundsd $7, (%rdi), %xmm0, %xmm0 # sched: [14:1.00]
-; SKX-NEXT: vaddpd %xmm0, %xmm1, %xmm0 # sched: [4:0.50]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_roundsd:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: movapd %xmm0, %xmm2 # sched: [1:0.50]
-; BDVER2-SSE-NEXT: roundsd $7, (%rdi), %xmm0 # sched: [9:1.00]
-; BDVER2-SSE-NEXT: roundsd $7, %xmm1, %xmm2 # sched: [4:1.00]
-; BDVER2-SSE-NEXT: addpd %xmm2, %xmm0 # sched: [5:1.00]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_roundsd:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vroundsd $7, %xmm1, %xmm0, %xmm1 # sched: [4:1.00]
-; BDVER2-NEXT: vroundsd $7, (%rdi), %xmm0, %xmm0 # sched: [9:1.00]
-; BDVER2-NEXT: vaddpd %xmm0, %xmm1, %xmm0 # sched: [5:1.00]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_roundsd:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: movapd %xmm0, %xmm2 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: roundsd $7, (%rdi), %xmm0 # sched: [8:1.00]
-; BTVER2-SSE-NEXT: roundsd $7, %xmm1, %xmm2 # sched: [3:1.00]
-; BTVER2-SSE-NEXT: addpd %xmm2, %xmm0 # sched: [3:1.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_roundsd:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vroundsd $7, %xmm1, %xmm0, %xmm1 # sched: [3:1.00]
-; BTVER2-NEXT: vroundsd $7, (%rdi), %xmm0, %xmm0 # sched: [8:1.00]
-; BTVER2-NEXT: vaddpd %xmm0, %xmm1, %xmm0 # sched: [3:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_roundsd:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: movapd %xmm0, %xmm2 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: roundsd $7, (%rdi), %xmm0 # sched: [11:1.00]
-; ZNVER1-SSE-NEXT: roundsd $7, %xmm1, %xmm2 # sched: [4:1.00]
-; ZNVER1-SSE-NEXT: addpd %xmm2, %xmm0 # sched: [3:1.00]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_roundsd:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vroundsd $7, %xmm1, %xmm0, %xmm1 # sched: [4:1.00]
-; ZNVER1-NEXT: vroundsd $7, (%rdi), %xmm0, %xmm0 # sched: [11:1.00]
-; ZNVER1-NEXT: vaddpd %xmm0, %xmm1, %xmm0 # sched: [3:1.00]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call <2 x double> @llvm.x86.sse41.round.sd(<2 x double> %a0, <2 x double> %a1, i32 7)
- %2 = load <2 x double>, <2 x double>* %a2, align 16
- %3 = call <2 x double> @llvm.x86.sse41.round.sd(<2 x double> %a0, <2 x double> %2, i32 7)
- %4 = fadd <2 x double> %1, %3
- ret <2 x double> %4
-}
-declare <2 x double> @llvm.x86.sse41.round.sd(<2 x double>, <2 x double>, i32) nounwind readnone
-
-define <4 x float> @test_roundss(<4 x float> %a0, <4 x float> %a1, <4 x float> *%a2) {
-; GENERIC-LABEL: test_roundss:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movaps %xmm0, %xmm2 # sched: [1:1.00]
-; GENERIC-NEXT: roundss $7, %xmm1, %xmm2 # sched: [3:1.00]
-; GENERIC-NEXT: roundss $7, (%rdi), %xmm0 # sched: [9:1.00]
-; GENERIC-NEXT: addps %xmm2, %xmm0 # sched: [3:1.00]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_roundss:
-; SLM: # %bb.0:
-; SLM-NEXT: movaps %xmm0, %xmm2 # sched: [1:0.50]
-; SLM-NEXT: roundss $7, (%rdi), %xmm0 # sched: [6:1.00]
-; SLM-NEXT: roundss $7, %xmm1, %xmm2 # sched: [3:1.00]
-; SLM-NEXT: addps %xmm2, %xmm0 # sched: [3:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_roundss:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: movaps %xmm0, %xmm2 # sched: [1:1.00]
-; SANDY-SSE-NEXT: roundss $7, %xmm1, %xmm2 # sched: [3:1.00]
-; SANDY-SSE-NEXT: roundss $7, (%rdi), %xmm0 # sched: [9:1.00]
-; SANDY-SSE-NEXT: addps %xmm2, %xmm0 # sched: [3:1.00]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_roundss:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vroundss $7, %xmm1, %xmm0, %xmm1 # sched: [3:1.00]
-; SANDY-NEXT: vroundss $7, (%rdi), %xmm0, %xmm0 # sched: [9:1.00]
-; SANDY-NEXT: vaddps %xmm0, %xmm1, %xmm0 # sched: [3:1.00]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_roundss:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: movaps %xmm0, %xmm2 # sched: [1:1.00]
-; HASWELL-SSE-NEXT: roundss $7, %xmm1, %xmm2 # sched: [6:0.50]
-; HASWELL-SSE-NEXT: roundss $7, (%rdi), %xmm0 # sched: [12:2.00]
-; HASWELL-SSE-NEXT: addps %xmm2, %xmm0 # sched: [3:1.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_roundss:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vroundss $7, %xmm1, %xmm0, %xmm1 # sched: [6:0.50]
-; HASWELL-NEXT: vroundss $7, (%rdi), %xmm0, %xmm0 # sched: [12:2.00]
-; HASWELL-NEXT: vaddps %xmm0, %xmm1, %xmm0 # sched: [3:1.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_roundss:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: movaps %xmm0, %xmm2 # sched: [1:1.00]
-; BROADWELL-SSE-NEXT: roundss $7, (%rdi), %xmm0 # sched: [11:2.00]
-; BROADWELL-SSE-NEXT: roundss $7, %xmm1, %xmm2 # sched: [6:0.50]
-; BROADWELL-SSE-NEXT: addps %xmm2, %xmm0 # sched: [3:1.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_roundss:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vroundss $7, (%rdi), %xmm0, %xmm2 # sched: [11:2.00]
-; BROADWELL-NEXT: vroundss $7, %xmm1, %xmm0, %xmm0 # sched: [6:0.50]
-; BROADWELL-NEXT: vaddps %xmm2, %xmm0, %xmm0 # sched: [3:1.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_roundss:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: movaps %xmm0, %xmm2 # sched: [1:0.33]
-; SKYLAKE-SSE-NEXT: roundss $7, %xmm1, %xmm2 # sched: [8:1.00]
-; SKYLAKE-SSE-NEXT: roundss $7, (%rdi), %xmm0 # sched: [14:1.00]
-; SKYLAKE-SSE-NEXT: addps %xmm2, %xmm0 # sched: [4:0.50]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_roundss:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vroundss $7, %xmm1, %xmm0, %xmm1 # sched: [8:1.00]
-; SKYLAKE-NEXT: vroundss $7, (%rdi), %xmm0, %xmm0 # sched: [14:1.00]
-; SKYLAKE-NEXT: vaddps %xmm0, %xmm1, %xmm0 # sched: [4:0.50]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_roundss:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: movaps %xmm0, %xmm2 # sched: [1:0.33]
-; SKX-SSE-NEXT: roundss $7, %xmm1, %xmm2 # sched: [8:1.00]
-; SKX-SSE-NEXT: roundss $7, (%rdi), %xmm0 # sched: [14:1.00]
-; SKX-SSE-NEXT: addps %xmm2, %xmm0 # sched: [4:0.50]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_roundss:
-; SKX: # %bb.0:
-; SKX-NEXT: vroundss $7, %xmm1, %xmm0, %xmm1 # sched: [8:1.00]
-; SKX-NEXT: vroundss $7, (%rdi), %xmm0, %xmm0 # sched: [14:1.00]
-; SKX-NEXT: vaddps %xmm0, %xmm1, %xmm0 # sched: [4:0.50]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_roundss:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: movaps %xmm0, %xmm2 # sched: [1:0.50]
-; BDVER2-SSE-NEXT: roundss $7, (%rdi), %xmm0 # sched: [9:1.00]
-; BDVER2-SSE-NEXT: roundss $7, %xmm1, %xmm2 # sched: [4:1.00]
-; BDVER2-SSE-NEXT: addps %xmm2, %xmm0 # sched: [5:1.00]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_roundss:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vroundss $7, %xmm1, %xmm0, %xmm1 # sched: [4:1.00]
-; BDVER2-NEXT: vroundss $7, (%rdi), %xmm0, %xmm0 # sched: [9:1.00]
-; BDVER2-NEXT: vaddps %xmm0, %xmm1, %xmm0 # sched: [5:1.00]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_roundss:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: movaps %xmm0, %xmm2 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: roundss $7, (%rdi), %xmm0 # sched: [8:1.00]
-; BTVER2-SSE-NEXT: roundss $7, %xmm1, %xmm2 # sched: [3:1.00]
-; BTVER2-SSE-NEXT: addps %xmm2, %xmm0 # sched: [3:1.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_roundss:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vroundss $7, %xmm1, %xmm0, %xmm1 # sched: [3:1.00]
-; BTVER2-NEXT: vroundss $7, (%rdi), %xmm0, %xmm0 # sched: [8:1.00]
-; BTVER2-NEXT: vaddps %xmm0, %xmm1, %xmm0 # sched: [3:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_roundss:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: movaps %xmm0, %xmm2 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: roundss $7, (%rdi), %xmm0 # sched: [11:1.00]
-; ZNVER1-SSE-NEXT: roundss $7, %xmm1, %xmm2 # sched: [4:1.00]
-; ZNVER1-SSE-NEXT: addps %xmm2, %xmm0 # sched: [3:1.00]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_roundss:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vroundss $7, %xmm1, %xmm0, %xmm1 # sched: [4:1.00]
-; ZNVER1-NEXT: vroundss $7, (%rdi), %xmm0, %xmm0 # sched: [11:1.00]
-; ZNVER1-NEXT: vaddps %xmm0, %xmm1, %xmm0 # sched: [3:1.00]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> %a0, <4 x float> %a1, i32 7)
- %2 = load <4 x float>, <4 x float> *%a2, align 16
- %3 = call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> %a0, <4 x float> %2, i32 7)
- %4 = fadd <4 x float> %1, %3
- ret <4 x float> %4
-}
-declare <4 x float> @llvm.x86.sse41.round.ss(<4 x float>, <4 x float>, i32) nounwind readnone
Removed: llvm/trunk/test/CodeGen/X86/sse42-schedule.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse42-schedule.ll?rev=353042&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse42-schedule.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse42-schedule.ll (removed)
@@ -1,1631 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+sse4.2,+pclmul | FileCheck %s --check-prefixes=CHECK,GENERIC
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=slm -mattr=-avx | FileCheck %s --check-prefixes=CHECK,SLM
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=sandybridge -mattr=-avx | FileCheck %s --check-prefixes=CHECK,SANDY-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=sandybridge -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,SANDY
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=ivybridge -mattr=-avx | FileCheck %s --check-prefixes=CHECK,SANDY-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=ivybridge -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,SANDY
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=haswell -mattr=-avx | FileCheck %s --check-prefixes=CHECK,HASWELL-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=haswell -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,HASWELL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=broadwell -mattr=-avx | FileCheck %s --check-prefixes=CHECK,BROADWELL-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=broadwell -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,BROADWELL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skylake -mattr=-avx | FileCheck %s --check-prefixes=CHECK,SKYLAKE-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skylake -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,SKYLAKE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skx -mattr=-avx | FileCheck %s --check-prefixes=CHECK,SKX-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skx -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,SKX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 -mattr=-avx | FileCheck %s --check-prefixes=CHECK,BDVER2-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 -mattr=-avx2,-xop | FileCheck %s --check-prefixes=CHECK,BDVER2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 -mattr=-avx | FileCheck %s --check-prefixes=CHECK,BTVER2-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,BTVER2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=znver1 -mattr=-avx | FileCheck %s --check-prefixes=CHECK,ZNVER1-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=znver1 -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,ZNVER1
-
-define i32 @crc32_32_8(i32 %a0, i8 %a1, i8 *%a2) {
-; GENERIC-LABEL: crc32_32_8:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movl %edi, %eax # sched: [1:0.33]
-; GENERIC-NEXT: crc32b %sil, %eax # sched: [3:1.00]
-; GENERIC-NEXT: crc32b (%rdx), %eax # sched: [8:1.00]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: crc32_32_8:
-; SLM: # %bb.0:
-; SLM-NEXT: movl %edi, %eax # sched: [1:0.50]
-; SLM-NEXT: crc32b %sil, %eax # sched: [3:1.00]
-; SLM-NEXT: crc32b (%rdx), %eax # sched: [6:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: crc32_32_8:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: movl %edi, %eax # sched: [1:0.33]
-; SANDY-SSE-NEXT: crc32b %sil, %eax # sched: [3:1.00]
-; SANDY-SSE-NEXT: crc32b (%rdx), %eax # sched: [8:1.00]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: crc32_32_8:
-; SANDY: # %bb.0:
-; SANDY-NEXT: movl %edi, %eax # sched: [1:0.33]
-; SANDY-NEXT: crc32b %sil, %eax # sched: [3:1.00]
-; SANDY-NEXT: crc32b (%rdx), %eax # sched: [8:1.00]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: crc32_32_8:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: movl %edi, %eax # sched: [1:0.25]
-; HASWELL-SSE-NEXT: crc32b %sil, %eax # sched: [3:1.00]
-; HASWELL-SSE-NEXT: crc32b (%rdx), %eax # sched: [8:1.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: crc32_32_8:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: movl %edi, %eax # sched: [1:0.25]
-; HASWELL-NEXT: crc32b %sil, %eax # sched: [3:1.00]
-; HASWELL-NEXT: crc32b (%rdx), %eax # sched: [8:1.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: crc32_32_8:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: movl %edi, %eax # sched: [1:0.25]
-; BROADWELL-SSE-NEXT: crc32b %sil, %eax # sched: [3:1.00]
-; BROADWELL-SSE-NEXT: crc32b (%rdx), %eax # sched: [8:1.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: crc32_32_8:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: movl %edi, %eax # sched: [1:0.25]
-; BROADWELL-NEXT: crc32b %sil, %eax # sched: [3:1.00]
-; BROADWELL-NEXT: crc32b (%rdx), %eax # sched: [8:1.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: crc32_32_8:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: movl %edi, %eax # sched: [1:0.25]
-; SKYLAKE-SSE-NEXT: crc32b %sil, %eax # sched: [3:1.00]
-; SKYLAKE-SSE-NEXT: crc32b (%rdx), %eax # sched: [8:1.00]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: crc32_32_8:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: movl %edi, %eax # sched: [1:0.25]
-; SKYLAKE-NEXT: crc32b %sil, %eax # sched: [3:1.00]
-; SKYLAKE-NEXT: crc32b (%rdx), %eax # sched: [8:1.00]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: crc32_32_8:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: movl %edi, %eax # sched: [1:0.25]
-; SKX-SSE-NEXT: crc32b %sil, %eax # sched: [3:1.00]
-; SKX-SSE-NEXT: crc32b (%rdx), %eax # sched: [8:1.00]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: crc32_32_8:
-; SKX: # %bb.0:
-; SKX-NEXT: movl %edi, %eax # sched: [1:0.25]
-; SKX-NEXT: crc32b %sil, %eax # sched: [3:1.00]
-; SKX-NEXT: crc32b (%rdx), %eax # sched: [8:1.00]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: crc32_32_8:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: movl %edi, %eax # sched: [1:0.50]
-; BDVER2-SSE-NEXT: crc32b %sil, %eax # sched: [3:2.00]
-; BDVER2-SSE-NEXT: crc32b (%rdx), %eax # sched: [7:2.00]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: crc32_32_8:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: movl %edi, %eax # sched: [1:0.50]
-; BDVER2-NEXT: crc32b %sil, %eax # sched: [3:2.00]
-; BDVER2-NEXT: crc32b (%rdx), %eax # sched: [7:2.00]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: crc32_32_8:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: movl %edi, %eax # sched: [1:0.50]
-; BTVER2-SSE-NEXT: crc32b %sil, %eax # sched: [3:2.00]
-; BTVER2-SSE-NEXT: crc32b (%rdx), %eax # sched: [6:2.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: crc32_32_8:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: movl %edi, %eax # sched: [1:0.50]
-; BTVER2-NEXT: crc32b %sil, %eax # sched: [3:2.00]
-; BTVER2-NEXT: crc32b (%rdx), %eax # sched: [6:2.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: crc32_32_8:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: movl %edi, %eax # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: crc32b %sil, %eax # sched: [3:1.00]
-; ZNVER1-SSE-NEXT: crc32b (%rdx), %eax # sched: [10:1.00]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: crc32_32_8:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: movl %edi, %eax # sched: [1:0.25]
-; ZNVER1-NEXT: crc32b %sil, %eax # sched: [3:1.00]
-; ZNVER1-NEXT: crc32b (%rdx), %eax # sched: [10:1.00]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call i32 @llvm.x86.sse42.crc32.32.8(i32 %a0, i8 %a1)
- %2 = load i8, i8 *%a2
- %3 = call i32 @llvm.x86.sse42.crc32.32.8(i32 %1, i8 %2)
- ret i32 %3
-}
-declare i32 @llvm.x86.sse42.crc32.32.8(i32, i8) nounwind
-
-define i32 @crc32_32_16(i32 %a0, i16 %a1, i16 *%a2) {
-; GENERIC-LABEL: crc32_32_16:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movl %edi, %eax # sched: [1:0.33]
-; GENERIC-NEXT: crc32w %si, %eax # sched: [3:1.00]
-; GENERIC-NEXT: crc32w (%rdx), %eax # sched: [8:1.00]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: crc32_32_16:
-; SLM: # %bb.0:
-; SLM-NEXT: movl %edi, %eax # sched: [1:0.50]
-; SLM-NEXT: crc32w %si, %eax # sched: [3:1.00]
-; SLM-NEXT: crc32w (%rdx), %eax # sched: [6:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: crc32_32_16:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: movl %edi, %eax # sched: [1:0.33]
-; SANDY-SSE-NEXT: crc32w %si, %eax # sched: [3:1.00]
-; SANDY-SSE-NEXT: crc32w (%rdx), %eax # sched: [8:1.00]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: crc32_32_16:
-; SANDY: # %bb.0:
-; SANDY-NEXT: movl %edi, %eax # sched: [1:0.33]
-; SANDY-NEXT: crc32w %si, %eax # sched: [3:1.00]
-; SANDY-NEXT: crc32w (%rdx), %eax # sched: [8:1.00]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: crc32_32_16:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: movl %edi, %eax # sched: [1:0.25]
-; HASWELL-SSE-NEXT: crc32w %si, %eax # sched: [3:1.00]
-; HASWELL-SSE-NEXT: crc32w (%rdx), %eax # sched: [8:1.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: crc32_32_16:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: movl %edi, %eax # sched: [1:0.25]
-; HASWELL-NEXT: crc32w %si, %eax # sched: [3:1.00]
-; HASWELL-NEXT: crc32w (%rdx), %eax # sched: [8:1.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: crc32_32_16:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: movl %edi, %eax # sched: [1:0.25]
-; BROADWELL-SSE-NEXT: crc32w %si, %eax # sched: [3:1.00]
-; BROADWELL-SSE-NEXT: crc32w (%rdx), %eax # sched: [8:1.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: crc32_32_16:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: movl %edi, %eax # sched: [1:0.25]
-; BROADWELL-NEXT: crc32w %si, %eax # sched: [3:1.00]
-; BROADWELL-NEXT: crc32w (%rdx), %eax # sched: [8:1.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: crc32_32_16:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: movl %edi, %eax # sched: [1:0.25]
-; SKYLAKE-SSE-NEXT: crc32w %si, %eax # sched: [3:1.00]
-; SKYLAKE-SSE-NEXT: crc32w (%rdx), %eax # sched: [8:1.00]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: crc32_32_16:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: movl %edi, %eax # sched: [1:0.25]
-; SKYLAKE-NEXT: crc32w %si, %eax # sched: [3:1.00]
-; SKYLAKE-NEXT: crc32w (%rdx), %eax # sched: [8:1.00]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: crc32_32_16:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: movl %edi, %eax # sched: [1:0.25]
-; SKX-SSE-NEXT: crc32w %si, %eax # sched: [3:1.00]
-; SKX-SSE-NEXT: crc32w (%rdx), %eax # sched: [8:1.00]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: crc32_32_16:
-; SKX: # %bb.0:
-; SKX-NEXT: movl %edi, %eax # sched: [1:0.25]
-; SKX-NEXT: crc32w %si, %eax # sched: [3:1.00]
-; SKX-NEXT: crc32w (%rdx), %eax # sched: [8:1.00]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: crc32_32_16:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: movl %edi, %eax # sched: [1:0.50]
-; BDVER2-SSE-NEXT: crc32w %si, %eax # sched: [5:2.00]
-; BDVER2-SSE-NEXT: crc32w (%rdx), %eax # sched: [7:2.00]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: crc32_32_16:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: movl %edi, %eax # sched: [1:0.50]
-; BDVER2-NEXT: crc32w %si, %eax # sched: [5:2.00]
-; BDVER2-NEXT: crc32w (%rdx), %eax # sched: [7:2.00]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: crc32_32_16:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: movl %edi, %eax # sched: [1:0.50]
-; BTVER2-SSE-NEXT: crc32w %si, %eax # sched: [3:2.00]
-; BTVER2-SSE-NEXT: crc32w (%rdx), %eax # sched: [6:2.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: crc32_32_16:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: movl %edi, %eax # sched: [1:0.50]
-; BTVER2-NEXT: crc32w %si, %eax # sched: [3:2.00]
-; BTVER2-NEXT: crc32w (%rdx), %eax # sched: [6:2.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: crc32_32_16:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: movl %edi, %eax # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: crc32w %si, %eax # sched: [3:1.00]
-; ZNVER1-SSE-NEXT: crc32w (%rdx), %eax # sched: [10:1.00]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: crc32_32_16:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: movl %edi, %eax # sched: [1:0.25]
-; ZNVER1-NEXT: crc32w %si, %eax # sched: [3:1.00]
-; ZNVER1-NEXT: crc32w (%rdx), %eax # sched: [10:1.00]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call i32 @llvm.x86.sse42.crc32.32.16(i32 %a0, i16 %a1)
- %2 = load i16, i16 *%a2
- %3 = call i32 @llvm.x86.sse42.crc32.32.16(i32 %1, i16 %2)
- ret i32 %3
-}
-declare i32 @llvm.x86.sse42.crc32.32.16(i32, i16) nounwind
-
-define i32 @crc32_32_32(i32 %a0, i32 %a1, i32 *%a2) {
-; GENERIC-LABEL: crc32_32_32:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movl %edi, %eax # sched: [1:0.33]
-; GENERIC-NEXT: crc32l %esi, %eax # sched: [3:1.00]
-; GENERIC-NEXT: crc32l (%rdx), %eax # sched: [8:1.00]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: crc32_32_32:
-; SLM: # %bb.0:
-; SLM-NEXT: movl %edi, %eax # sched: [1:0.50]
-; SLM-NEXT: crc32l %esi, %eax # sched: [3:1.00]
-; SLM-NEXT: crc32l (%rdx), %eax # sched: [6:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: crc32_32_32:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: movl %edi, %eax # sched: [1:0.33]
-; SANDY-SSE-NEXT: crc32l %esi, %eax # sched: [3:1.00]
-; SANDY-SSE-NEXT: crc32l (%rdx), %eax # sched: [8:1.00]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: crc32_32_32:
-; SANDY: # %bb.0:
-; SANDY-NEXT: movl %edi, %eax # sched: [1:0.33]
-; SANDY-NEXT: crc32l %esi, %eax # sched: [3:1.00]
-; SANDY-NEXT: crc32l (%rdx), %eax # sched: [8:1.00]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: crc32_32_32:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: movl %edi, %eax # sched: [1:0.25]
-; HASWELL-SSE-NEXT: crc32l %esi, %eax # sched: [3:1.00]
-; HASWELL-SSE-NEXT: crc32l (%rdx), %eax # sched: [8:1.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: crc32_32_32:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: movl %edi, %eax # sched: [1:0.25]
-; HASWELL-NEXT: crc32l %esi, %eax # sched: [3:1.00]
-; HASWELL-NEXT: crc32l (%rdx), %eax # sched: [8:1.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: crc32_32_32:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: movl %edi, %eax # sched: [1:0.25]
-; BROADWELL-SSE-NEXT: crc32l %esi, %eax # sched: [3:1.00]
-; BROADWELL-SSE-NEXT: crc32l (%rdx), %eax # sched: [8:1.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: crc32_32_32:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: movl %edi, %eax # sched: [1:0.25]
-; BROADWELL-NEXT: crc32l %esi, %eax # sched: [3:1.00]
-; BROADWELL-NEXT: crc32l (%rdx), %eax # sched: [8:1.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: crc32_32_32:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: movl %edi, %eax # sched: [1:0.25]
-; SKYLAKE-SSE-NEXT: crc32l %esi, %eax # sched: [3:1.00]
-; SKYLAKE-SSE-NEXT: crc32l (%rdx), %eax # sched: [8:1.00]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: crc32_32_32:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: movl %edi, %eax # sched: [1:0.25]
-; SKYLAKE-NEXT: crc32l %esi, %eax # sched: [3:1.00]
-; SKYLAKE-NEXT: crc32l (%rdx), %eax # sched: [8:1.00]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: crc32_32_32:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: movl %edi, %eax # sched: [1:0.25]
-; SKX-SSE-NEXT: crc32l %esi, %eax # sched: [3:1.00]
-; SKX-SSE-NEXT: crc32l (%rdx), %eax # sched: [8:1.00]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: crc32_32_32:
-; SKX: # %bb.0:
-; SKX-NEXT: movl %edi, %eax # sched: [1:0.25]
-; SKX-NEXT: crc32l %esi, %eax # sched: [3:1.00]
-; SKX-NEXT: crc32l (%rdx), %eax # sched: [8:1.00]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: crc32_32_32:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: movl %edi, %eax # sched: [1:0.50]
-; BDVER2-SSE-NEXT: crc32l %esi, %eax # sched: [6:2.00]
-; BDVER2-SSE-NEXT: crc32l (%rdx), %eax # sched: [7:2.00]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: crc32_32_32:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: movl %edi, %eax # sched: [1:0.50]
-; BDVER2-NEXT: crc32l %esi, %eax # sched: [6:2.00]
-; BDVER2-NEXT: crc32l (%rdx), %eax # sched: [7:2.00]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: crc32_32_32:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: movl %edi, %eax # sched: [1:0.50]
-; BTVER2-SSE-NEXT: crc32l %esi, %eax # sched: [3:2.00]
-; BTVER2-SSE-NEXT: crc32l (%rdx), %eax # sched: [6:2.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: crc32_32_32:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: movl %edi, %eax # sched: [1:0.50]
-; BTVER2-NEXT: crc32l %esi, %eax # sched: [3:2.00]
-; BTVER2-NEXT: crc32l (%rdx), %eax # sched: [6:2.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: crc32_32_32:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: movl %edi, %eax # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: crc32l %esi, %eax # sched: [3:1.00]
-; ZNVER1-SSE-NEXT: crc32l (%rdx), %eax # sched: [10:1.00]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: crc32_32_32:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: movl %edi, %eax # sched: [1:0.25]
-; ZNVER1-NEXT: crc32l %esi, %eax # sched: [3:1.00]
-; ZNVER1-NEXT: crc32l (%rdx), %eax # sched: [10:1.00]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call i32 @llvm.x86.sse42.crc32.32.32(i32 %a0, i32 %a1)
- %2 = load i32, i32 *%a2
- %3 = call i32 @llvm.x86.sse42.crc32.32.32(i32 %1, i32 %2)
- ret i32 %3
-}
-declare i32 @llvm.x86.sse42.crc32.32.32(i32, i32) nounwind
-
-define i64 @crc32_64_8(i64 %a0, i8 %a1, i8 *%a2) nounwind {
-; GENERIC-LABEL: crc32_64_8:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movq %rdi, %rax # sched: [1:0.33]
-; GENERIC-NEXT: crc32b %sil, %eax # sched: [3:1.00]
-; GENERIC-NEXT: crc32b (%rdx), %eax # sched: [8:1.00]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: crc32_64_8:
-; SLM: # %bb.0:
-; SLM-NEXT: movq %rdi, %rax # sched: [1:0.50]
-; SLM-NEXT: crc32b %sil, %eax # sched: [3:1.00]
-; SLM-NEXT: crc32b (%rdx), %eax # sched: [6:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: crc32_64_8:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: movq %rdi, %rax # sched: [1:0.33]
-; SANDY-SSE-NEXT: crc32b %sil, %eax # sched: [3:1.00]
-; SANDY-SSE-NEXT: crc32b (%rdx), %eax # sched: [8:1.00]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: crc32_64_8:
-; SANDY: # %bb.0:
-; SANDY-NEXT: movq %rdi, %rax # sched: [1:0.33]
-; SANDY-NEXT: crc32b %sil, %eax # sched: [3:1.00]
-; SANDY-NEXT: crc32b (%rdx), %eax # sched: [8:1.00]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: crc32_64_8:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: movq %rdi, %rax # sched: [1:0.25]
-; HASWELL-SSE-NEXT: crc32b %sil, %eax # sched: [3:1.00]
-; HASWELL-SSE-NEXT: crc32b (%rdx), %eax # sched: [8:1.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: crc32_64_8:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: movq %rdi, %rax # sched: [1:0.25]
-; HASWELL-NEXT: crc32b %sil, %eax # sched: [3:1.00]
-; HASWELL-NEXT: crc32b (%rdx), %eax # sched: [8:1.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: crc32_64_8:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: movq %rdi, %rax # sched: [1:0.25]
-; BROADWELL-SSE-NEXT: crc32b %sil, %eax # sched: [3:1.00]
-; BROADWELL-SSE-NEXT: crc32b (%rdx), %eax # sched: [8:1.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: crc32_64_8:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: movq %rdi, %rax # sched: [1:0.25]
-; BROADWELL-NEXT: crc32b %sil, %eax # sched: [3:1.00]
-; BROADWELL-NEXT: crc32b (%rdx), %eax # sched: [8:1.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: crc32_64_8:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: movq %rdi, %rax # sched: [1:0.25]
-; SKYLAKE-SSE-NEXT: crc32b %sil, %eax # sched: [3:1.00]
-; SKYLAKE-SSE-NEXT: crc32b (%rdx), %eax # sched: [8:1.00]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: crc32_64_8:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: movq %rdi, %rax # sched: [1:0.25]
-; SKYLAKE-NEXT: crc32b %sil, %eax # sched: [3:1.00]
-; SKYLAKE-NEXT: crc32b (%rdx), %eax # sched: [8:1.00]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: crc32_64_8:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: movq %rdi, %rax # sched: [1:0.25]
-; SKX-SSE-NEXT: crc32b %sil, %eax # sched: [3:1.00]
-; SKX-SSE-NEXT: crc32b (%rdx), %eax # sched: [8:1.00]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: crc32_64_8:
-; SKX: # %bb.0:
-; SKX-NEXT: movq %rdi, %rax # sched: [1:0.25]
-; SKX-NEXT: crc32b %sil, %eax # sched: [3:1.00]
-; SKX-NEXT: crc32b (%rdx), %eax # sched: [8:1.00]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: crc32_64_8:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: movq %rdi, %rax # sched: [1:0.50]
-; BDVER2-SSE-NEXT: crc32b %sil, %eax # sched: [3:2.00]
-; BDVER2-SSE-NEXT: crc32b (%rdx), %eax # sched: [7:2.00]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: crc32_64_8:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: movq %rdi, %rax # sched: [1:0.50]
-; BDVER2-NEXT: crc32b %sil, %eax # sched: [3:2.00]
-; BDVER2-NEXT: crc32b (%rdx), %eax # sched: [7:2.00]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: crc32_64_8:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: movq %rdi, %rax # sched: [1:0.50]
-; BTVER2-SSE-NEXT: crc32b %sil, %eax # sched: [3:2.00]
-; BTVER2-SSE-NEXT: crc32b (%rdx), %eax # sched: [6:2.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: crc32_64_8:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: movq %rdi, %rax # sched: [1:0.50]
-; BTVER2-NEXT: crc32b %sil, %eax # sched: [3:2.00]
-; BTVER2-NEXT: crc32b (%rdx), %eax # sched: [6:2.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: crc32_64_8:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: movq %rdi, %rax # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: crc32b %sil, %eax # sched: [3:1.00]
-; ZNVER1-SSE-NEXT: crc32b (%rdx), %eax # sched: [10:1.00]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: crc32_64_8:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: movq %rdi, %rax # sched: [1:0.25]
-; ZNVER1-NEXT: crc32b %sil, %eax # sched: [3:1.00]
-; ZNVER1-NEXT: crc32b (%rdx), %eax # sched: [10:1.00]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call i64 @llvm.x86.sse42.crc32.64.8(i64 %a0, i8 %a1)
- %2 = load i8, i8 *%a2
- %3 = call i64 @llvm.x86.sse42.crc32.64.8(i64 %1, i8 %2)
- ret i64 %3
-}
-declare i64 @llvm.x86.sse42.crc32.64.8(i64, i8) nounwind
-
-define i64 @crc32_64_64(i64 %a0, i64 %a1, i64 *%a2) {
-; GENERIC-LABEL: crc32_64_64:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movq %rdi, %rax # sched: [1:0.33]
-; GENERIC-NEXT: crc32q %rsi, %rax # sched: [3:1.00]
-; GENERIC-NEXT: crc32q (%rdx), %rax # sched: [8:1.00]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: crc32_64_64:
-; SLM: # %bb.0:
-; SLM-NEXT: movq %rdi, %rax # sched: [1:0.50]
-; SLM-NEXT: crc32q %rsi, %rax # sched: [3:1.00]
-; SLM-NEXT: crc32q (%rdx), %rax # sched: [6:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: crc32_64_64:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: movq %rdi, %rax # sched: [1:0.33]
-; SANDY-SSE-NEXT: crc32q %rsi, %rax # sched: [3:1.00]
-; SANDY-SSE-NEXT: crc32q (%rdx), %rax # sched: [8:1.00]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: crc32_64_64:
-; SANDY: # %bb.0:
-; SANDY-NEXT: movq %rdi, %rax # sched: [1:0.33]
-; SANDY-NEXT: crc32q %rsi, %rax # sched: [3:1.00]
-; SANDY-NEXT: crc32q (%rdx), %rax # sched: [8:1.00]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: crc32_64_64:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: movq %rdi, %rax # sched: [1:0.25]
-; HASWELL-SSE-NEXT: crc32q %rsi, %rax # sched: [3:1.00]
-; HASWELL-SSE-NEXT: crc32q (%rdx), %rax # sched: [8:1.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: crc32_64_64:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: movq %rdi, %rax # sched: [1:0.25]
-; HASWELL-NEXT: crc32q %rsi, %rax # sched: [3:1.00]
-; HASWELL-NEXT: crc32q (%rdx), %rax # sched: [8:1.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: crc32_64_64:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: movq %rdi, %rax # sched: [1:0.25]
-; BROADWELL-SSE-NEXT: crc32q %rsi, %rax # sched: [3:1.00]
-; BROADWELL-SSE-NEXT: crc32q (%rdx), %rax # sched: [8:1.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: crc32_64_64:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: movq %rdi, %rax # sched: [1:0.25]
-; BROADWELL-NEXT: crc32q %rsi, %rax # sched: [3:1.00]
-; BROADWELL-NEXT: crc32q (%rdx), %rax # sched: [8:1.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: crc32_64_64:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: movq %rdi, %rax # sched: [1:0.25]
-; SKYLAKE-SSE-NEXT: crc32q %rsi, %rax # sched: [3:1.00]
-; SKYLAKE-SSE-NEXT: crc32q (%rdx), %rax # sched: [8:1.00]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: crc32_64_64:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: movq %rdi, %rax # sched: [1:0.25]
-; SKYLAKE-NEXT: crc32q %rsi, %rax # sched: [3:1.00]
-; SKYLAKE-NEXT: crc32q (%rdx), %rax # sched: [8:1.00]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: crc32_64_64:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: movq %rdi, %rax # sched: [1:0.25]
-; SKX-SSE-NEXT: crc32q %rsi, %rax # sched: [3:1.00]
-; SKX-SSE-NEXT: crc32q (%rdx), %rax # sched: [8:1.00]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: crc32_64_64:
-; SKX: # %bb.0:
-; SKX-NEXT: movq %rdi, %rax # sched: [1:0.25]
-; SKX-NEXT: crc32q %rsi, %rax # sched: [3:1.00]
-; SKX-NEXT: crc32q (%rdx), %rax # sched: [8:1.00]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: crc32_64_64:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: movq %rdi, %rax # sched: [1:0.50]
-; BDVER2-SSE-NEXT: crc32q %rsi, %rax # sched: [10:2.00]
-; BDVER2-SSE-NEXT: crc32q (%rdx), %rax # sched: [7:2.00]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: crc32_64_64:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: movq %rdi, %rax # sched: [1:0.50]
-; BDVER2-NEXT: crc32q %rsi, %rax # sched: [10:2.00]
-; BDVER2-NEXT: crc32q (%rdx), %rax # sched: [7:2.00]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: crc32_64_64:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: movq %rdi, %rax # sched: [1:0.50]
-; BTVER2-SSE-NEXT: crc32q %rsi, %rax # sched: [3:2.00]
-; BTVER2-SSE-NEXT: crc32q (%rdx), %rax # sched: [6:2.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: crc32_64_64:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: movq %rdi, %rax # sched: [1:0.50]
-; BTVER2-NEXT: crc32q %rsi, %rax # sched: [3:2.00]
-; BTVER2-NEXT: crc32q (%rdx), %rax # sched: [6:2.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: crc32_64_64:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: movq %rdi, %rax # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: crc32q %rsi, %rax # sched: [3:1.00]
-; ZNVER1-SSE-NEXT: crc32q (%rdx), %rax # sched: [10:1.00]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: crc32_64_64:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: movq %rdi, %rax # sched: [1:0.25]
-; ZNVER1-NEXT: crc32q %rsi, %rax # sched: [3:1.00]
-; ZNVER1-NEXT: crc32q (%rdx), %rax # sched: [10:1.00]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call i64 @llvm.x86.sse42.crc32.64.64(i64 %a0, i64 %a1)
- %2 = load i64, i64 *%a2
- %3 = call i64 @llvm.x86.sse42.crc32.64.64(i64 %1, i64 %2)
- ret i64 %3
-}
-declare i64 @llvm.x86.sse42.crc32.64.64(i64, i64) nounwind
-
-define i32 @test_pcmpestri(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> *%a2) {
-; GENERIC-LABEL: test_pcmpestri:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movl $7, %eax # sched: [1:0.33]
-; GENERIC-NEXT: movl $7, %edx # sched: [1:0.33]
-; GENERIC-NEXT: pcmpestri $7, %xmm1, %xmm0 # sched: [4:2.67]
-; GENERIC-NEXT: movl %ecx, %esi # sched: [1:0.33]
-; GENERIC-NEXT: movl $7, %eax # sched: [1:0.33]
-; GENERIC-NEXT: movl $7, %edx # sched: [1:0.33]
-; GENERIC-NEXT: pcmpestri $7, (%rdi), %xmm0 # sched: [4:2.33]
-; GENERIC-NEXT: # kill: def $ecx killed $ecx def $rcx
-; GENERIC-NEXT: leal (%rcx,%rsi), %eax # sched: [1:0.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_pcmpestri:
-; SLM: # %bb.0:
-; SLM-NEXT: movl $7, %eax # sched: [1:0.50]
-; SLM-NEXT: movl $7, %edx # sched: [1:0.50]
-; SLM-NEXT: pcmpestri $7, %xmm1, %xmm0 # sched: [21:21.00]
-; SLM-NEXT: movl $7, %eax # sched: [1:0.50]
-; SLM-NEXT: movl $7, %edx # sched: [1:0.50]
-; SLM-NEXT: movl %ecx, %esi # sched: [1:0.50]
-; SLM-NEXT: pcmpestri $7, (%rdi), %xmm0 # sched: [21:21.00]
-; SLM-NEXT: # kill: def $ecx killed $ecx def $rcx
-; SLM-NEXT: leal (%rcx,%rsi), %eax # sched: [1:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pcmpestri:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: movl $7, %eax # sched: [1:0.33]
-; SANDY-SSE-NEXT: movl $7, %edx # sched: [1:0.33]
-; SANDY-SSE-NEXT: pcmpestri $7, %xmm1, %xmm0 # sched: [4:2.67]
-; SANDY-SSE-NEXT: movl %ecx, %esi # sched: [1:0.33]
-; SANDY-SSE-NEXT: movl $7, %eax # sched: [1:0.33]
-; SANDY-SSE-NEXT: movl $7, %edx # sched: [1:0.33]
-; SANDY-SSE-NEXT: pcmpestri $7, (%rdi), %xmm0 # sched: [4:2.33]
-; SANDY-SSE-NEXT: # kill: def $ecx killed $ecx def $rcx
-; SANDY-SSE-NEXT: leal (%rcx,%rsi), %eax # sched: [1:0.50]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pcmpestri:
-; SANDY: # %bb.0:
-; SANDY-NEXT: movl $7, %eax # sched: [1:0.33]
-; SANDY-NEXT: movl $7, %edx # sched: [1:0.33]
-; SANDY-NEXT: vpcmpestri $7, %xmm1, %xmm0 # sched: [4:2.67]
-; SANDY-NEXT: movl %ecx, %esi # sched: [1:0.33]
-; SANDY-NEXT: movl $7, %eax # sched: [1:0.33]
-; SANDY-NEXT: movl $7, %edx # sched: [1:0.33]
-; SANDY-NEXT: vpcmpestri $7, (%rdi), %xmm0 # sched: [4:2.33]
-; SANDY-NEXT: # kill: def $ecx killed $ecx def $rcx
-; SANDY-NEXT: leal (%rcx,%rsi), %eax # sched: [1:0.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pcmpestri:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: movl $7, %eax # sched: [1:0.25]
-; HASWELL-SSE-NEXT: movl $7, %edx # sched: [1:0.25]
-; HASWELL-SSE-NEXT: pcmpestri $7, %xmm1, %xmm0 # sched: [18:4.00]
-; HASWELL-SSE-NEXT: movl %ecx, %esi # sched: [1:0.25]
-; HASWELL-SSE-NEXT: movl $7, %eax # sched: [1:0.25]
-; HASWELL-SSE-NEXT: movl $7, %edx # sched: [1:0.25]
-; HASWELL-SSE-NEXT: pcmpestri $7, (%rdi), %xmm0 # sched: [24:4.00]
-; HASWELL-SSE-NEXT: # kill: def $ecx killed $ecx def $rcx
-; HASWELL-SSE-NEXT: leal (%rcx,%rsi), %eax # sched: [1:0.50]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pcmpestri:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: movl $7, %eax # sched: [1:0.25]
-; HASWELL-NEXT: movl $7, %edx # sched: [1:0.25]
-; HASWELL-NEXT: vpcmpestri $7, %xmm1, %xmm0 # sched: [18:4.00]
-; HASWELL-NEXT: movl %ecx, %esi # sched: [1:0.25]
-; HASWELL-NEXT: movl $7, %eax # sched: [1:0.25]
-; HASWELL-NEXT: movl $7, %edx # sched: [1:0.25]
-; HASWELL-NEXT: vpcmpestri $7, (%rdi), %xmm0 # sched: [24:4.00]
-; HASWELL-NEXT: # kill: def $ecx killed $ecx def $rcx
-; HASWELL-NEXT: leal (%rcx,%rsi), %eax # sched: [1:0.50]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pcmpestri:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: movl $7, %eax # sched: [1:0.25]
-; BROADWELL-SSE-NEXT: movl $7, %edx # sched: [1:0.25]
-; BROADWELL-SSE-NEXT: pcmpestri $7, %xmm1, %xmm0 # sched: [18:4.00]
-; BROADWELL-SSE-NEXT: movl %ecx, %esi # sched: [1:0.25]
-; BROADWELL-SSE-NEXT: movl $7, %eax # sched: [1:0.25]
-; BROADWELL-SSE-NEXT: movl $7, %edx # sched: [1:0.25]
-; BROADWELL-SSE-NEXT: pcmpestri $7, (%rdi), %xmm0 # sched: [23:4.00]
-; BROADWELL-SSE-NEXT: # kill: def $ecx killed $ecx def $rcx
-; BROADWELL-SSE-NEXT: leal (%rcx,%rsi), %eax # sched: [1:0.50]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pcmpestri:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: movl $7, %eax # sched: [1:0.25]
-; BROADWELL-NEXT: movl $7, %edx # sched: [1:0.25]
-; BROADWELL-NEXT: vpcmpestri $7, %xmm1, %xmm0 # sched: [18:4.00]
-; BROADWELL-NEXT: movl %ecx, %esi # sched: [1:0.25]
-; BROADWELL-NEXT: movl $7, %eax # sched: [1:0.25]
-; BROADWELL-NEXT: movl $7, %edx # sched: [1:0.25]
-; BROADWELL-NEXT: vpcmpestri $7, (%rdi), %xmm0 # sched: [23:4.00]
-; BROADWELL-NEXT: # kill: def $ecx killed $ecx def $rcx
-; BROADWELL-NEXT: leal (%rcx,%rsi), %eax # sched: [1:0.50]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pcmpestri:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: movl $7, %eax # sched: [1:0.25]
-; SKYLAKE-SSE-NEXT: movl $7, %edx # sched: [1:0.25]
-; SKYLAKE-SSE-NEXT: pcmpestri $7, %xmm1, %xmm0 # sched: [18:4.00]
-; SKYLAKE-SSE-NEXT: movl %ecx, %esi # sched: [1:0.25]
-; SKYLAKE-SSE-NEXT: movl $7, %eax # sched: [1:0.25]
-; SKYLAKE-SSE-NEXT: movl $7, %edx # sched: [1:0.25]
-; SKYLAKE-SSE-NEXT: pcmpestri $7, (%rdi), %xmm0 # sched: [24:4.00]
-; SKYLAKE-SSE-NEXT: # kill: def $ecx killed $ecx def $rcx
-; SKYLAKE-SSE-NEXT: leal (%rcx,%rsi), %eax # sched: [1:0.50]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pcmpestri:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: movl $7, %eax # sched: [1:0.25]
-; SKYLAKE-NEXT: movl $7, %edx # sched: [1:0.25]
-; SKYLAKE-NEXT: vpcmpestri $7, %xmm1, %xmm0 # sched: [18:4.00]
-; SKYLAKE-NEXT: movl %ecx, %esi # sched: [1:0.25]
-; SKYLAKE-NEXT: movl $7, %eax # sched: [1:0.25]
-; SKYLAKE-NEXT: movl $7, %edx # sched: [1:0.25]
-; SKYLAKE-NEXT: vpcmpestri $7, (%rdi), %xmm0 # sched: [24:4.00]
-; SKYLAKE-NEXT: # kill: def $ecx killed $ecx def $rcx
-; SKYLAKE-NEXT: leal (%rcx,%rsi), %eax # sched: [1:0.50]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pcmpestri:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: movl $7, %eax # sched: [1:0.25]
-; SKX-SSE-NEXT: movl $7, %edx # sched: [1:0.25]
-; SKX-SSE-NEXT: pcmpestri $7, %xmm1, %xmm0 # sched: [18:4.00]
-; SKX-SSE-NEXT: movl %ecx, %esi # sched: [1:0.25]
-; SKX-SSE-NEXT: movl $7, %eax # sched: [1:0.25]
-; SKX-SSE-NEXT: movl $7, %edx # sched: [1:0.25]
-; SKX-SSE-NEXT: pcmpestri $7, (%rdi), %xmm0 # sched: [24:4.00]
-; SKX-SSE-NEXT: # kill: def $ecx killed $ecx def $rcx
-; SKX-SSE-NEXT: leal (%rcx,%rsi), %eax # sched: [1:0.50]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pcmpestri:
-; SKX: # %bb.0:
-; SKX-NEXT: movl $7, %eax # sched: [1:0.25]
-; SKX-NEXT: movl $7, %edx # sched: [1:0.25]
-; SKX-NEXT: vpcmpestri $7, %xmm1, %xmm0 # sched: [18:4.00]
-; SKX-NEXT: movl %ecx, %esi # sched: [1:0.25]
-; SKX-NEXT: movl $7, %eax # sched: [1:0.25]
-; SKX-NEXT: movl $7, %edx # sched: [1:0.25]
-; SKX-NEXT: vpcmpestri $7, (%rdi), %xmm0 # sched: [24:4.00]
-; SKX-NEXT: # kill: def $ecx killed $ecx def $rcx
-; SKX-NEXT: leal (%rcx,%rsi), %eax # sched: [1:0.50]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pcmpestri:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: movl $7, %eax # sched: [1:0.50]
-; BDVER2-SSE-NEXT: movl $7, %edx # sched: [1:0.50]
-; BDVER2-SSE-NEXT: pcmpestri $7, %xmm1, %xmm0 # sched: [15:4.00]
-; BDVER2-SSE-NEXT: movl $7, %eax # sched: [1:0.50]
-; BDVER2-SSE-NEXT: movl $7, %edx # sched: [1:0.50]
-; BDVER2-SSE-NEXT: movl %ecx, %esi # sched: [1:0.50]
-; BDVER2-SSE-NEXT: pcmpestri $7, (%rdi), %xmm0 # sched: [20:4.50]
-; BDVER2-SSE-NEXT: # kill: def $ecx killed $ecx def $rcx
-; BDVER2-SSE-NEXT: leal (%rcx,%rsi), %eax # sched: [1:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pcmpestri:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: movl $7, %eax # sched: [1:0.50]
-; BDVER2-NEXT: movl $7, %edx # sched: [1:0.50]
-; BDVER2-NEXT: vpcmpestri $7, %xmm1, %xmm0 # sched: [15:4.00]
-; BDVER2-NEXT: movl $7, %eax # sched: [1:0.50]
-; BDVER2-NEXT: movl $7, %edx # sched: [1:0.50]
-; BDVER2-NEXT: movl %ecx, %esi # sched: [1:0.50]
-; BDVER2-NEXT: vpcmpestri $7, (%rdi), %xmm0 # sched: [20:4.50]
-; BDVER2-NEXT: # kill: def $ecx killed $ecx def $rcx
-; BDVER2-NEXT: leal (%rcx,%rsi), %eax # sched: [1:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pcmpestri:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: movl $7, %eax # sched: [1:0.50]
-; BTVER2-SSE-NEXT: movl $7, %edx # sched: [1:0.50]
-; BTVER2-SSE-NEXT: pcmpestri $7, %xmm1, %xmm0 # sched: [14:5.00]
-; BTVER2-SSE-NEXT: movl $7, %eax # sched: [1:0.50]
-; BTVER2-SSE-NEXT: movl $7, %edx # sched: [1:0.50]
-; BTVER2-SSE-NEXT: movl %ecx, %esi # sched: [1:0.50]
-; BTVER2-SSE-NEXT: pcmpestri $7, (%rdi), %xmm0 # sched: [19:5.00]
-; BTVER2-SSE-NEXT: # kill: def $ecx killed $ecx def $rcx
-; BTVER2-SSE-NEXT: leal (%rcx,%rsi), %eax # sched: [1:0.50]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pcmpestri:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: movl $7, %eax # sched: [1:0.50]
-; BTVER2-NEXT: movl $7, %edx # sched: [1:0.50]
-; BTVER2-NEXT: vpcmpestri $7, %xmm1, %xmm0 # sched: [14:5.00]
-; BTVER2-NEXT: movl $7, %eax # sched: [1:0.50]
-; BTVER2-NEXT: movl $7, %edx # sched: [1:0.50]
-; BTVER2-NEXT: movl %ecx, %esi # sched: [1:0.50]
-; BTVER2-NEXT: vpcmpestri $7, (%rdi), %xmm0 # sched: [19:5.00]
-; BTVER2-NEXT: # kill: def $ecx killed $ecx def $rcx
-; BTVER2-NEXT: leal (%rcx,%rsi), %eax # sched: [1:0.50]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pcmpestri:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: movl $7, %eax # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: movl $7, %edx # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: pcmpestri $7, %xmm1, %xmm0 # sched: [100:0.25]
-; ZNVER1-SSE-NEXT: movl $7, %eax # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: movl $7, %edx # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: movl %ecx, %esi # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: pcmpestri $7, (%rdi), %xmm0 # sched: [100:0.25]
-; ZNVER1-SSE-NEXT: # kill: def $ecx killed $ecx def $rcx
-; ZNVER1-SSE-NEXT: leal (%rcx,%rsi), %eax # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pcmpestri:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: movl $7, %eax # sched: [1:0.25]
-; ZNVER1-NEXT: movl $7, %edx # sched: [1:0.25]
-; ZNVER1-NEXT: vpcmpestri $7, %xmm1, %xmm0 # sched: [100:0.25]
-; ZNVER1-NEXT: movl $7, %eax # sched: [1:0.25]
-; ZNVER1-NEXT: movl $7, %edx # sched: [1:0.25]
-; ZNVER1-NEXT: movl %ecx, %esi # sched: [1:0.25]
-; ZNVER1-NEXT: vpcmpestri $7, (%rdi), %xmm0 # sched: [100:0.25]
-; ZNVER1-NEXT: # kill: def $ecx killed $ecx def $rcx
-; ZNVER1-NEXT: leal (%rcx,%rsi), %eax # sched: [1:0.25]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call i32 @llvm.x86.sse42.pcmpestri128(<16 x i8> %a0, i32 7, <16 x i8> %a1, i32 7, i8 7)
- %2 = load <16 x i8>, <16 x i8> *%a2, align 16
- %3 = call i32 @llvm.x86.sse42.pcmpestri128(<16 x i8> %a0, i32 7, <16 x i8> %2, i32 7, i8 7)
- %4 = add i32 %1, %3
- ret i32 %4
-}
-declare i32 @llvm.x86.sse42.pcmpestri128(<16 x i8>, i32, <16 x i8>, i32, i8) nounwind readnone
-
-define <16 x i8> @test_pcmpestrm(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> *%a2) {
-; GENERIC-LABEL: test_pcmpestrm:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movl $7, %eax # sched: [1:0.33]
-; GENERIC-NEXT: movl $7, %edx # sched: [1:0.33]
-; GENERIC-NEXT: pcmpestrm $7, %xmm1, %xmm0 # sched: [11:2.67]
-; GENERIC-NEXT: movl $7, %eax # sched: [1:0.33]
-; GENERIC-NEXT: movl $7, %edx # sched: [1:0.33]
-; GENERIC-NEXT: pcmpestrm $7, (%rdi), %xmm0 # sched: [11:2.33]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_pcmpestrm:
-; SLM: # %bb.0:
-; SLM-NEXT: movl $7, %eax # sched: [1:0.50]
-; SLM-NEXT: movl $7, %edx # sched: [1:0.50]
-; SLM-NEXT: pcmpestrm $7, %xmm1, %xmm0 # sched: [17:17.00]
-; SLM-NEXT: movl $7, %eax # sched: [1:0.50]
-; SLM-NEXT: movl $7, %edx # sched: [1:0.50]
-; SLM-NEXT: pcmpestrm $7, (%rdi), %xmm0 # sched: [17:17.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pcmpestrm:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: movl $7, %eax # sched: [1:0.33]
-; SANDY-SSE-NEXT: movl $7, %edx # sched: [1:0.33]
-; SANDY-SSE-NEXT: pcmpestrm $7, %xmm1, %xmm0 # sched: [11:2.67]
-; SANDY-SSE-NEXT: movl $7, %eax # sched: [1:0.33]
-; SANDY-SSE-NEXT: movl $7, %edx # sched: [1:0.33]
-; SANDY-SSE-NEXT: pcmpestrm $7, (%rdi), %xmm0 # sched: [11:2.33]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pcmpestrm:
-; SANDY: # %bb.0:
-; SANDY-NEXT: movl $7, %eax # sched: [1:0.33]
-; SANDY-NEXT: movl $7, %edx # sched: [1:0.33]
-; SANDY-NEXT: vpcmpestrm $7, %xmm1, %xmm0 # sched: [11:2.67]
-; SANDY-NEXT: movl $7, %eax # sched: [1:0.33]
-; SANDY-NEXT: movl $7, %edx # sched: [1:0.33]
-; SANDY-NEXT: vpcmpestrm $7, (%rdi), %xmm0 # sched: [11:2.33]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pcmpestrm:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: movl $7, %eax # sched: [1:0.25]
-; HASWELL-SSE-NEXT: movl $7, %edx # sched: [1:0.25]
-; HASWELL-SSE-NEXT: pcmpestrm $7, %xmm1, %xmm0 # sched: [19:4.00]
-; HASWELL-SSE-NEXT: movl $7, %eax # sched: [1:0.25]
-; HASWELL-SSE-NEXT: movl $7, %edx # sched: [1:0.25]
-; HASWELL-SSE-NEXT: pcmpestrm $7, (%rdi), %xmm0 # sched: [25:4.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pcmpestrm:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: movl $7, %eax # sched: [1:0.25]
-; HASWELL-NEXT: movl $7, %edx # sched: [1:0.25]
-; HASWELL-NEXT: vpcmpestrm $7, %xmm1, %xmm0 # sched: [19:4.00]
-; HASWELL-NEXT: movl $7, %eax # sched: [1:0.25]
-; HASWELL-NEXT: movl $7, %edx # sched: [1:0.25]
-; HASWELL-NEXT: vpcmpestrm $7, (%rdi), %xmm0 # sched: [25:4.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pcmpestrm:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: movl $7, %eax # sched: [1:0.25]
-; BROADWELL-SSE-NEXT: movl $7, %edx # sched: [1:0.25]
-; BROADWELL-SSE-NEXT: pcmpestrm $7, %xmm1, %xmm0 # sched: [19:4.00]
-; BROADWELL-SSE-NEXT: movl $7, %eax # sched: [1:0.25]
-; BROADWELL-SSE-NEXT: movl $7, %edx # sched: [1:0.25]
-; BROADWELL-SSE-NEXT: pcmpestrm $7, (%rdi), %xmm0 # sched: [24:4.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pcmpestrm:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: movl $7, %eax # sched: [1:0.25]
-; BROADWELL-NEXT: movl $7, %edx # sched: [1:0.25]
-; BROADWELL-NEXT: vpcmpestrm $7, %xmm1, %xmm0 # sched: [19:4.00]
-; BROADWELL-NEXT: movl $7, %eax # sched: [1:0.25]
-; BROADWELL-NEXT: movl $7, %edx # sched: [1:0.25]
-; BROADWELL-NEXT: vpcmpestrm $7, (%rdi), %xmm0 # sched: [24:4.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pcmpestrm:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: movl $7, %eax # sched: [1:0.25]
-; SKYLAKE-SSE-NEXT: movl $7, %edx # sched: [1:0.25]
-; SKYLAKE-SSE-NEXT: pcmpestrm $7, %xmm1, %xmm0 # sched: [19:4.00]
-; SKYLAKE-SSE-NEXT: movl $7, %eax # sched: [1:0.25]
-; SKYLAKE-SSE-NEXT: movl $7, %edx # sched: [1:0.25]
-; SKYLAKE-SSE-NEXT: pcmpestrm $7, (%rdi), %xmm0 # sched: [25:4.00]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pcmpestrm:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: movl $7, %eax # sched: [1:0.25]
-; SKYLAKE-NEXT: movl $7, %edx # sched: [1:0.25]
-; SKYLAKE-NEXT: vpcmpestrm $7, %xmm1, %xmm0 # sched: [19:4.00]
-; SKYLAKE-NEXT: movl $7, %eax # sched: [1:0.25]
-; SKYLAKE-NEXT: movl $7, %edx # sched: [1:0.25]
-; SKYLAKE-NEXT: vpcmpestrm $7, (%rdi), %xmm0 # sched: [25:4.00]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pcmpestrm:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: movl $7, %eax # sched: [1:0.25]
-; SKX-SSE-NEXT: movl $7, %edx # sched: [1:0.25]
-; SKX-SSE-NEXT: pcmpestrm $7, %xmm1, %xmm0 # sched: [19:4.00]
-; SKX-SSE-NEXT: movl $7, %eax # sched: [1:0.25]
-; SKX-SSE-NEXT: movl $7, %edx # sched: [1:0.25]
-; SKX-SSE-NEXT: pcmpestrm $7, (%rdi), %xmm0 # sched: [25:4.00]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pcmpestrm:
-; SKX: # %bb.0:
-; SKX-NEXT: movl $7, %eax # sched: [1:0.25]
-; SKX-NEXT: movl $7, %edx # sched: [1:0.25]
-; SKX-NEXT: vpcmpestrm $7, %xmm1, %xmm0 # sched: [19:4.00]
-; SKX-NEXT: movl $7, %eax # sched: [1:0.25]
-; SKX-NEXT: movl $7, %edx # sched: [1:0.25]
-; SKX-NEXT: vpcmpestrm $7, (%rdi), %xmm0 # sched: [25:4.00]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pcmpestrm:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: movl $7, %eax # sched: [1:0.50]
-; BDVER2-SSE-NEXT: movl $7, %edx # sched: [1:0.50]
-; BDVER2-SSE-NEXT: pcmpestrm $7, %xmm1, %xmm0 # sched: [10:4.00]
-; BDVER2-SSE-NEXT: movl $7, %eax # sched: [1:0.50]
-; BDVER2-SSE-NEXT: movl $7, %edx # sched: [1:0.50]
-; BDVER2-SSE-NEXT: pcmpestrm $7, (%rdi), %xmm0 # sched: [15:4.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pcmpestrm:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: movl $7, %eax # sched: [1:0.50]
-; BDVER2-NEXT: movl $7, %edx # sched: [1:0.50]
-; BDVER2-NEXT: vpcmpestrm $7, %xmm1, %xmm0 # sched: [10:4.00]
-; BDVER2-NEXT: movl $7, %eax # sched: [1:0.50]
-; BDVER2-NEXT: movl $7, %edx # sched: [1:0.50]
-; BDVER2-NEXT: vpcmpestrm $7, (%rdi), %xmm0 # sched: [15:4.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pcmpestrm:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: movl $7, %eax # sched: [1:0.50]
-; BTVER2-SSE-NEXT: movl $7, %edx # sched: [1:0.50]
-; BTVER2-SSE-NEXT: pcmpestrm $7, %xmm1, %xmm0 # sched: [14:5.00]
-; BTVER2-SSE-NEXT: movl $7, %eax # sched: [1:0.50]
-; BTVER2-SSE-NEXT: movl $7, %edx # sched: [1:0.50]
-; BTVER2-SSE-NEXT: pcmpestrm $7, (%rdi), %xmm0 # sched: [19:5.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pcmpestrm:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: movl $7, %eax # sched: [1:0.50]
-; BTVER2-NEXT: movl $7, %edx # sched: [1:0.50]
-; BTVER2-NEXT: vpcmpestrm $7, %xmm1, %xmm0 # sched: [14:5.00]
-; BTVER2-NEXT: movl $7, %eax # sched: [1:0.50]
-; BTVER2-NEXT: movl $7, %edx # sched: [1:0.50]
-; BTVER2-NEXT: vpcmpestrm $7, (%rdi), %xmm0 # sched: [19:5.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pcmpestrm:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: movl $7, %eax # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: movl $7, %edx # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: pcmpestrm $7, %xmm1, %xmm0 # sched: [100:0.25]
-; ZNVER1-SSE-NEXT: movl $7, %eax # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: movl $7, %edx # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: pcmpestrm $7, (%rdi), %xmm0 # sched: [100:0.25]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pcmpestrm:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: movl $7, %eax # sched: [1:0.25]
-; ZNVER1-NEXT: movl $7, %edx # sched: [1:0.25]
-; ZNVER1-NEXT: vpcmpestrm $7, %xmm1, %xmm0 # sched: [100:0.25]
-; ZNVER1-NEXT: movl $7, %eax # sched: [1:0.25]
-; ZNVER1-NEXT: movl $7, %edx # sched: [1:0.25]
-; ZNVER1-NEXT: vpcmpestrm $7, (%rdi), %xmm0 # sched: [100:0.25]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call <16 x i8> @llvm.x86.sse42.pcmpestrm128(<16 x i8> %a0, i32 7, <16 x i8> %a1, i32 7, i8 7)
- %2 = load <16 x i8>, <16 x i8> *%a2, align 16
- %3 = call <16 x i8> @llvm.x86.sse42.pcmpestrm128(<16 x i8> %1, i32 7, <16 x i8> %2, i32 7, i8 7)
- ret <16 x i8> %3
-}
-declare <16 x i8> @llvm.x86.sse42.pcmpestrm128(<16 x i8>, i32, <16 x i8>, i32, i8) nounwind readnone
-
-define i32 @test_pcmpistri(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> *%a2) {
-; GENERIC-LABEL: test_pcmpistri:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pcmpistri $7, %xmm1, %xmm0 # sched: [11:3.00]
-; GENERIC-NEXT: movl %ecx, %eax # sched: [1:0.33]
-; GENERIC-NEXT: pcmpistri $7, (%rdi), %xmm0 # sched: [17:3.00]
-; GENERIC-NEXT: # kill: def $ecx killed $ecx def $rcx
-; GENERIC-NEXT: leal (%rcx,%rax), %eax # sched: [1:0.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_pcmpistri:
-; SLM: # %bb.0:
-; SLM-NEXT: pcmpistri $7, %xmm1, %xmm0 # sched: [17:17.00]
-; SLM-NEXT: movl %ecx, %eax # sched: [1:0.50]
-; SLM-NEXT: pcmpistri $7, (%rdi), %xmm0 # sched: [17:17.00]
-; SLM-NEXT: # kill: def $ecx killed $ecx def $rcx
-; SLM-NEXT: leal (%rcx,%rax), %eax # sched: [1:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pcmpistri:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pcmpistri $7, %xmm1, %xmm0 # sched: [11:3.00]
-; SANDY-SSE-NEXT: movl %ecx, %eax # sched: [1:0.33]
-; SANDY-SSE-NEXT: pcmpistri $7, (%rdi), %xmm0 # sched: [17:3.00]
-; SANDY-SSE-NEXT: # kill: def $ecx killed $ecx def $rcx
-; SANDY-SSE-NEXT: leal (%rcx,%rax), %eax # sched: [1:0.50]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pcmpistri:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpcmpistri $7, %xmm1, %xmm0 # sched: [11:3.00]
-; SANDY-NEXT: movl %ecx, %eax # sched: [1:0.33]
-; SANDY-NEXT: vpcmpistri $7, (%rdi), %xmm0 # sched: [17:3.00]
-; SANDY-NEXT: # kill: def $ecx killed $ecx def $rcx
-; SANDY-NEXT: leal (%rcx,%rax), %eax # sched: [1:0.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pcmpistri:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pcmpistri $7, %xmm1, %xmm0 # sched: [11:3.00]
-; HASWELL-SSE-NEXT: movl %ecx, %eax # sched: [1:0.25]
-; HASWELL-SSE-NEXT: pcmpistri $7, (%rdi), %xmm0 # sched: [17:3.00]
-; HASWELL-SSE-NEXT: # kill: def $ecx killed $ecx def $rcx
-; HASWELL-SSE-NEXT: leal (%rcx,%rax), %eax # sched: [1:0.50]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pcmpistri:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpcmpistri $7, %xmm1, %xmm0 # sched: [11:3.00]
-; HASWELL-NEXT: movl %ecx, %eax # sched: [1:0.25]
-; HASWELL-NEXT: vpcmpistri $7, (%rdi), %xmm0 # sched: [17:3.00]
-; HASWELL-NEXT: # kill: def $ecx killed $ecx def $rcx
-; HASWELL-NEXT: leal (%rcx,%rax), %eax # sched: [1:0.50]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pcmpistri:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pcmpistri $7, %xmm1, %xmm0 # sched: [11:3.00]
-; BROADWELL-SSE-NEXT: movl %ecx, %eax # sched: [1:0.25]
-; BROADWELL-SSE-NEXT: pcmpistri $7, (%rdi), %xmm0 # sched: [16:3.00]
-; BROADWELL-SSE-NEXT: # kill: def $ecx killed $ecx def $rcx
-; BROADWELL-SSE-NEXT: leal (%rcx,%rax), %eax # sched: [1:0.50]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pcmpistri:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpcmpistri $7, %xmm1, %xmm0 # sched: [11:3.00]
-; BROADWELL-NEXT: movl %ecx, %eax # sched: [1:0.25]
-; BROADWELL-NEXT: vpcmpistri $7, (%rdi), %xmm0 # sched: [16:3.00]
-; BROADWELL-NEXT: # kill: def $ecx killed $ecx def $rcx
-; BROADWELL-NEXT: leal (%rcx,%rax), %eax # sched: [1:0.50]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pcmpistri:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pcmpistri $7, %xmm1, %xmm0 # sched: [10:3.00]
-; SKYLAKE-SSE-NEXT: movl %ecx, %eax # sched: [1:0.25]
-; SKYLAKE-SSE-NEXT: pcmpistri $7, (%rdi), %xmm0 # sched: [16:3.00]
-; SKYLAKE-SSE-NEXT: # kill: def $ecx killed $ecx def $rcx
-; SKYLAKE-SSE-NEXT: leal (%rcx,%rax), %eax # sched: [1:0.50]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pcmpistri:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpcmpistri $7, %xmm1, %xmm0 # sched: [10:3.00]
-; SKYLAKE-NEXT: movl %ecx, %eax # sched: [1:0.25]
-; SKYLAKE-NEXT: vpcmpistri $7, (%rdi), %xmm0 # sched: [16:3.00]
-; SKYLAKE-NEXT: # kill: def $ecx killed $ecx def $rcx
-; SKYLAKE-NEXT: leal (%rcx,%rax), %eax # sched: [1:0.50]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pcmpistri:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pcmpistri $7, %xmm1, %xmm0 # sched: [10:3.00]
-; SKX-SSE-NEXT: movl %ecx, %eax # sched: [1:0.25]
-; SKX-SSE-NEXT: pcmpistri $7, (%rdi), %xmm0 # sched: [16:3.00]
-; SKX-SSE-NEXT: # kill: def $ecx killed $ecx def $rcx
-; SKX-SSE-NEXT: leal (%rcx,%rax), %eax # sched: [1:0.50]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pcmpistri:
-; SKX: # %bb.0:
-; SKX-NEXT: vpcmpistri $7, %xmm1, %xmm0 # sched: [10:3.00]
-; SKX-NEXT: movl %ecx, %eax # sched: [1:0.25]
-; SKX-NEXT: vpcmpistri $7, (%rdi), %xmm0 # sched: [16:3.00]
-; SKX-NEXT: # kill: def $ecx killed $ecx def $rcx
-; SKX-NEXT: leal (%rcx,%rax), %eax # sched: [1:0.50]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pcmpistri:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pcmpistri $7, %xmm1, %xmm0 # sched: [14:1.00]
-; BDVER2-SSE-NEXT: movl %ecx, %eax # sched: [1:0.50]
-; BDVER2-SSE-NEXT: pcmpistri $7, (%rdi), %xmm0 # sched: [19:1.00]
-; BDVER2-SSE-NEXT: # kill: def $ecx killed $ecx def $rcx
-; BDVER2-SSE-NEXT: leal (%rcx,%rax), %eax # sched: [1:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pcmpistri:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpcmpistri $7, %xmm1, %xmm0 # sched: [14:1.00]
-; BDVER2-NEXT: movl %ecx, %eax # sched: [1:0.50]
-; BDVER2-NEXT: vpcmpistri $7, (%rdi), %xmm0 # sched: [19:1.00]
-; BDVER2-NEXT: # kill: def $ecx killed $ecx def $rcx
-; BDVER2-NEXT: leal (%rcx,%rax), %eax # sched: [1:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pcmpistri:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pcmpistri $7, %xmm1, %xmm0 # sched: [7:2.00]
-; BTVER2-SSE-NEXT: movl %ecx, %eax # sched: [1:0.50]
-; BTVER2-SSE-NEXT: pcmpistri $7, (%rdi), %xmm0 # sched: [12:2.00]
-; BTVER2-SSE-NEXT: # kill: def $ecx killed $ecx def $rcx
-; BTVER2-SSE-NEXT: leal (%rcx,%rax), %eax # sched: [1:0.50]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pcmpistri:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpcmpistri $7, %xmm1, %xmm0 # sched: [7:2.00]
-; BTVER2-NEXT: movl %ecx, %eax # sched: [1:0.50]
-; BTVER2-NEXT: vpcmpistri $7, (%rdi), %xmm0 # sched: [12:2.00]
-; BTVER2-NEXT: # kill: def $ecx killed $ecx def $rcx
-; BTVER2-NEXT: leal (%rcx,%rax), %eax # sched: [1:0.50]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pcmpistri:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pcmpistri $7, %xmm1, %xmm0 # sched: [100:0.25]
-; ZNVER1-SSE-NEXT: movl %ecx, %eax # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: pcmpistri $7, (%rdi), %xmm0 # sched: [100:0.25]
-; ZNVER1-SSE-NEXT: # kill: def $ecx killed $ecx def $rcx
-; ZNVER1-SSE-NEXT: leal (%rcx,%rax), %eax # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pcmpistri:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpcmpistri $7, %xmm1, %xmm0 # sched: [100:0.25]
-; ZNVER1-NEXT: movl %ecx, %eax # sched: [1:0.25]
-; ZNVER1-NEXT: vpcmpistri $7, (%rdi), %xmm0 # sched: [100:0.25]
-; ZNVER1-NEXT: # kill: def $ecx killed $ecx def $rcx
-; ZNVER1-NEXT: leal (%rcx,%rax), %eax # sched: [1:0.25]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call i32 @llvm.x86.sse42.pcmpistri128(<16 x i8> %a0, <16 x i8> %a1, i8 7)
- %2 = load <16 x i8>, <16 x i8> *%a2, align 16
- %3 = call i32 @llvm.x86.sse42.pcmpistri128(<16 x i8> %a0, <16 x i8> %2, i8 7)
- %4 = add i32 %1, %3
- ret i32 %4
-}
-declare i32 @llvm.x86.sse42.pcmpistri128(<16 x i8>, <16 x i8>, i8) nounwind readnone
-
-define <16 x i8> @test_pcmpistrm(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> *%a2) {
-; GENERIC-LABEL: test_pcmpistrm:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pcmpistrm $7, %xmm1, %xmm0 # sched: [11:3.00]
-; GENERIC-NEXT: pcmpistrm $7, (%rdi), %xmm0 # sched: [17:3.00]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_pcmpistrm:
-; SLM: # %bb.0:
-; SLM-NEXT: pcmpistrm $7, %xmm1, %xmm0 # sched: [13:13.00]
-; SLM-NEXT: pcmpistrm $7, (%rdi), %xmm0 # sched: [13:13.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pcmpistrm:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pcmpistrm $7, %xmm1, %xmm0 # sched: [11:3.00]
-; SANDY-SSE-NEXT: pcmpistrm $7, (%rdi), %xmm0 # sched: [17:3.00]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pcmpistrm:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpcmpistrm $7, %xmm1, %xmm0 # sched: [11:3.00]
-; SANDY-NEXT: vpcmpistrm $7, (%rdi), %xmm0 # sched: [17:3.00]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pcmpistrm:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pcmpistrm $7, %xmm1, %xmm0 # sched: [11:3.00]
-; HASWELL-SSE-NEXT: pcmpistrm $7, (%rdi), %xmm0 # sched: [17:3.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pcmpistrm:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpcmpistrm $7, %xmm1, %xmm0 # sched: [11:3.00]
-; HASWELL-NEXT: vpcmpistrm $7, (%rdi), %xmm0 # sched: [17:3.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pcmpistrm:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pcmpistrm $7, %xmm1, %xmm0 # sched: [11:3.00]
-; BROADWELL-SSE-NEXT: pcmpistrm $7, (%rdi), %xmm0 # sched: [16:3.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pcmpistrm:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpcmpistrm $7, %xmm1, %xmm0 # sched: [11:3.00]
-; BROADWELL-NEXT: vpcmpistrm $7, (%rdi), %xmm0 # sched: [16:3.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pcmpistrm:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pcmpistrm $7, %xmm1, %xmm0 # sched: [10:3.00]
-; SKYLAKE-SSE-NEXT: pcmpistrm $7, (%rdi), %xmm0 # sched: [16:3.00]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pcmpistrm:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpcmpistrm $7, %xmm1, %xmm0 # sched: [10:3.00]
-; SKYLAKE-NEXT: vpcmpistrm $7, (%rdi), %xmm0 # sched: [16:3.00]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pcmpistrm:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pcmpistrm $7, %xmm1, %xmm0 # sched: [10:3.00]
-; SKX-SSE-NEXT: pcmpistrm $7, (%rdi), %xmm0 # sched: [16:3.00]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pcmpistrm:
-; SKX: # %bb.0:
-; SKX-NEXT: vpcmpistrm $7, %xmm1, %xmm0 # sched: [10:3.00]
-; SKX-NEXT: vpcmpistrm $7, (%rdi), %xmm0 # sched: [16:3.00]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pcmpistrm:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pcmpistrm $7, %xmm1, %xmm0 # sched: [6:1.00]
-; BDVER2-SSE-NEXT: pcmpistrm $7, (%rdi), %xmm0 # sched: [11:1.00]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pcmpistrm:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpcmpistrm $7, %xmm1, %xmm0 # sched: [6:1.00]
-; BDVER2-NEXT: vpcmpistrm $7, (%rdi), %xmm0 # sched: [11:1.00]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pcmpistrm:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pcmpistrm $7, %xmm1, %xmm0 # sched: [8:2.00]
-; BTVER2-SSE-NEXT: pcmpistrm $7, (%rdi), %xmm0 # sched: [13:2.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pcmpistrm:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpcmpistrm $7, %xmm1, %xmm0 # sched: [8:2.00]
-; BTVER2-NEXT: vpcmpistrm $7, (%rdi), %xmm0 # sched: [13:2.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pcmpistrm:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pcmpistrm $7, %xmm1, %xmm0 # sched: [100:0.25]
-; ZNVER1-SSE-NEXT: pcmpistrm $7, (%rdi), %xmm0 # sched: [100:0.25]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pcmpistrm:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpcmpistrm $7, %xmm1, %xmm0 # sched: [100:0.25]
-; ZNVER1-NEXT: vpcmpistrm $7, (%rdi), %xmm0 # sched: [100:0.25]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call <16 x i8> @llvm.x86.sse42.pcmpistrm128(<16 x i8> %a0, <16 x i8> %a1, i8 7)
- %2 = load <16 x i8>, <16 x i8> *%a2, align 16
- %3 = call <16 x i8> @llvm.x86.sse42.pcmpistrm128(<16 x i8> %1, <16 x i8> %2, i8 7)
- ret <16 x i8> %3
-}
-declare <16 x i8> @llvm.x86.sse42.pcmpistrm128(<16 x i8>, <16 x i8>, i8) nounwind readnone
-
-define <2 x i64> @test_pcmpgtq(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> *%a2) {
-; GENERIC-LABEL: test_pcmpgtq:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pcmpgtq %xmm1, %xmm0 # sched: [5:1.00]
-; GENERIC-NEXT: pcmpgtq (%rdi), %xmm0 # sched: [11:1.00]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_pcmpgtq:
-; SLM: # %bb.0:
-; SLM-NEXT: pcmpgtq %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: pcmpgtq (%rdi), %xmm0 # sched: [4:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pcmpgtq:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pcmpgtq %xmm1, %xmm0 # sched: [5:1.00]
-; SANDY-SSE-NEXT: pcmpgtq (%rdi), %xmm0 # sched: [11:1.00]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pcmpgtq:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0 # sched: [5:1.00]
-; SANDY-NEXT: vpcmpgtq (%rdi), %xmm0, %xmm0 # sched: [11:1.00]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pcmpgtq:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pcmpgtq %xmm1, %xmm0 # sched: [5:1.00]
-; HASWELL-SSE-NEXT: pcmpgtq (%rdi), %xmm0 # sched: [11:1.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pcmpgtq:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0 # sched: [5:1.00]
-; HASWELL-NEXT: vpcmpgtq (%rdi), %xmm0, %xmm0 # sched: [11:1.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pcmpgtq:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pcmpgtq %xmm1, %xmm0 # sched: [5:1.00]
-; BROADWELL-SSE-NEXT: pcmpgtq (%rdi), %xmm0 # sched: [10:1.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pcmpgtq:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0 # sched: [5:1.00]
-; BROADWELL-NEXT: vpcmpgtq (%rdi), %xmm0, %xmm0 # sched: [10:1.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pcmpgtq:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pcmpgtq %xmm1, %xmm0 # sched: [3:1.00]
-; SKYLAKE-SSE-NEXT: pcmpgtq (%rdi), %xmm0 # sched: [9:1.00]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pcmpgtq:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
-; SKYLAKE-NEXT: vpcmpgtq (%rdi), %xmm0, %xmm0 # sched: [9:1.00]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pcmpgtq:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pcmpgtq %xmm1, %xmm0 # sched: [3:1.00]
-; SKX-SSE-NEXT: pcmpgtq (%rdi), %xmm0 # sched: [9:1.00]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pcmpgtq:
-; SKX: # %bb.0:
-; SKX-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
-; SKX-NEXT: vpcmpgtq (%rdi), %xmm0, %xmm0 # sched: [9:1.00]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pcmpgtq:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pcmpgtq %xmm1, %xmm0 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: pcmpgtq (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pcmpgtq:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: vpcmpgtq (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pcmpgtq:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pcmpgtq %xmm1, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: pcmpgtq (%rdi), %xmm0 # sched: [6:1.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pcmpgtq:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: vpcmpgtq (%rdi), %xmm0, %xmm0 # sched: [6:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pcmpgtq:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pcmpgtq %xmm1, %xmm0 # sched: [1:0.50]
-; ZNVER1-SSE-NEXT: pcmpgtq (%rdi), %xmm0 # sched: [8:0.50]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pcmpgtq:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; ZNVER1-NEXT: vpcmpgtq (%rdi), %xmm0, %xmm0 # sched: [8:0.50]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = icmp sgt <2 x i64> %a0, %a1
- %2 = sext <2 x i1> %1 to <2 x i64>
- %3 = load <2 x i64>, <2 x i64>*%a2, align 16
- %4 = icmp sgt <2 x i64> %2, %3
- %5 = sext <2 x i1> %4 to <2 x i64>
- ret <2 x i64> %5
-}
-
-define <2 x i64> @test_pclmulqdq(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> *%a2) {
-; GENERIC-LABEL: test_pclmulqdq:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pclmulqdq $0, %xmm1, %xmm0 # sched: [14:6.00]
-; GENERIC-NEXT: pclmulqdq $0, (%rdi), %xmm0 # sched: [14:5.67]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; SLM-LABEL: test_pclmulqdq:
-; SLM: # %bb.0:
-; SLM-NEXT: pclmulqdq $0, %xmm1, %xmm0 # sched: [10:10.00]
-; SLM-NEXT: pclmulqdq $0, (%rdi), %xmm0 # sched: [10:10.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pclmulqdq:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pclmulqdq $0, %xmm1, %xmm0 # sched: [14:6.00]
-; SANDY-SSE-NEXT: pclmulqdq $0, (%rdi), %xmm0 # sched: [14:5.67]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pclmulqdq:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpclmulqdq $0, %xmm1, %xmm0, %xmm0 # sched: [14:6.00]
-; SANDY-NEXT: vpclmulqdq $0, (%rdi), %xmm0, %xmm0 # sched: [14:5.67]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pclmulqdq:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pclmulqdq $0, %xmm1, %xmm0 # sched: [11:2.00]
-; HASWELL-SSE-NEXT: pclmulqdq $0, (%rdi), %xmm0 # sched: [17:2.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pclmulqdq:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpclmulqdq $0, %xmm1, %xmm0, %xmm0 # sched: [11:2.00]
-; HASWELL-NEXT: vpclmulqdq $0, (%rdi), %xmm0, %xmm0 # sched: [17:2.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pclmulqdq:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pclmulqdq $0, %xmm1, %xmm0 # sched: [5:1.00]
-; BROADWELL-SSE-NEXT: pclmulqdq $0, (%rdi), %xmm0 # sched: [10:1.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pclmulqdq:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpclmulqdq $0, %xmm1, %xmm0, %xmm0 # sched: [5:1.00]
-; BROADWELL-NEXT: vpclmulqdq $0, (%rdi), %xmm0, %xmm0 # sched: [10:1.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pclmulqdq:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pclmulqdq $0, %xmm1, %xmm0 # sched: [6:1.00]
-; SKYLAKE-SSE-NEXT: pclmulqdq $0, (%rdi), %xmm0 # sched: [12:1.00]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pclmulqdq:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpclmulqdq $0, %xmm1, %xmm0, %xmm0 # sched: [6:1.00]
-; SKYLAKE-NEXT: vpclmulqdq $0, (%rdi), %xmm0, %xmm0 # sched: [12:1.00]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pclmulqdq:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pclmulqdq $0, %xmm1, %xmm0 # sched: [6:1.00]
-; SKX-SSE-NEXT: pclmulqdq $0, (%rdi), %xmm0 # sched: [12:1.00]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pclmulqdq:
-; SKX: # %bb.0:
-; SKX-NEXT: vpclmulqdq $0, %xmm1, %xmm0, %xmm0 # sched: [6:1.00]
-; SKX-NEXT: vpclmulqdq $0, (%rdi), %xmm0, %xmm0 # sched: [12:1.00]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pclmulqdq:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pclmulqdq $0, %xmm1, %xmm0 # sched: [12:1.00]
-; BDVER2-SSE-NEXT: pclmulqdq $0, (%rdi), %xmm0 # sched: [17:1.00]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pclmulqdq:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpclmulqdq $0, %xmm1, %xmm0, %xmm0 # sched: [13:1.00]
-; BDVER2-NEXT: vpclmulqdq $0, (%rdi), %xmm0, %xmm0 # sched: [17:1.00]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pclmulqdq:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pclmulqdq $0, %xmm1, %xmm0 # sched: [2:1.00]
-; BTVER2-SSE-NEXT: pclmulqdq $0, (%rdi), %xmm0 # sched: [7:1.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pclmulqdq:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpclmulqdq $0, %xmm1, %xmm0, %xmm0 # sched: [2:1.00]
-; BTVER2-NEXT: vpclmulqdq $0, (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pclmulqdq:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pclmulqdq $0, %xmm1, %xmm0 # sched: [100:0.25]
-; ZNVER1-SSE-NEXT: pclmulqdq $0, (%rdi), %xmm0 # sched: [100:0.25]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pclmulqdq:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpclmulqdq $0, %xmm1, %xmm0, %xmm0 # sched: [100:0.25]
-; ZNVER1-NEXT: vpclmulqdq $0, (%rdi), %xmm0, %xmm0 # sched: [100:0.25]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = load <2 x i64>, <2 x i64> *%a2, align 16
- %2 = call <2 x i64> @llvm.x86.pclmulqdq(<2 x i64> %a0, <2 x i64> %a1, i8 0)
- %3 = call <2 x i64> @llvm.x86.pclmulqdq(<2 x i64> %1, <2 x i64> %2, i8 0)
- ret <2 x i64> %3
-}
-declare <2 x i64> @llvm.x86.pclmulqdq(<2 x i64>, <2 x i64>, i8)
Removed: llvm/trunk/test/CodeGen/X86/sse4a-schedule.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse4a-schedule.ll?rev=353042&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse4a-schedule.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse4a-schedule.ll (removed)
@@ -1,156 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+sse4a | FileCheck %s --check-prefix=GENERIC
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 | FileCheck %s --check-prefix=BDVER2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 | FileCheck %s --check-prefix=BTVER2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=znver1 | FileCheck %s --check-prefix=ZNVER1
-
-define <2 x i64> @test_extrq(<2 x i64> %a0, <16 x i8> %a1) {
-; GENERIC-LABEL: test_extrq:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: extrq %xmm1, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER2-LABEL: test_extrq:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: extrq %xmm1, %xmm0 # sched: [3:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_extrq:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: extrq %xmm1, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_extrq:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: extrq %xmm1, %xmm0 # sched: [2:1.00]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %a0, <16 x i8> %a1)
- ret <2 x i64> %1
-}
-declare <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64>, <16 x i8>)
-
-define <2 x i64> @test_extrqi(<2 x i64> %a0) {
-; GENERIC-LABEL: test_extrqi:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: extrq $2, $3, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER2-LABEL: test_extrqi:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: extrq $2, $3, %xmm0 # sched: [3:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_extrqi:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: extrq $2, $3, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_extrqi:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: extrq $2, $3, %xmm0 # sched: [2:1.00]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = tail call <2 x i64> @llvm.x86.sse4a.extrqi(<2 x i64> %a0, i8 3, i8 2)
- ret <2 x i64> %1
-}
-declare <2 x i64> @llvm.x86.sse4a.extrqi(<2 x i64>, i8, i8)
-
-define <2 x i64> @test_insertq(<2 x i64> %a0, <2 x i64> %a1) {
-; GENERIC-LABEL: test_insertq:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: insertq %xmm1, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER2-LABEL: test_insertq:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: insertq %xmm1, %xmm0 # sched: [3:2.00]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_insertq:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: insertq %xmm1, %xmm0 # sched: [2:2.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_insertq:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: insertq %xmm1, %xmm0 # sched: [4:1.00]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> %a0, <2 x i64> %a1)
- ret <2 x i64> %1
-}
-declare <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64>, <2 x i64>)
-
-define <2 x i64> @test_insertqi(<2 x i64> %a0, <2 x i64> %a1) {
-; GENERIC-LABEL: test_insertqi:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: insertq $6, $5, %xmm1, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER2-LABEL: test_insertqi:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: insertq $6, $5, %xmm1, %xmm0 # sched: [3:2.00]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_insertqi:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: insertq $6, $5, %xmm1, %xmm0 # sched: [2:2.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_insertqi:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: insertq $6, $5, %xmm1, %xmm0 # sched: [4:1.00]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = tail call <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64> %a0, <2 x i64> %a1, i8 5, i8 6)
- ret <2 x i64> %1
-}
-declare <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64>, <2 x i64>, i8, i8)
-
-define void @test_movntsd(i8* %p, <2 x double> %a) {
-; GENERIC-LABEL: test_movntsd:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movntsd %xmm0, (%rdi) # sched: [1:1.00]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER2-LABEL: test_movntsd:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: movntsd %xmm0, (%rdi) # sched: [3:1.00]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_movntsd:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: movntsd %xmm0, (%rdi) # sched: [3:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_movntsd:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: movntsd %xmm0, (%rdi) # sched: [8:1.00]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- tail call void @llvm.x86.sse4a.movnt.sd(i8* %p, <2 x double> %a)
- ret void
-}
-declare void @llvm.x86.sse4a.movnt.sd(i8*, <2 x double>)
-
-define void @test_movntss(i8* %p, <4 x float> %a) {
-; GENERIC-LABEL: test_movntss:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movntss %xmm0, (%rdi) # sched: [1:1.00]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER2-LABEL: test_movntss:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: movntss %xmm0, (%rdi) # sched: [3:1.00]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_movntss:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: movntss %xmm0, (%rdi) # sched: [3:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_movntss:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: movntss %xmm0, (%rdi) # sched: [8:1.00]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- tail call void @llvm.x86.sse4a.movnt.ss(i8* %p, <4 x float> %a)
- ret void
-}
-declare void @llvm.x86.sse4a.movnt.ss(i8*, <4 x float>)
-
Removed: llvm/trunk/test/CodeGen/X86/ssse3-schedule.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/ssse3-schedule.ll?rev=353042&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/ssse3-schedule.ll (original)
+++ llvm/trunk/test/CodeGen/X86/ssse3-schedule.ll (removed)
@@ -1,2049 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+ssse3 | FileCheck %s --check-prefixes=CHECK,GENERIC
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=atom | FileCheck %s --check-prefixes=CHECK,ATOM
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=slm -mattr=-sse4.1 | FileCheck %s --check-prefixes=CHECK,SLM
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=sandybridge -mattr=-sse4.1 | FileCheck %s --check-prefixes=CHECK,SANDY-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=sandybridge -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,SANDY
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=ivybridge -mattr=-sse4.1 | FileCheck %s --check-prefixes=CHECK,SANDY-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=ivybridge -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,SANDY
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=haswell -mattr=-sse4.1 | FileCheck %s --check-prefixes=CHECK,HASWELL-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=haswell -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,HASWELL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=broadwell -mattr=-sse4.1 | FileCheck %s --check-prefixes=CHECK,BROADWELL-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=broadwell -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,BROADWELL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skylake -mattr=-sse4.1 | FileCheck %s --check-prefixes=CHECK,SKYLAKE-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skylake -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,SKYLAKE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skx -mattr=-sse4.1 | FileCheck %s --check-prefixes=CHECK,SKX-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skx -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,SKX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 -mattr=-sse4.1 | FileCheck %s --check-prefixes=CHECK,BDVER2-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,BDVER2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 -mattr=-sse4.1 | FileCheck %s --check-prefixes=CHECK,BTVER2-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,BTVER2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=znver1 -mattr=-sse4.1 | FileCheck %s --check-prefixes=CHECK,ZNVER1-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=znver1 -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,ZNVER1
-
-define <16 x i8> @test_pabsb(<16 x i8> %a0, <16 x i8> *%a1) {
-; GENERIC-LABEL: test_pabsb:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pabsb %xmm0, %xmm1 # sched: [1:0.50]
-; GENERIC-NEXT: pabsb (%rdi), %xmm0 # sched: [7:0.50]
-; GENERIC-NEXT: por %xmm1, %xmm0 # sched: [1:0.33]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; ATOM-LABEL: test_pabsb:
-; ATOM: # %bb.0:
-; ATOM-NEXT: pabsb %xmm0, %xmm1 # sched: [1:0.50]
-; ATOM-NEXT: pabsb (%rdi), %xmm0 # sched: [1:1.00]
-; ATOM-NEXT: por %xmm1, %xmm0 # sched: [1:0.50]
-; ATOM-NEXT: nop # sched: [1:0.50]
-; ATOM-NEXT: nop # sched: [1:0.50]
-; ATOM-NEXT: retq # sched: [79:39.50]
-;
-; SLM-LABEL: test_pabsb:
-; SLM: # %bb.0:
-; SLM-NEXT: pabsb %xmm0, %xmm1 # sched: [1:0.50]
-; SLM-NEXT: pabsb (%rdi), %xmm0 # sched: [4:1.00]
-; SLM-NEXT: por %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pabsb:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pabsb %xmm0, %xmm1 # sched: [1:0.50]
-; SANDY-SSE-NEXT: pabsb (%rdi), %xmm0 # sched: [7:0.50]
-; SANDY-SSE-NEXT: por %xmm1, %xmm0 # sched: [1:0.33]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pabsb:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpabsb %xmm0, %xmm0 # sched: [1:0.50]
-; SANDY-NEXT: vpabsb (%rdi), %xmm1 # sched: [7:0.50]
-; SANDY-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pabsb:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pabsb %xmm0, %xmm1 # sched: [1:0.50]
-; HASWELL-SSE-NEXT: pabsb (%rdi), %xmm0 # sched: [7:0.50]
-; HASWELL-SSE-NEXT: por %xmm1, %xmm0 # sched: [1:0.33]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pabsb:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpabsb %xmm0, %xmm0 # sched: [1:0.50]
-; HASWELL-NEXT: vpabsb (%rdi), %xmm1 # sched: [7:0.50]
-; HASWELL-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pabsb:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pabsb %xmm0, %xmm1 # sched: [1:0.50]
-; BROADWELL-SSE-NEXT: pabsb (%rdi), %xmm0 # sched: [6:0.50]
-; BROADWELL-SSE-NEXT: por %xmm1, %xmm0 # sched: [1:0.33]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pabsb:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpabsb %xmm0, %xmm0 # sched: [1:0.50]
-; BROADWELL-NEXT: vpabsb (%rdi), %xmm1 # sched: [6:0.50]
-; BROADWELL-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pabsb:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pabsb %xmm0, %xmm1 # sched: [1:0.50]
-; SKYLAKE-SSE-NEXT: pabsb (%rdi), %xmm0 # sched: [7:0.50]
-; SKYLAKE-SSE-NEXT: por %xmm1, %xmm0 # sched: [1:0.33]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pabsb:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpabsb %xmm0, %xmm0 # sched: [1:0.50]
-; SKYLAKE-NEXT: vpabsb (%rdi), %xmm1 # sched: [7:0.50]
-; SKYLAKE-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pabsb:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pabsb %xmm0, %xmm1 # sched: [1:0.50]
-; SKX-SSE-NEXT: pabsb (%rdi), %xmm0 # sched: [7:0.50]
-; SKX-SSE-NEXT: por %xmm1, %xmm0 # sched: [1:0.33]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pabsb:
-; SKX: # %bb.0:
-; SKX-NEXT: vpabsb %xmm0, %xmm0 # sched: [1:0.50]
-; SKX-NEXT: vpabsb (%rdi), %xmm1 # sched: [7:0.50]
-; SKX-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pabsb:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pabsb %xmm0, %xmm1 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: pabsb (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER2-SSE-NEXT: por %xmm1, %xmm0 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pabsb:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpabsb (%rdi), %xmm1 # sched: [7:0.50]
-; BDVER2-NEXT: vpabsb %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pabsb:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pabsb %xmm0, %xmm1 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: pabsb (%rdi), %xmm0 # sched: [6:1.00]
-; BTVER2-SSE-NEXT: por %xmm1, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pabsb:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpabsb (%rdi), %xmm1 # sched: [6:1.00]
-; BTVER2-NEXT: vpabsb %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pabsb:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pabsb %xmm0, %xmm1 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: pabsb (%rdi), %xmm0 # sched: [8:0.50]
-; ZNVER1-SSE-NEXT: por %xmm1, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pabsb:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpabsb (%rdi), %xmm1 # sched: [8:0.50]
-; ZNVER1-NEXT: vpabsb %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call <16 x i8> @llvm.x86.ssse3.pabs.b.128(<16 x i8> %a0)
- %2 = load <16 x i8>, <16 x i8> *%a1, align 16
- %3 = call <16 x i8> @llvm.x86.ssse3.pabs.b.128(<16 x i8> %2)
- %4 = or <16 x i8> %1, %3
- ret <16 x i8> %4
-}
-declare <16 x i8> @llvm.x86.ssse3.pabs.b.128(<16 x i8>) nounwind readnone
-
-define <4 x i32> @test_pabsd(<4 x i32> %a0, <4 x i32> *%a1) {
-; GENERIC-LABEL: test_pabsd:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pabsd %xmm0, %xmm1 # sched: [1:0.50]
-; GENERIC-NEXT: pabsd (%rdi), %xmm0 # sched: [7:0.50]
-; GENERIC-NEXT: por %xmm1, %xmm0 # sched: [1:0.33]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; ATOM-LABEL: test_pabsd:
-; ATOM: # %bb.0:
-; ATOM-NEXT: pabsd %xmm0, %xmm1 # sched: [1:0.50]
-; ATOM-NEXT: pabsd (%rdi), %xmm0 # sched: [1:1.00]
-; ATOM-NEXT: por %xmm1, %xmm0 # sched: [1:0.50]
-; ATOM-NEXT: nop # sched: [1:0.50]
-; ATOM-NEXT: nop # sched: [1:0.50]
-; ATOM-NEXT: retq # sched: [79:39.50]
-;
-; SLM-LABEL: test_pabsd:
-; SLM: # %bb.0:
-; SLM-NEXT: pabsd %xmm0, %xmm1 # sched: [1:0.50]
-; SLM-NEXT: pabsd (%rdi), %xmm0 # sched: [4:1.00]
-; SLM-NEXT: por %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pabsd:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pabsd %xmm0, %xmm1 # sched: [1:0.50]
-; SANDY-SSE-NEXT: pabsd (%rdi), %xmm0 # sched: [7:0.50]
-; SANDY-SSE-NEXT: por %xmm1, %xmm0 # sched: [1:0.33]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pabsd:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpabsd %xmm0, %xmm0 # sched: [1:0.50]
-; SANDY-NEXT: vpabsd (%rdi), %xmm1 # sched: [7:0.50]
-; SANDY-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pabsd:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pabsd %xmm0, %xmm1 # sched: [1:0.50]
-; HASWELL-SSE-NEXT: pabsd (%rdi), %xmm0 # sched: [7:0.50]
-; HASWELL-SSE-NEXT: por %xmm1, %xmm0 # sched: [1:0.33]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pabsd:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpabsd %xmm0, %xmm0 # sched: [1:0.50]
-; HASWELL-NEXT: vpabsd (%rdi), %xmm1 # sched: [7:0.50]
-; HASWELL-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pabsd:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pabsd %xmm0, %xmm1 # sched: [1:0.50]
-; BROADWELL-SSE-NEXT: pabsd (%rdi), %xmm0 # sched: [6:0.50]
-; BROADWELL-SSE-NEXT: por %xmm1, %xmm0 # sched: [1:0.33]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pabsd:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpabsd %xmm0, %xmm0 # sched: [1:0.50]
-; BROADWELL-NEXT: vpabsd (%rdi), %xmm1 # sched: [6:0.50]
-; BROADWELL-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pabsd:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pabsd %xmm0, %xmm1 # sched: [1:0.50]
-; SKYLAKE-SSE-NEXT: pabsd (%rdi), %xmm0 # sched: [7:0.50]
-; SKYLAKE-SSE-NEXT: por %xmm1, %xmm0 # sched: [1:0.33]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pabsd:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpabsd %xmm0, %xmm0 # sched: [1:0.50]
-; SKYLAKE-NEXT: vpabsd (%rdi), %xmm1 # sched: [7:0.50]
-; SKYLAKE-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pabsd:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pabsd %xmm0, %xmm1 # sched: [1:0.50]
-; SKX-SSE-NEXT: pabsd (%rdi), %xmm0 # sched: [7:0.50]
-; SKX-SSE-NEXT: por %xmm1, %xmm0 # sched: [1:0.33]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pabsd:
-; SKX: # %bb.0:
-; SKX-NEXT: vpabsd %xmm0, %xmm0 # sched: [1:0.50]
-; SKX-NEXT: vpabsd (%rdi), %xmm1 # sched: [7:0.50]
-; SKX-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pabsd:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pabsd %xmm0, %xmm1 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: pabsd (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER2-SSE-NEXT: por %xmm1, %xmm0 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pabsd:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpabsd (%rdi), %xmm1 # sched: [7:0.50]
-; BDVER2-NEXT: vpabsd %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pabsd:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pabsd %xmm0, %xmm1 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: pabsd (%rdi), %xmm0 # sched: [6:1.00]
-; BTVER2-SSE-NEXT: por %xmm1, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pabsd:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpabsd (%rdi), %xmm1 # sched: [6:1.00]
-; BTVER2-NEXT: vpabsd %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pabsd:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pabsd %xmm0, %xmm1 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: pabsd (%rdi), %xmm0 # sched: [8:0.50]
-; ZNVER1-SSE-NEXT: por %xmm1, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pabsd:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpabsd (%rdi), %xmm1 # sched: [8:0.50]
-; ZNVER1-NEXT: vpabsd %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call <4 x i32> @llvm.x86.ssse3.pabs.d.128(<4 x i32> %a0)
- %2 = load <4 x i32>, <4 x i32> *%a1, align 16
- %3 = call <4 x i32> @llvm.x86.ssse3.pabs.d.128(<4 x i32> %2)
- %4 = or <4 x i32> %1, %3
- ret <4 x i32> %4
-}
-declare <4 x i32> @llvm.x86.ssse3.pabs.d.128(<4 x i32>) nounwind readnone
-
-define <8 x i16> @test_pabsw(<8 x i16> %a0, <8 x i16> *%a1) {
-; GENERIC-LABEL: test_pabsw:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pabsw %xmm0, %xmm1 # sched: [1:0.50]
-; GENERIC-NEXT: pabsw (%rdi), %xmm0 # sched: [7:0.50]
-; GENERIC-NEXT: por %xmm1, %xmm0 # sched: [1:0.33]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; ATOM-LABEL: test_pabsw:
-; ATOM: # %bb.0:
-; ATOM-NEXT: pabsw %xmm0, %xmm1 # sched: [1:0.50]
-; ATOM-NEXT: pabsw (%rdi), %xmm0 # sched: [1:1.00]
-; ATOM-NEXT: por %xmm1, %xmm0 # sched: [1:0.50]
-; ATOM-NEXT: nop # sched: [1:0.50]
-; ATOM-NEXT: nop # sched: [1:0.50]
-; ATOM-NEXT: retq # sched: [79:39.50]
-;
-; SLM-LABEL: test_pabsw:
-; SLM: # %bb.0:
-; SLM-NEXT: pabsw %xmm0, %xmm1 # sched: [1:0.50]
-; SLM-NEXT: pabsw (%rdi), %xmm0 # sched: [4:1.00]
-; SLM-NEXT: por %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pabsw:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pabsw %xmm0, %xmm1 # sched: [1:0.50]
-; SANDY-SSE-NEXT: pabsw (%rdi), %xmm0 # sched: [7:0.50]
-; SANDY-SSE-NEXT: por %xmm1, %xmm0 # sched: [1:0.33]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pabsw:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpabsw %xmm0, %xmm0 # sched: [1:0.50]
-; SANDY-NEXT: vpabsw (%rdi), %xmm1 # sched: [7:0.50]
-; SANDY-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pabsw:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pabsw %xmm0, %xmm1 # sched: [1:0.50]
-; HASWELL-SSE-NEXT: pabsw (%rdi), %xmm0 # sched: [7:0.50]
-; HASWELL-SSE-NEXT: por %xmm1, %xmm0 # sched: [1:0.33]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pabsw:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpabsw %xmm0, %xmm0 # sched: [1:0.50]
-; HASWELL-NEXT: vpabsw (%rdi), %xmm1 # sched: [7:0.50]
-; HASWELL-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pabsw:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pabsw %xmm0, %xmm1 # sched: [1:0.50]
-; BROADWELL-SSE-NEXT: pabsw (%rdi), %xmm0 # sched: [6:0.50]
-; BROADWELL-SSE-NEXT: por %xmm1, %xmm0 # sched: [1:0.33]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pabsw:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpabsw %xmm0, %xmm0 # sched: [1:0.50]
-; BROADWELL-NEXT: vpabsw (%rdi), %xmm1 # sched: [6:0.50]
-; BROADWELL-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pabsw:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pabsw %xmm0, %xmm1 # sched: [1:0.50]
-; SKYLAKE-SSE-NEXT: pabsw (%rdi), %xmm0 # sched: [7:0.50]
-; SKYLAKE-SSE-NEXT: por %xmm1, %xmm0 # sched: [1:0.33]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pabsw:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpabsw %xmm0, %xmm0 # sched: [1:0.50]
-; SKYLAKE-NEXT: vpabsw (%rdi), %xmm1 # sched: [7:0.50]
-; SKYLAKE-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pabsw:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pabsw %xmm0, %xmm1 # sched: [1:0.50]
-; SKX-SSE-NEXT: pabsw (%rdi), %xmm0 # sched: [7:0.50]
-; SKX-SSE-NEXT: por %xmm1, %xmm0 # sched: [1:0.33]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pabsw:
-; SKX: # %bb.0:
-; SKX-NEXT: vpabsw %xmm0, %xmm0 # sched: [1:0.50]
-; SKX-NEXT: vpabsw (%rdi), %xmm1 # sched: [7:0.50]
-; SKX-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pabsw:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pabsw %xmm0, %xmm1 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: pabsw (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER2-SSE-NEXT: por %xmm1, %xmm0 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pabsw:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpabsw (%rdi), %xmm1 # sched: [7:0.50]
-; BDVER2-NEXT: vpabsw %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pabsw:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pabsw %xmm0, %xmm1 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: pabsw (%rdi), %xmm0 # sched: [6:1.00]
-; BTVER2-SSE-NEXT: por %xmm1, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pabsw:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpabsw (%rdi), %xmm1 # sched: [6:1.00]
-; BTVER2-NEXT: vpabsw %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pabsw:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pabsw %xmm0, %xmm1 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: pabsw (%rdi), %xmm0 # sched: [8:0.50]
-; ZNVER1-SSE-NEXT: por %xmm1, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pabsw:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpabsw (%rdi), %xmm1 # sched: [8:0.50]
-; ZNVER1-NEXT: vpabsw %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call <8 x i16> @llvm.x86.ssse3.pabs.w.128(<8 x i16> %a0)
- %2 = load <8 x i16>, <8 x i16> *%a1, align 16
- %3 = call <8 x i16> @llvm.x86.ssse3.pabs.w.128(<8 x i16> %2)
- %4 = or <8 x i16> %1, %3
- ret <8 x i16> %4
-}
-declare <8 x i16> @llvm.x86.ssse3.pabs.w.128(<8 x i16>) nounwind readnone
-
-define <8 x i16> @test_palignr(<8 x i16> %a0, <8 x i16> %a1, <8 x i16> *%a2) {
-; GENERIC-LABEL: test_palignr:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: palignr {{.*#+}} xmm1 = xmm0[6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5] sched: [1:0.50]
-; GENERIC-NEXT: palignr {{.*#+}} xmm1 = mem[14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11,12,13] sched: [7:0.50]
-; GENERIC-NEXT: movdqa %xmm1, %xmm0 # sched: [1:0.33]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; ATOM-LABEL: test_palignr:
-; ATOM: # %bb.0:
-; ATOM-NEXT: palignr {{.*#+}} xmm1 = xmm0[6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5] sched: [1:1.00]
-; ATOM-NEXT: palignr {{.*#+}} xmm1 = mem[14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11,12,13] sched: [1:1.00]
-; ATOM-NEXT: movdqa %xmm1, %xmm0 # sched: [1:0.50]
-; ATOM-NEXT: nop # sched: [1:0.50]
-; ATOM-NEXT: nop # sched: [1:0.50]
-; ATOM-NEXT: retq # sched: [79:39.50]
-;
-; SLM-LABEL: test_palignr:
-; SLM: # %bb.0:
-; SLM-NEXT: palignr {{.*#+}} xmm1 = xmm0[6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5] sched: [1:1.00]
-; SLM-NEXT: palignr {{.*#+}} xmm1 = mem[14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11,12,13] sched: [4:1.00]
-; SLM-NEXT: movdqa %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_palignr:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: palignr {{.*#+}} xmm1 = xmm0[6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5] sched: [1:0.50]
-; SANDY-SSE-NEXT: palignr {{.*#+}} xmm1 = mem[14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11,12,13] sched: [7:0.50]
-; SANDY-SSE-NEXT: movdqa %xmm1, %xmm0 # sched: [1:0.33]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_palignr:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5] sched: [1:0.50]
-; SANDY-NEXT: vpalignr {{.*#+}} xmm0 = mem[14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11,12,13] sched: [7:0.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_palignr:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: palignr {{.*#+}} xmm1 = xmm0[6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5] sched: [1:1.00]
-; HASWELL-SSE-NEXT: palignr {{.*#+}} xmm1 = mem[14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11,12,13] sched: [7:1.00]
-; HASWELL-SSE-NEXT: movdqa %xmm1, %xmm0 # sched: [1:0.33]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_palignr:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5] sched: [1:1.00]
-; HASWELL-NEXT: vpalignr {{.*#+}} xmm0 = mem[14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11,12,13] sched: [7:1.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_palignr:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: palignr {{.*#+}} xmm1 = xmm0[6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5] sched: [1:1.00]
-; BROADWELL-SSE-NEXT: palignr {{.*#+}} xmm1 = mem[14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11,12,13] sched: [6:1.00]
-; BROADWELL-SSE-NEXT: movdqa %xmm1, %xmm0 # sched: [1:0.33]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_palignr:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5] sched: [1:1.00]
-; BROADWELL-NEXT: vpalignr {{.*#+}} xmm0 = mem[14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11,12,13] sched: [6:1.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_palignr:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: palignr {{.*#+}} xmm1 = xmm0[6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5] sched: [1:1.00]
-; SKYLAKE-SSE-NEXT: palignr {{.*#+}} xmm1 = mem[14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11,12,13] sched: [7:1.00]
-; SKYLAKE-SSE-NEXT: movdqa %xmm1, %xmm0 # sched: [1:0.33]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_palignr:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5] sched: [1:1.00]
-; SKYLAKE-NEXT: vpalignr {{.*#+}} xmm0 = mem[14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11,12,13] sched: [7:1.00]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_palignr:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: palignr {{.*#+}} xmm1 = xmm0[6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5] sched: [1:1.00]
-; SKX-SSE-NEXT: palignr {{.*#+}} xmm1 = mem[14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11,12,13] sched: [7:1.00]
-; SKX-SSE-NEXT: movdqa %xmm1, %xmm0 # sched: [1:0.33]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_palignr:
-; SKX: # %bb.0:
-; SKX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5] sched: [1:1.00]
-; SKX-NEXT: vpalignr {{.*#+}} xmm0 = mem[14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11,12,13] sched: [7:1.00]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_palignr:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: palignr {{.*#+}} xmm1 = xmm0[6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5] sched: [2:0.50]
-; BDVER2-SSE-NEXT: palignr {{.*#+}} xmm1 = mem[14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11,12,13] sched: [7:0.50]
-; BDVER2-SSE-NEXT: movdqa %xmm1, %xmm0 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_palignr:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5] sched: [2:0.50]
-; BDVER2-NEXT: vpalignr {{.*#+}} xmm0 = mem[14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11,12,13] sched: [7:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_palignr:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: palignr {{.*#+}} xmm1 = xmm0[6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5] sched: [1:0.50]
-; BTVER2-SSE-NEXT: palignr {{.*#+}} xmm1 = mem[14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11,12,13] sched: [6:1.00]
-; BTVER2-SSE-NEXT: movdqa %xmm1, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_palignr:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5] sched: [1:0.50]
-; BTVER2-NEXT: vpalignr {{.*#+}} xmm0 = mem[14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11,12,13] sched: [6:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_palignr:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: palignr {{.*#+}} xmm1 = xmm0[6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5] sched: [1:0.25]
-; ZNVER1-SSE-NEXT: palignr {{.*#+}} xmm1 = mem[14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11,12,13] sched: [8:0.50]
-; ZNVER1-SSE-NEXT: movdqa %xmm1, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_palignr:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5] sched: [1:0.25]
-; ZNVER1-NEXT: vpalignr {{.*#+}} xmm0 = mem[14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11,12,13] sched: [8:0.50]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = shufflevector <8 x i16> %a0, <8 x i16> %a1, <8 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10>
- %2 = load <8 x i16>, <8 x i16> *%a2, align 16
- %3 = shufflevector <8 x i16> %2, <8 x i16> %1, <8 x i32> <i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14>
- ret <8 x i16> %3
-}
-
-define <4 x i32> @test_phaddd(<4 x i32> %a0, <4 x i32> %a1, <4 x i32> *%a2) {
-; GENERIC-LABEL: test_phaddd:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: phaddd %xmm1, %xmm0 # sched: [3:1.50]
-; GENERIC-NEXT: phaddd (%rdi), %xmm0 # sched: [9:1.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; ATOM-LABEL: test_phaddd:
-; ATOM: # %bb.0:
-; ATOM-NEXT: phaddd %xmm1, %xmm0 # sched: [3:1.50]
-; ATOM-NEXT: phaddd (%rdi), %xmm0 # sched: [4:2.00]
-; ATOM-NEXT: retq # sched: [79:39.50]
-;
-; SLM-LABEL: test_phaddd:
-; SLM: # %bb.0:
-; SLM-NEXT: phaddd %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: phaddd (%rdi), %xmm0 # sched: [4:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_phaddd:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: phaddd %xmm1, %xmm0 # sched: [3:1.50]
-; SANDY-SSE-NEXT: phaddd (%rdi), %xmm0 # sched: [9:1.50]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_phaddd:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vphaddd %xmm1, %xmm0, %xmm0 # sched: [3:1.50]
-; SANDY-NEXT: vphaddd (%rdi), %xmm0, %xmm0 # sched: [9:1.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_phaddd:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: phaddd %xmm1, %xmm0 # sched: [3:2.00]
-; HASWELL-SSE-NEXT: phaddd (%rdi), %xmm0 # sched: [9:2.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_phaddd:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vphaddd %xmm1, %xmm0, %xmm0 # sched: [3:2.00]
-; HASWELL-NEXT: vphaddd (%rdi), %xmm0, %xmm0 # sched: [9:2.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_phaddd:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: phaddd %xmm1, %xmm0 # sched: [3:2.00]
-; BROADWELL-SSE-NEXT: phaddd (%rdi), %xmm0 # sched: [8:2.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_phaddd:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vphaddd %xmm1, %xmm0, %xmm0 # sched: [3:2.00]
-; BROADWELL-NEXT: vphaddd (%rdi), %xmm0, %xmm0 # sched: [8:2.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_phaddd:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: phaddd %xmm1, %xmm0 # sched: [3:2.00]
-; SKYLAKE-SSE-NEXT: phaddd (%rdi), %xmm0 # sched: [9:2.00]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_phaddd:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vphaddd %xmm1, %xmm0, %xmm0 # sched: [3:2.00]
-; SKYLAKE-NEXT: vphaddd (%rdi), %xmm0, %xmm0 # sched: [9:2.00]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_phaddd:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: phaddd %xmm1, %xmm0 # sched: [3:2.00]
-; SKX-SSE-NEXT: phaddd (%rdi), %xmm0 # sched: [9:2.00]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_phaddd:
-; SKX: # %bb.0:
-; SKX-NEXT: vphaddd %xmm1, %xmm0, %xmm0 # sched: [3:2.00]
-; SKX-NEXT: vphaddd (%rdi), %xmm0, %xmm0 # sched: [9:2.00]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_phaddd:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: phaddd %xmm1, %xmm0 # sched: [5:0.50]
-; BDVER2-SSE-NEXT: phaddd (%rdi), %xmm0 # sched: [10:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_phaddd:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vphaddd %xmm1, %xmm0, %xmm0 # sched: [5:0.50]
-; BDVER2-NEXT: vphaddd (%rdi), %xmm0, %xmm0 # sched: [10:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_phaddd:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: phaddd %xmm1, %xmm0 # sched: [2:0.50]
-; BTVER2-SSE-NEXT: phaddd (%rdi), %xmm0 # sched: [7:1.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_phaddd:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vphaddd %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BTVER2-NEXT: vphaddd (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_phaddd:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: phaddd %xmm1, %xmm0 # sched: [100:0.25]
-; ZNVER1-SSE-NEXT: phaddd (%rdi), %xmm0 # sched: [100:0.25]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_phaddd:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vphaddd %xmm1, %xmm0, %xmm0 # sched: [100:0.25]
-; ZNVER1-NEXT: vphaddd (%rdi), %xmm0, %xmm0 # sched: [100:0.25]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call <4 x i32> @llvm.x86.ssse3.phadd.d.128(<4 x i32> %a0, <4 x i32> %a1)
- %2 = load <4 x i32>, <4 x i32> *%a2, align 16
- %3 = call <4 x i32> @llvm.x86.ssse3.phadd.d.128(<4 x i32> %1, <4 x i32> %2)
- ret <4 x i32> %3
-}
-declare <4 x i32> @llvm.x86.ssse3.phadd.d.128(<4 x i32>, <4 x i32>) nounwind readnone
-
-define <8 x i16> @test_phaddsw(<8 x i16> %a0, <8 x i16> %a1, <8 x i16> *%a2) {
-; GENERIC-LABEL: test_phaddsw:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: phaddsw %xmm1, %xmm0 # sched: [3:1.50]
-; GENERIC-NEXT: phaddsw (%rdi), %xmm0 # sched: [9:1.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; ATOM-LABEL: test_phaddsw:
-; ATOM: # %bb.0:
-; ATOM-NEXT: phaddsw %xmm1, %xmm0 # sched: [7:3.50]
-; ATOM-NEXT: phaddsw (%rdi), %xmm0 # sched: [8:4.00]
-; ATOM-NEXT: retq # sched: [79:39.50]
-;
-; SLM-LABEL: test_phaddsw:
-; SLM: # %bb.0:
-; SLM-NEXT: phaddsw %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: phaddsw (%rdi), %xmm0 # sched: [4:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_phaddsw:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: phaddsw %xmm1, %xmm0 # sched: [3:1.50]
-; SANDY-SSE-NEXT: phaddsw (%rdi), %xmm0 # sched: [9:1.50]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_phaddsw:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vphaddsw %xmm1, %xmm0, %xmm0 # sched: [3:1.50]
-; SANDY-NEXT: vphaddsw (%rdi), %xmm0, %xmm0 # sched: [9:1.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_phaddsw:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: phaddsw %xmm1, %xmm0 # sched: [3:2.00]
-; HASWELL-SSE-NEXT: phaddsw (%rdi), %xmm0 # sched: [9:2.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_phaddsw:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vphaddsw %xmm1, %xmm0, %xmm0 # sched: [3:2.00]
-; HASWELL-NEXT: vphaddsw (%rdi), %xmm0, %xmm0 # sched: [9:2.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_phaddsw:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: phaddsw %xmm1, %xmm0 # sched: [3:2.00]
-; BROADWELL-SSE-NEXT: phaddsw (%rdi), %xmm0 # sched: [8:2.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_phaddsw:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vphaddsw %xmm1, %xmm0, %xmm0 # sched: [3:2.00]
-; BROADWELL-NEXT: vphaddsw (%rdi), %xmm0, %xmm0 # sched: [8:2.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_phaddsw:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: phaddsw %xmm1, %xmm0 # sched: [3:2.00]
-; SKYLAKE-SSE-NEXT: phaddsw (%rdi), %xmm0 # sched: [9:2.00]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_phaddsw:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vphaddsw %xmm1, %xmm0, %xmm0 # sched: [3:2.00]
-; SKYLAKE-NEXT: vphaddsw (%rdi), %xmm0, %xmm0 # sched: [9:2.00]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_phaddsw:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: phaddsw %xmm1, %xmm0 # sched: [3:2.00]
-; SKX-SSE-NEXT: phaddsw (%rdi), %xmm0 # sched: [9:2.00]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_phaddsw:
-; SKX: # %bb.0:
-; SKX-NEXT: vphaddsw %xmm1, %xmm0, %xmm0 # sched: [3:2.00]
-; SKX-NEXT: vphaddsw (%rdi), %xmm0, %xmm0 # sched: [9:2.00]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_phaddsw:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: phaddsw %xmm1, %xmm0 # sched: [5:0.50]
-; BDVER2-SSE-NEXT: phaddsw (%rdi), %xmm0 # sched: [10:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_phaddsw:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vphaddsw %xmm1, %xmm0, %xmm0 # sched: [5:0.50]
-; BDVER2-NEXT: vphaddsw (%rdi), %xmm0, %xmm0 # sched: [10:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_phaddsw:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: phaddsw %xmm1, %xmm0 # sched: [2:0.50]
-; BTVER2-SSE-NEXT: phaddsw (%rdi), %xmm0 # sched: [7:1.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_phaddsw:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vphaddsw %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BTVER2-NEXT: vphaddsw (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_phaddsw:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: phaddsw %xmm1, %xmm0 # sched: [100:0.25]
-; ZNVER1-SSE-NEXT: phaddsw (%rdi), %xmm0 # sched: [100:0.25]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_phaddsw:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vphaddsw %xmm1, %xmm0, %xmm0 # sched: [100:0.25]
-; ZNVER1-NEXT: vphaddsw (%rdi), %xmm0, %xmm0 # sched: [100:0.25]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call <8 x i16> @llvm.x86.ssse3.phadd.sw.128(<8 x i16> %a0, <8 x i16> %a1)
- %2 = load <8 x i16>, <8 x i16> *%a2, align 16
- %3 = call <8 x i16> @llvm.x86.ssse3.phadd.sw.128(<8 x i16> %1, <8 x i16> %2)
- ret <8 x i16> %3
-}
-declare <8 x i16> @llvm.x86.ssse3.phadd.sw.128(<8 x i16>, <8 x i16>) nounwind readnone
-
-define <8 x i16> @test_phaddw(<8 x i16> %a0, <8 x i16> %a1, <8 x i16> *%a2) {
-; GENERIC-LABEL: test_phaddw:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: phaddw %xmm1, %xmm0 # sched: [3:1.50]
-; GENERIC-NEXT: phaddw (%rdi), %xmm0 # sched: [9:1.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; ATOM-LABEL: test_phaddw:
-; ATOM: # %bb.0:
-; ATOM-NEXT: phaddw %xmm1, %xmm0 # sched: [7:3.50]
-; ATOM-NEXT: phaddw (%rdi), %xmm0 # sched: [8:4.00]
-; ATOM-NEXT: retq # sched: [79:39.50]
-;
-; SLM-LABEL: test_phaddw:
-; SLM: # %bb.0:
-; SLM-NEXT: phaddw %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: phaddw (%rdi), %xmm0 # sched: [4:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_phaddw:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: phaddw %xmm1, %xmm0 # sched: [3:1.50]
-; SANDY-SSE-NEXT: phaddw (%rdi), %xmm0 # sched: [9:1.50]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_phaddw:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vphaddw %xmm1, %xmm0, %xmm0 # sched: [3:1.50]
-; SANDY-NEXT: vphaddw (%rdi), %xmm0, %xmm0 # sched: [9:1.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_phaddw:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: phaddw %xmm1, %xmm0 # sched: [3:2.00]
-; HASWELL-SSE-NEXT: phaddw (%rdi), %xmm0 # sched: [9:2.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_phaddw:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vphaddw %xmm1, %xmm0, %xmm0 # sched: [3:2.00]
-; HASWELL-NEXT: vphaddw (%rdi), %xmm0, %xmm0 # sched: [9:2.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_phaddw:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: phaddw %xmm1, %xmm0 # sched: [3:2.00]
-; BROADWELL-SSE-NEXT: phaddw (%rdi), %xmm0 # sched: [8:2.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_phaddw:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vphaddw %xmm1, %xmm0, %xmm0 # sched: [3:2.00]
-; BROADWELL-NEXT: vphaddw (%rdi), %xmm0, %xmm0 # sched: [8:2.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_phaddw:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: phaddw %xmm1, %xmm0 # sched: [3:2.00]
-; SKYLAKE-SSE-NEXT: phaddw (%rdi), %xmm0 # sched: [9:2.00]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_phaddw:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vphaddw %xmm1, %xmm0, %xmm0 # sched: [3:2.00]
-; SKYLAKE-NEXT: vphaddw (%rdi), %xmm0, %xmm0 # sched: [9:2.00]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_phaddw:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: phaddw %xmm1, %xmm0 # sched: [3:2.00]
-; SKX-SSE-NEXT: phaddw (%rdi), %xmm0 # sched: [9:2.00]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_phaddw:
-; SKX: # %bb.0:
-; SKX-NEXT: vphaddw %xmm1, %xmm0, %xmm0 # sched: [3:2.00]
-; SKX-NEXT: vphaddw (%rdi), %xmm0, %xmm0 # sched: [9:2.00]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_phaddw:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: phaddw %xmm1, %xmm0 # sched: [5:0.50]
-; BDVER2-SSE-NEXT: phaddw (%rdi), %xmm0 # sched: [10:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_phaddw:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vphaddw %xmm1, %xmm0, %xmm0 # sched: [5:0.50]
-; BDVER2-NEXT: vphaddw (%rdi), %xmm0, %xmm0 # sched: [10:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_phaddw:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: phaddw %xmm1, %xmm0 # sched: [2:0.50]
-; BTVER2-SSE-NEXT: phaddw (%rdi), %xmm0 # sched: [7:1.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_phaddw:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vphaddw %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BTVER2-NEXT: vphaddw (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_phaddw:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: phaddw %xmm1, %xmm0 # sched: [100:0.25]
-; ZNVER1-SSE-NEXT: phaddw (%rdi), %xmm0 # sched: [100:0.25]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_phaddw:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vphaddw %xmm1, %xmm0, %xmm0 # sched: [100:0.25]
-; ZNVER1-NEXT: vphaddw (%rdi), %xmm0, %xmm0 # sched: [100:0.25]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call <8 x i16> @llvm.x86.ssse3.phadd.w.128(<8 x i16> %a0, <8 x i16> %a1)
- %2 = load <8 x i16>, <8 x i16> *%a2, align 16
- %3 = call <8 x i16> @llvm.x86.ssse3.phadd.w.128(<8 x i16> %1, <8 x i16> %2)
- ret <8 x i16> %3
-}
-declare <8 x i16> @llvm.x86.ssse3.phadd.w.128(<8 x i16>, <8 x i16>) nounwind readnone
-
-define <4 x i32> @test_phsubd(<4 x i32> %a0, <4 x i32> %a1, <4 x i32> *%a2) {
-; GENERIC-LABEL: test_phsubd:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: phsubd %xmm1, %xmm0 # sched: [3:1.50]
-; GENERIC-NEXT: phsubd (%rdi), %xmm0 # sched: [9:1.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; ATOM-LABEL: test_phsubd:
-; ATOM: # %bb.0:
-; ATOM-NEXT: phsubd %xmm1, %xmm0 # sched: [3:1.50]
-; ATOM-NEXT: phsubd (%rdi), %xmm0 # sched: [4:2.00]
-; ATOM-NEXT: retq # sched: [79:39.50]
-;
-; SLM-LABEL: test_phsubd:
-; SLM: # %bb.0:
-; SLM-NEXT: phsubd %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: phsubd (%rdi), %xmm0 # sched: [4:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_phsubd:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: phsubd %xmm1, %xmm0 # sched: [3:1.50]
-; SANDY-SSE-NEXT: phsubd (%rdi), %xmm0 # sched: [9:1.50]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_phsubd:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vphsubd %xmm1, %xmm0, %xmm0 # sched: [3:1.50]
-; SANDY-NEXT: vphsubd (%rdi), %xmm0, %xmm0 # sched: [9:1.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_phsubd:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: phsubd %xmm1, %xmm0 # sched: [3:2.00]
-; HASWELL-SSE-NEXT: phsubd (%rdi), %xmm0 # sched: [9:2.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_phsubd:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vphsubd %xmm1, %xmm0, %xmm0 # sched: [3:2.00]
-; HASWELL-NEXT: vphsubd (%rdi), %xmm0, %xmm0 # sched: [9:2.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_phsubd:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: phsubd %xmm1, %xmm0 # sched: [3:2.00]
-; BROADWELL-SSE-NEXT: phsubd (%rdi), %xmm0 # sched: [8:2.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_phsubd:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vphsubd %xmm1, %xmm0, %xmm0 # sched: [3:2.00]
-; BROADWELL-NEXT: vphsubd (%rdi), %xmm0, %xmm0 # sched: [8:2.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_phsubd:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: phsubd %xmm1, %xmm0 # sched: [3:2.00]
-; SKYLAKE-SSE-NEXT: phsubd (%rdi), %xmm0 # sched: [9:2.00]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_phsubd:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vphsubd %xmm1, %xmm0, %xmm0 # sched: [3:2.00]
-; SKYLAKE-NEXT: vphsubd (%rdi), %xmm0, %xmm0 # sched: [9:2.00]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_phsubd:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: phsubd %xmm1, %xmm0 # sched: [3:2.00]
-; SKX-SSE-NEXT: phsubd (%rdi), %xmm0 # sched: [9:2.00]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_phsubd:
-; SKX: # %bb.0:
-; SKX-NEXT: vphsubd %xmm1, %xmm0, %xmm0 # sched: [3:2.00]
-; SKX-NEXT: vphsubd (%rdi), %xmm0, %xmm0 # sched: [9:2.00]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_phsubd:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: phsubd %xmm1, %xmm0 # sched: [5:0.50]
-; BDVER2-SSE-NEXT: phsubd (%rdi), %xmm0 # sched: [10:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_phsubd:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vphsubd %xmm1, %xmm0, %xmm0 # sched: [5:0.50]
-; BDVER2-NEXT: vphsubd (%rdi), %xmm0, %xmm0 # sched: [10:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_phsubd:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: phsubd %xmm1, %xmm0 # sched: [2:0.50]
-; BTVER2-SSE-NEXT: phsubd (%rdi), %xmm0 # sched: [7:1.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_phsubd:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vphsubd %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BTVER2-NEXT: vphsubd (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_phsubd:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: phsubd %xmm1, %xmm0 # sched: [100:0.25]
-; ZNVER1-SSE-NEXT: phsubd (%rdi), %xmm0 # sched: [100:0.25]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_phsubd:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vphsubd %xmm1, %xmm0, %xmm0 # sched: [100:0.25]
-; ZNVER1-NEXT: vphsubd (%rdi), %xmm0, %xmm0 # sched: [100:0.25]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call <4 x i32> @llvm.x86.ssse3.phsub.d.128(<4 x i32> %a0, <4 x i32> %a1)
- %2 = load <4 x i32>, <4 x i32> *%a2, align 16
- %3 = call <4 x i32> @llvm.x86.ssse3.phsub.d.128(<4 x i32> %1, <4 x i32> %2)
- ret <4 x i32> %3
-}
-declare <4 x i32> @llvm.x86.ssse3.phsub.d.128(<4 x i32>, <4 x i32>) nounwind readnone
-
-define <8 x i16> @test_phsubsw(<8 x i16> %a0, <8 x i16> %a1, <8 x i16> *%a2) {
-; GENERIC-LABEL: test_phsubsw:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: phsubsw %xmm1, %xmm0 # sched: [3:1.50]
-; GENERIC-NEXT: phsubsw (%rdi), %xmm0 # sched: [9:1.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; ATOM-LABEL: test_phsubsw:
-; ATOM: # %bb.0:
-; ATOM-NEXT: phsubsw %xmm1, %xmm0 # sched: [7:3.50]
-; ATOM-NEXT: phsubsw (%rdi), %xmm0 # sched: [8:4.00]
-; ATOM-NEXT: retq # sched: [79:39.50]
-;
-; SLM-LABEL: test_phsubsw:
-; SLM: # %bb.0:
-; SLM-NEXT: phsubsw %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: phsubsw (%rdi), %xmm0 # sched: [4:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_phsubsw:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: phsubsw %xmm1, %xmm0 # sched: [3:1.50]
-; SANDY-SSE-NEXT: phsubsw (%rdi), %xmm0 # sched: [9:1.50]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_phsubsw:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vphsubsw %xmm1, %xmm0, %xmm0 # sched: [3:1.50]
-; SANDY-NEXT: vphsubsw (%rdi), %xmm0, %xmm0 # sched: [9:1.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_phsubsw:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: phsubsw %xmm1, %xmm0 # sched: [3:2.00]
-; HASWELL-SSE-NEXT: phsubsw (%rdi), %xmm0 # sched: [9:2.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_phsubsw:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vphsubsw %xmm1, %xmm0, %xmm0 # sched: [3:2.00]
-; HASWELL-NEXT: vphsubsw (%rdi), %xmm0, %xmm0 # sched: [9:2.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_phsubsw:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: phsubsw %xmm1, %xmm0 # sched: [3:2.00]
-; BROADWELL-SSE-NEXT: phsubsw (%rdi), %xmm0 # sched: [8:2.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_phsubsw:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vphsubsw %xmm1, %xmm0, %xmm0 # sched: [3:2.00]
-; BROADWELL-NEXT: vphsubsw (%rdi), %xmm0, %xmm0 # sched: [8:2.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_phsubsw:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: phsubsw %xmm1, %xmm0 # sched: [3:2.00]
-; SKYLAKE-SSE-NEXT: phsubsw (%rdi), %xmm0 # sched: [9:2.00]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_phsubsw:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vphsubsw %xmm1, %xmm0, %xmm0 # sched: [3:2.00]
-; SKYLAKE-NEXT: vphsubsw (%rdi), %xmm0, %xmm0 # sched: [9:2.00]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_phsubsw:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: phsubsw %xmm1, %xmm0 # sched: [3:2.00]
-; SKX-SSE-NEXT: phsubsw (%rdi), %xmm0 # sched: [9:2.00]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_phsubsw:
-; SKX: # %bb.0:
-; SKX-NEXT: vphsubsw %xmm1, %xmm0, %xmm0 # sched: [3:2.00]
-; SKX-NEXT: vphsubsw (%rdi), %xmm0, %xmm0 # sched: [9:2.00]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_phsubsw:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: phsubsw %xmm1, %xmm0 # sched: [5:0.50]
-; BDVER2-SSE-NEXT: phsubsw (%rdi), %xmm0 # sched: [10:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_phsubsw:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vphsubsw %xmm1, %xmm0, %xmm0 # sched: [5:0.50]
-; BDVER2-NEXT: vphsubsw (%rdi), %xmm0, %xmm0 # sched: [10:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_phsubsw:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: phsubsw %xmm1, %xmm0 # sched: [2:0.50]
-; BTVER2-SSE-NEXT: phsubsw (%rdi), %xmm0 # sched: [7:1.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_phsubsw:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vphsubsw %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BTVER2-NEXT: vphsubsw (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_phsubsw:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: phsubsw %xmm1, %xmm0 # sched: [100:0.25]
-; ZNVER1-SSE-NEXT: phsubsw (%rdi), %xmm0 # sched: [100:0.25]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_phsubsw:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vphsubsw %xmm1, %xmm0, %xmm0 # sched: [100:0.25]
-; ZNVER1-NEXT: vphsubsw (%rdi), %xmm0, %xmm0 # sched: [100:0.25]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call <8 x i16> @llvm.x86.ssse3.phsub.sw.128(<8 x i16> %a0, <8 x i16> %a1)
- %2 = load <8 x i16>, <8 x i16> *%a2, align 16
- %3 = call <8 x i16> @llvm.x86.ssse3.phsub.sw.128(<8 x i16> %1, <8 x i16> %2)
- ret <8 x i16> %3
-}
-declare <8 x i16> @llvm.x86.ssse3.phsub.sw.128(<8 x i16>, <8 x i16>) nounwind readnone
-
-define <8 x i16> @test_phsubw(<8 x i16> %a0, <8 x i16> %a1, <8 x i16> *%a2) {
-; GENERIC-LABEL: test_phsubw:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: phsubw %xmm1, %xmm0 # sched: [3:1.50]
-; GENERIC-NEXT: phsubw (%rdi), %xmm0 # sched: [9:1.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; ATOM-LABEL: test_phsubw:
-; ATOM: # %bb.0:
-; ATOM-NEXT: phsubw %xmm1, %xmm0 # sched: [7:3.50]
-; ATOM-NEXT: phsubw (%rdi), %xmm0 # sched: [8:4.00]
-; ATOM-NEXT: retq # sched: [79:39.50]
-;
-; SLM-LABEL: test_phsubw:
-; SLM: # %bb.0:
-; SLM-NEXT: phsubw %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: phsubw (%rdi), %xmm0 # sched: [4:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_phsubw:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: phsubw %xmm1, %xmm0 # sched: [3:1.50]
-; SANDY-SSE-NEXT: phsubw (%rdi), %xmm0 # sched: [9:1.50]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_phsubw:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vphsubw %xmm1, %xmm0, %xmm0 # sched: [3:1.50]
-; SANDY-NEXT: vphsubw (%rdi), %xmm0, %xmm0 # sched: [9:1.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_phsubw:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: phsubw %xmm1, %xmm0 # sched: [3:2.00]
-; HASWELL-SSE-NEXT: phsubw (%rdi), %xmm0 # sched: [9:2.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_phsubw:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vphsubw %xmm1, %xmm0, %xmm0 # sched: [3:2.00]
-; HASWELL-NEXT: vphsubw (%rdi), %xmm0, %xmm0 # sched: [9:2.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_phsubw:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: phsubw %xmm1, %xmm0 # sched: [3:2.00]
-; BROADWELL-SSE-NEXT: phsubw (%rdi), %xmm0 # sched: [8:2.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_phsubw:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vphsubw %xmm1, %xmm0, %xmm0 # sched: [3:2.00]
-; BROADWELL-NEXT: vphsubw (%rdi), %xmm0, %xmm0 # sched: [8:2.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_phsubw:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: phsubw %xmm1, %xmm0 # sched: [3:2.00]
-; SKYLAKE-SSE-NEXT: phsubw (%rdi), %xmm0 # sched: [9:2.00]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_phsubw:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vphsubw %xmm1, %xmm0, %xmm0 # sched: [3:2.00]
-; SKYLAKE-NEXT: vphsubw (%rdi), %xmm0, %xmm0 # sched: [9:2.00]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_phsubw:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: phsubw %xmm1, %xmm0 # sched: [3:2.00]
-; SKX-SSE-NEXT: phsubw (%rdi), %xmm0 # sched: [9:2.00]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_phsubw:
-; SKX: # %bb.0:
-; SKX-NEXT: vphsubw %xmm1, %xmm0, %xmm0 # sched: [3:2.00]
-; SKX-NEXT: vphsubw (%rdi), %xmm0, %xmm0 # sched: [9:2.00]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_phsubw:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: phsubw %xmm1, %xmm0 # sched: [5:0.50]
-; BDVER2-SSE-NEXT: phsubw (%rdi), %xmm0 # sched: [10:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_phsubw:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vphsubw %xmm1, %xmm0, %xmm0 # sched: [5:0.50]
-; BDVER2-NEXT: vphsubw (%rdi), %xmm0, %xmm0 # sched: [10:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_phsubw:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: phsubw %xmm1, %xmm0 # sched: [2:0.50]
-; BTVER2-SSE-NEXT: phsubw (%rdi), %xmm0 # sched: [7:1.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_phsubw:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vphsubw %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BTVER2-NEXT: vphsubw (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_phsubw:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: phsubw %xmm1, %xmm0 # sched: [100:0.25]
-; ZNVER1-SSE-NEXT: phsubw (%rdi), %xmm0 # sched: [100:0.25]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_phsubw:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vphsubw %xmm1, %xmm0, %xmm0 # sched: [100:0.25]
-; ZNVER1-NEXT: vphsubw (%rdi), %xmm0, %xmm0 # sched: [100:0.25]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call <8 x i16> @llvm.x86.ssse3.phsub.w.128(<8 x i16> %a0, <8 x i16> %a1)
- %2 = load <8 x i16>, <8 x i16> *%a2, align 16
- %3 = call <8 x i16> @llvm.x86.ssse3.phsub.w.128(<8 x i16> %1, <8 x i16> %2)
- ret <8 x i16> %3
-}
-declare <8 x i16> @llvm.x86.ssse3.phsub.w.128(<8 x i16>, <8 x i16>) nounwind readnone
-
-define <8 x i16> @test_pmaddubsw(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> *%a2) {
-; GENERIC-LABEL: test_pmaddubsw:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pmaddubsw %xmm1, %xmm0 # sched: [5:1.00]
-; GENERIC-NEXT: pmaddubsw (%rdi), %xmm0 # sched: [11:1.00]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; ATOM-LABEL: test_pmaddubsw:
-; ATOM: # %bb.0:
-; ATOM-NEXT: pmaddubsw %xmm1, %xmm0 # sched: [5:5.00]
-; ATOM-NEXT: pmaddubsw (%rdi), %xmm0 # sched: [5:5.00]
-; ATOM-NEXT: retq # sched: [79:39.50]
-;
-; SLM-LABEL: test_pmaddubsw:
-; SLM: # %bb.0:
-; SLM-NEXT: pmaddubsw %xmm1, %xmm0 # sched: [4:1.00]
-; SLM-NEXT: pmaddubsw (%rdi), %xmm0 # sched: [7:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pmaddubsw:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pmaddubsw %xmm1, %xmm0 # sched: [5:1.00]
-; SANDY-SSE-NEXT: pmaddubsw (%rdi), %xmm0 # sched: [11:1.00]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pmaddubsw:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpmaddubsw %xmm1, %xmm0, %xmm0 # sched: [5:1.00]
-; SANDY-NEXT: vpmaddubsw (%rdi), %xmm0, %xmm0 # sched: [11:1.00]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pmaddubsw:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pmaddubsw %xmm1, %xmm0 # sched: [5:1.00]
-; HASWELL-SSE-NEXT: pmaddubsw (%rdi), %xmm0 # sched: [11:1.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pmaddubsw:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpmaddubsw %xmm1, %xmm0, %xmm0 # sched: [5:1.00]
-; HASWELL-NEXT: vpmaddubsw (%rdi), %xmm0, %xmm0 # sched: [11:1.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pmaddubsw:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pmaddubsw %xmm1, %xmm0 # sched: [5:1.00]
-; BROADWELL-SSE-NEXT: pmaddubsw (%rdi), %xmm0 # sched: [10:1.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pmaddubsw:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpmaddubsw %xmm1, %xmm0, %xmm0 # sched: [5:1.00]
-; BROADWELL-NEXT: vpmaddubsw (%rdi), %xmm0, %xmm0 # sched: [10:1.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pmaddubsw:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pmaddubsw %xmm1, %xmm0 # sched: [4:0.50]
-; SKYLAKE-SSE-NEXT: pmaddubsw (%rdi), %xmm0 # sched: [10:0.50]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pmaddubsw:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpmaddubsw %xmm1, %xmm0, %xmm0 # sched: [4:0.50]
-; SKYLAKE-NEXT: vpmaddubsw (%rdi), %xmm0, %xmm0 # sched: [10:0.50]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pmaddubsw:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pmaddubsw %xmm1, %xmm0 # sched: [4:0.50]
-; SKX-SSE-NEXT: pmaddubsw (%rdi), %xmm0 # sched: [10:0.50]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pmaddubsw:
-; SKX: # %bb.0:
-; SKX-NEXT: vpmaddubsw %xmm1, %xmm0, %xmm0 # sched: [4:0.50]
-; SKX-NEXT: vpmaddubsw (%rdi), %xmm0, %xmm0 # sched: [10:0.50]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pmaddubsw:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pmaddubsw %xmm1, %xmm0 # sched: [4:1.00]
-; BDVER2-SSE-NEXT: pmaddubsw (%rdi), %xmm0 # sched: [9:1.00]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pmaddubsw:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpmaddubsw %xmm1, %xmm0, %xmm0 # sched: [4:1.00]
-; BDVER2-NEXT: vpmaddubsw (%rdi), %xmm0, %xmm0 # sched: [9:1.00]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pmaddubsw:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pmaddubsw %xmm1, %xmm0 # sched: [2:1.00]
-; BTVER2-SSE-NEXT: pmaddubsw (%rdi), %xmm0 # sched: [7:1.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pmaddubsw:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpmaddubsw %xmm1, %xmm0, %xmm0 # sched: [2:1.00]
-; BTVER2-NEXT: vpmaddubsw (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pmaddubsw:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pmaddubsw %xmm1, %xmm0 # sched: [4:1.00]
-; ZNVER1-SSE-NEXT: pmaddubsw (%rdi), %xmm0 # sched: [11:1.00]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pmaddubsw:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpmaddubsw %xmm1, %xmm0, %xmm0 # sched: [4:1.00]
-; ZNVER1-NEXT: vpmaddubsw (%rdi), %xmm0, %xmm0 # sched: [11:1.00]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call <8 x i16> @llvm.x86.ssse3.pmadd.ub.sw.128(<16 x i8> %a0, <16 x i8> %a1)
- %2 = load <16 x i8>, <16 x i8> *%a2, align 16
- %3 = bitcast <8 x i16> %1 to <16 x i8>
- %4 = call <8 x i16> @llvm.x86.ssse3.pmadd.ub.sw.128(<16 x i8> %3, <16 x i8> %2)
- ret <8 x i16> %4
-}
-declare <8 x i16> @llvm.x86.ssse3.pmadd.ub.sw.128(<16 x i8>, <16 x i8>) nounwind readnone
-
-define <8 x i16> @test_pmulhrsw(<8 x i16> %a0, <8 x i16> %a1, <8 x i16> *%a2) {
-; GENERIC-LABEL: test_pmulhrsw:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pmulhrsw %xmm1, %xmm0 # sched: [5:1.00]
-; GENERIC-NEXT: pmulhrsw (%rdi), %xmm0 # sched: [11:1.00]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; ATOM-LABEL: test_pmulhrsw:
-; ATOM: # %bb.0:
-; ATOM-NEXT: pmulhrsw %xmm1, %xmm0 # sched: [5:5.00]
-; ATOM-NEXT: pmulhrsw (%rdi), %xmm0 # sched: [5:5.00]
-; ATOM-NEXT: retq # sched: [79:39.50]
-;
-; SLM-LABEL: test_pmulhrsw:
-; SLM: # %bb.0:
-; SLM-NEXT: pmulhrsw %xmm1, %xmm0 # sched: [4:1.00]
-; SLM-NEXT: pmulhrsw (%rdi), %xmm0 # sched: [7:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pmulhrsw:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pmulhrsw %xmm1, %xmm0 # sched: [5:1.00]
-; SANDY-SSE-NEXT: pmulhrsw (%rdi), %xmm0 # sched: [11:1.00]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pmulhrsw:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpmulhrsw %xmm1, %xmm0, %xmm0 # sched: [5:1.00]
-; SANDY-NEXT: vpmulhrsw (%rdi), %xmm0, %xmm0 # sched: [11:1.00]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pmulhrsw:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pmulhrsw %xmm1, %xmm0 # sched: [5:1.00]
-; HASWELL-SSE-NEXT: pmulhrsw (%rdi), %xmm0 # sched: [11:1.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pmulhrsw:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpmulhrsw %xmm1, %xmm0, %xmm0 # sched: [5:1.00]
-; HASWELL-NEXT: vpmulhrsw (%rdi), %xmm0, %xmm0 # sched: [11:1.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pmulhrsw:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pmulhrsw %xmm1, %xmm0 # sched: [5:1.00]
-; BROADWELL-SSE-NEXT: pmulhrsw (%rdi), %xmm0 # sched: [10:1.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pmulhrsw:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpmulhrsw %xmm1, %xmm0, %xmm0 # sched: [5:1.00]
-; BROADWELL-NEXT: vpmulhrsw (%rdi), %xmm0, %xmm0 # sched: [10:1.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pmulhrsw:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pmulhrsw %xmm1, %xmm0 # sched: [4:0.50]
-; SKYLAKE-SSE-NEXT: pmulhrsw (%rdi), %xmm0 # sched: [10:0.50]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pmulhrsw:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpmulhrsw %xmm1, %xmm0, %xmm0 # sched: [4:0.50]
-; SKYLAKE-NEXT: vpmulhrsw (%rdi), %xmm0, %xmm0 # sched: [10:0.50]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pmulhrsw:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pmulhrsw %xmm1, %xmm0 # sched: [4:0.50]
-; SKX-SSE-NEXT: pmulhrsw (%rdi), %xmm0 # sched: [10:0.50]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pmulhrsw:
-; SKX: # %bb.0:
-; SKX-NEXT: vpmulhrsw %xmm1, %xmm0, %xmm0 # sched: [4:0.50]
-; SKX-NEXT: vpmulhrsw (%rdi), %xmm0, %xmm0 # sched: [10:0.50]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pmulhrsw:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pmulhrsw %xmm1, %xmm0 # sched: [4:1.00]
-; BDVER2-SSE-NEXT: pmulhrsw (%rdi), %xmm0 # sched: [9:1.00]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pmulhrsw:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpmulhrsw %xmm1, %xmm0, %xmm0 # sched: [4:1.00]
-; BDVER2-NEXT: vpmulhrsw (%rdi), %xmm0, %xmm0 # sched: [9:1.00]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pmulhrsw:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pmulhrsw %xmm1, %xmm0 # sched: [2:1.00]
-; BTVER2-SSE-NEXT: pmulhrsw (%rdi), %xmm0 # sched: [7:1.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pmulhrsw:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpmulhrsw %xmm1, %xmm0, %xmm0 # sched: [2:1.00]
-; BTVER2-NEXT: vpmulhrsw (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pmulhrsw:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pmulhrsw %xmm1, %xmm0 # sched: [4:1.00]
-; ZNVER1-SSE-NEXT: pmulhrsw (%rdi), %xmm0 # sched: [11:1.00]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pmulhrsw:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpmulhrsw %xmm1, %xmm0, %xmm0 # sched: [4:1.00]
-; ZNVER1-NEXT: vpmulhrsw (%rdi), %xmm0, %xmm0 # sched: [11:1.00]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call <8 x i16> @llvm.x86.ssse3.pmul.hr.sw.128(<8 x i16> %a0, <8 x i16> %a1)
- %2 = load <8 x i16>, <8 x i16> *%a2, align 16
- %3 = call <8 x i16> @llvm.x86.ssse3.pmul.hr.sw.128(<8 x i16> %1, <8 x i16> %2)
- ret <8 x i16> %3
-}
-declare <8 x i16> @llvm.x86.ssse3.pmul.hr.sw.128(<8 x i16>, <8 x i16>) nounwind readnone
-
-define <16 x i8> @test_pshufb(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> *%a2) {
-; GENERIC-LABEL: test_pshufb:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: pshufb %xmm1, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: pshufb (%rdi), %xmm0 # sched: [7:0.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; ATOM-LABEL: test_pshufb:
-; ATOM: # %bb.0:
-; ATOM-NEXT: pshufb %xmm1, %xmm0 # sched: [4:2.00]
-; ATOM-NEXT: pshufb (%rdi), %xmm0 # sched: [5:2.50]
-; ATOM-NEXT: retq # sched: [79:39.50]
-;
-; SLM-LABEL: test_pshufb:
-; SLM: # %bb.0:
-; SLM-NEXT: pshufb %xmm1, %xmm0 # sched: [1:1.00]
-; SLM-NEXT: pshufb (%rdi), %xmm0 # sched: [4:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_pshufb:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: pshufb %xmm1, %xmm0 # sched: [1:0.50]
-; SANDY-SSE-NEXT: pshufb (%rdi), %xmm0 # sched: [7:0.50]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_pshufb:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpshufb %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SANDY-NEXT: vpshufb (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_pshufb:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: pshufb %xmm1, %xmm0 # sched: [1:1.00]
-; HASWELL-SSE-NEXT: pshufb (%rdi), %xmm0 # sched: [7:1.00]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_pshufb:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpshufb %xmm1, %xmm0, %xmm0 # sched: [1:1.00]
-; HASWELL-NEXT: vpshufb (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_pshufb:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: pshufb %xmm1, %xmm0 # sched: [1:1.00]
-; BROADWELL-SSE-NEXT: pshufb (%rdi), %xmm0 # sched: [6:1.00]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_pshufb:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpshufb %xmm1, %xmm0, %xmm0 # sched: [1:1.00]
-; BROADWELL-NEXT: vpshufb (%rdi), %xmm0, %xmm0 # sched: [6:1.00]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_pshufb:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: pshufb %xmm1, %xmm0 # sched: [1:1.00]
-; SKYLAKE-SSE-NEXT: pshufb (%rdi), %xmm0 # sched: [7:1.00]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_pshufb:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpshufb %xmm1, %xmm0, %xmm0 # sched: [1:1.00]
-; SKYLAKE-NEXT: vpshufb (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_pshufb:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: pshufb %xmm1, %xmm0 # sched: [1:1.00]
-; SKX-SSE-NEXT: pshufb (%rdi), %xmm0 # sched: [7:1.00]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_pshufb:
-; SKX: # %bb.0:
-; SKX-NEXT: vpshufb %xmm1, %xmm0, %xmm0 # sched: [1:1.00]
-; SKX-NEXT: vpshufb (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_pshufb:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: pshufb %xmm1, %xmm0 # sched: [3:2.00]
-; BDVER2-SSE-NEXT: pshufb (%rdi), %xmm0 # sched: [8:2.00]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_pshufb:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpshufb %xmm1, %xmm0, %xmm0 # sched: [3:2.00]
-; BDVER2-NEXT: vpshufb (%rdi), %xmm0, %xmm0 # sched: [8:2.00]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_pshufb:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: pshufb %xmm1, %xmm0 # sched: [2:2.00]
-; BTVER2-SSE-NEXT: pshufb (%rdi), %xmm0 # sched: [7:2.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_pshufb:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpshufb %xmm1, %xmm0, %xmm0 # sched: [2:2.00]
-; BTVER2-NEXT: vpshufb (%rdi), %xmm0, %xmm0 # sched: [7:2.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_pshufb:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: pshufb %xmm1, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: pshufb (%rdi), %xmm0 # sched: [8:0.50]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_pshufb:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpshufb %xmm1, %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: vpshufb (%rdi), %xmm0, %xmm0 # sched: [8:0.50]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> %a1)
- %2 = load <16 x i8>, <16 x i8> *%a2, align 16
- %3 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %1, <16 x i8> %2)
- ret <16 x i8> %3
-}
-declare <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8>, <16 x i8>) nounwind readnone
-
-define <16 x i8> @test_psignb(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> *%a2) {
-; GENERIC-LABEL: test_psignb:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: psignb %xmm1, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: psignb (%rdi), %xmm0 # sched: [7:0.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; ATOM-LABEL: test_psignb:
-; ATOM: # %bb.0:
-; ATOM-NEXT: psignb %xmm1, %xmm0 # sched: [1:0.50]
-; ATOM-NEXT: psignb (%rdi), %xmm0 # sched: [1:1.00]
-; ATOM-NEXT: nop # sched: [1:0.50]
-; ATOM-NEXT: nop # sched: [1:0.50]
-; ATOM-NEXT: nop # sched: [1:0.50]
-; ATOM-NEXT: nop # sched: [1:0.50]
-; ATOM-NEXT: retq # sched: [79:39.50]
-;
-; SLM-LABEL: test_psignb:
-; SLM: # %bb.0:
-; SLM-NEXT: psignb %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: psignb (%rdi), %xmm0 # sched: [4:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_psignb:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: psignb %xmm1, %xmm0 # sched: [1:0.50]
-; SANDY-SSE-NEXT: psignb (%rdi), %xmm0 # sched: [7:0.50]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_psignb:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpsignb %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SANDY-NEXT: vpsignb (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_psignb:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: psignb %xmm1, %xmm0 # sched: [1:0.50]
-; HASWELL-SSE-NEXT: psignb (%rdi), %xmm0 # sched: [7:0.50]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_psignb:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpsignb %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; HASWELL-NEXT: vpsignb (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_psignb:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: psignb %xmm1, %xmm0 # sched: [1:0.50]
-; BROADWELL-SSE-NEXT: psignb (%rdi), %xmm0 # sched: [6:0.50]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_psignb:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpsignb %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BROADWELL-NEXT: vpsignb (%rdi), %xmm0, %xmm0 # sched: [6:0.50]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_psignb:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: psignb %xmm1, %xmm0 # sched: [1:0.50]
-; SKYLAKE-SSE-NEXT: psignb (%rdi), %xmm0 # sched: [7:0.50]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_psignb:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpsignb %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SKYLAKE-NEXT: vpsignb (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_psignb:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: psignb %xmm1, %xmm0 # sched: [1:0.50]
-; SKX-SSE-NEXT: psignb (%rdi), %xmm0 # sched: [7:0.50]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_psignb:
-; SKX: # %bb.0:
-; SKX-NEXT: vpsignb %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SKX-NEXT: vpsignb (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_psignb:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: psignb %xmm1, %xmm0 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: psignb (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_psignb:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpsignb %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: vpsignb (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_psignb:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: psignb %xmm1, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: psignb (%rdi), %xmm0 # sched: [6:1.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_psignb:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpsignb %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: vpsignb (%rdi), %xmm0, %xmm0 # sched: [6:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_psignb:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: psignb %xmm1, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: psignb (%rdi), %xmm0 # sched: [8:0.50]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_psignb:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpsignb %xmm1, %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: vpsignb (%rdi), %xmm0, %xmm0 # sched: [8:0.50]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call <16 x i8> @llvm.x86.ssse3.psign.b.128(<16 x i8> %a0, <16 x i8> %a1)
- %2 = load <16 x i8>, <16 x i8> *%a2, align 16
- %3 = call <16 x i8> @llvm.x86.ssse3.psign.b.128(<16 x i8> %1, <16 x i8> %2)
- ret <16 x i8> %3
-}
-declare <16 x i8> @llvm.x86.ssse3.psign.b.128(<16 x i8>, <16 x i8>) nounwind readnone
-
-define <4 x i32> @test_psignd(<4 x i32> %a0, <4 x i32> %a1, <4 x i32> *%a2) {
-; GENERIC-LABEL: test_psignd:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: psignd %xmm1, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: psignd (%rdi), %xmm0 # sched: [7:0.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; ATOM-LABEL: test_psignd:
-; ATOM: # %bb.0:
-; ATOM-NEXT: psignd %xmm1, %xmm0 # sched: [1:0.50]
-; ATOM-NEXT: psignd (%rdi), %xmm0 # sched: [1:1.00]
-; ATOM-NEXT: nop # sched: [1:0.50]
-; ATOM-NEXT: nop # sched: [1:0.50]
-; ATOM-NEXT: nop # sched: [1:0.50]
-; ATOM-NEXT: nop # sched: [1:0.50]
-; ATOM-NEXT: retq # sched: [79:39.50]
-;
-; SLM-LABEL: test_psignd:
-; SLM: # %bb.0:
-; SLM-NEXT: psignd %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: psignd (%rdi), %xmm0 # sched: [4:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_psignd:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: psignd %xmm1, %xmm0 # sched: [1:0.50]
-; SANDY-SSE-NEXT: psignd (%rdi), %xmm0 # sched: [7:0.50]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_psignd:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpsignd %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SANDY-NEXT: vpsignd (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_psignd:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: psignd %xmm1, %xmm0 # sched: [1:0.50]
-; HASWELL-SSE-NEXT: psignd (%rdi), %xmm0 # sched: [7:0.50]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_psignd:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpsignd %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; HASWELL-NEXT: vpsignd (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_psignd:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: psignd %xmm1, %xmm0 # sched: [1:0.50]
-; BROADWELL-SSE-NEXT: psignd (%rdi), %xmm0 # sched: [6:0.50]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_psignd:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpsignd %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BROADWELL-NEXT: vpsignd (%rdi), %xmm0, %xmm0 # sched: [6:0.50]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_psignd:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: psignd %xmm1, %xmm0 # sched: [1:0.50]
-; SKYLAKE-SSE-NEXT: psignd (%rdi), %xmm0 # sched: [7:0.50]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_psignd:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpsignd %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SKYLAKE-NEXT: vpsignd (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_psignd:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: psignd %xmm1, %xmm0 # sched: [1:0.50]
-; SKX-SSE-NEXT: psignd (%rdi), %xmm0 # sched: [7:0.50]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_psignd:
-; SKX: # %bb.0:
-; SKX-NEXT: vpsignd %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SKX-NEXT: vpsignd (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_psignd:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: psignd %xmm1, %xmm0 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: psignd (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_psignd:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpsignd %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: vpsignd (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_psignd:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: psignd %xmm1, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: psignd (%rdi), %xmm0 # sched: [6:1.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_psignd:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpsignd %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: vpsignd (%rdi), %xmm0, %xmm0 # sched: [6:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_psignd:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: psignd %xmm1, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: psignd (%rdi), %xmm0 # sched: [8:0.50]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_psignd:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpsignd %xmm1, %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: vpsignd (%rdi), %xmm0, %xmm0 # sched: [8:0.50]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call <4 x i32> @llvm.x86.ssse3.psign.d.128(<4 x i32> %a0, <4 x i32> %a1)
- %2 = load <4 x i32>, <4 x i32> *%a2, align 16
- %3 = call <4 x i32> @llvm.x86.ssse3.psign.d.128(<4 x i32> %1, <4 x i32> %2)
- ret <4 x i32> %3
-}
-declare <4 x i32> @llvm.x86.ssse3.psign.d.128(<4 x i32>, <4 x i32>) nounwind readnone
-
-define <8 x i16> @test_psignw(<8 x i16> %a0, <8 x i16> %a1, <8 x i16> *%a2) {
-; GENERIC-LABEL: test_psignw:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: psignw %xmm1, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: psignw (%rdi), %xmm0 # sched: [7:0.50]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; ATOM-LABEL: test_psignw:
-; ATOM: # %bb.0:
-; ATOM-NEXT: psignw %xmm1, %xmm0 # sched: [1:0.50]
-; ATOM-NEXT: psignw (%rdi), %xmm0 # sched: [1:1.00]
-; ATOM-NEXT: nop # sched: [1:0.50]
-; ATOM-NEXT: nop # sched: [1:0.50]
-; ATOM-NEXT: nop # sched: [1:0.50]
-; ATOM-NEXT: nop # sched: [1:0.50]
-; ATOM-NEXT: retq # sched: [79:39.50]
-;
-; SLM-LABEL: test_psignw:
-; SLM: # %bb.0:
-; SLM-NEXT: psignw %xmm1, %xmm0 # sched: [1:0.50]
-; SLM-NEXT: psignw (%rdi), %xmm0 # sched: [4:1.00]
-; SLM-NEXT: retq # sched: [4:1.00]
-;
-; SANDY-SSE-LABEL: test_psignw:
-; SANDY-SSE: # %bb.0:
-; SANDY-SSE-NEXT: psignw %xmm1, %xmm0 # sched: [1:0.50]
-; SANDY-SSE-NEXT: psignw (%rdi), %xmm0 # sched: [7:0.50]
-; SANDY-SSE-NEXT: retq # sched: [1:1.00]
-;
-; SANDY-LABEL: test_psignw:
-; SANDY: # %bb.0:
-; SANDY-NEXT: vpsignw %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SANDY-NEXT: vpsignw (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; SANDY-NEXT: retq # sched: [1:1.00]
-;
-; HASWELL-SSE-LABEL: test_psignw:
-; HASWELL-SSE: # %bb.0:
-; HASWELL-SSE-NEXT: psignw %xmm1, %xmm0 # sched: [1:0.50]
-; HASWELL-SSE-NEXT: psignw (%rdi), %xmm0 # sched: [7:0.50]
-; HASWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; HASWELL-LABEL: test_psignw:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: vpsignw %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; HASWELL-NEXT: vpsignw (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; HASWELL-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-SSE-LABEL: test_psignw:
-; BROADWELL-SSE: # %bb.0:
-; BROADWELL-SSE-NEXT: psignw %xmm1, %xmm0 # sched: [1:0.50]
-; BROADWELL-SSE-NEXT: psignw (%rdi), %xmm0 # sched: [6:0.50]
-; BROADWELL-SSE-NEXT: retq # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_psignw:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: vpsignw %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BROADWELL-NEXT: vpsignw (%rdi), %xmm0, %xmm0 # sched: [6:0.50]
-; BROADWELL-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-SSE-LABEL: test_psignw:
-; SKYLAKE-SSE: # %bb.0:
-; SKYLAKE-SSE-NEXT: psignw %xmm1, %xmm0 # sched: [1:0.50]
-; SKYLAKE-SSE-NEXT: psignw (%rdi), %xmm0 # sched: [7:0.50]
-; SKYLAKE-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKYLAKE-LABEL: test_psignw:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpsignw %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SKYLAKE-NEXT: vpsignw (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; SKYLAKE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-SSE-LABEL: test_psignw:
-; SKX-SSE: # %bb.0:
-; SKX-SSE-NEXT: psignw %xmm1, %xmm0 # sched: [1:0.50]
-; SKX-SSE-NEXT: psignw (%rdi), %xmm0 # sched: [7:0.50]
-; SKX-SSE-NEXT: retq # sched: [7:1.00]
-;
-; SKX-LABEL: test_psignw:
-; SKX: # %bb.0:
-; SKX-NEXT: vpsignw %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; SKX-NEXT: vpsignw (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; SKX-NEXT: retq # sched: [7:1.00]
-;
-; BDVER2-SSE-LABEL: test_psignw:
-; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: psignw %xmm1, %xmm0 # sched: [2:0.50]
-; BDVER2-SSE-NEXT: psignw (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
-;
-; BDVER2-LABEL: test_psignw:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: vpsignw %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER2-NEXT: vpsignw (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BTVER2-SSE-LABEL: test_psignw:
-; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: psignw %xmm1, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT: psignw (%rdi), %xmm0 # sched: [6:1.00]
-; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
-;
-; BTVER2-LABEL: test_psignw:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: vpsignw %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT: vpsignw (%rdi), %xmm0, %xmm0 # sched: [6:1.00]
-; BTVER2-NEXT: retq # sched: [4:1.00]
-;
-; ZNVER1-SSE-LABEL: test_psignw:
-; ZNVER1-SSE: # %bb.0:
-; ZNVER1-SSE-NEXT: psignw %xmm1, %xmm0 # sched: [1:0.25]
-; ZNVER1-SSE-NEXT: psignw (%rdi), %xmm0 # sched: [8:0.50]
-; ZNVER1-SSE-NEXT: retq # sched: [1:0.50]
-;
-; ZNVER1-LABEL: test_psignw:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: vpsignw %xmm1, %xmm0, %xmm0 # sched: [1:0.25]
-; ZNVER1-NEXT: vpsignw (%rdi), %xmm0, %xmm0 # sched: [8:0.50]
-; ZNVER1-NEXT: retq # sched: [1:0.50]
- %1 = call <8 x i16> @llvm.x86.ssse3.psign.w.128(<8 x i16> %a0, <8 x i16> %a1)
- %2 = load <8 x i16>, <8 x i16> *%a2, align 16
- %3 = call <8 x i16> @llvm.x86.ssse3.psign.w.128(<8 x i16> %1, <8 x i16> %2)
- ret <8 x i16> %3
-}
-declare <8 x i16> @llvm.x86.ssse3.psign.w.128(<8 x i16>, <8 x i16>) nounwind readnone
Removed: llvm/trunk/test/CodeGen/X86/tbm-schedule.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tbm-schedule.ll?rev=353042&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tbm-schedule.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tbm-schedule.ll (removed)
@@ -1,773 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+tbm | FileCheck %s --check-prefix=GENERIC
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 | FileCheck %s --check-prefix=BDVER --check-prefix=BDVER2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver3 | FileCheck %s --check-prefix=BDVER --check-prefix=BDVER3
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver4 | FileCheck %s --check-prefix=BDVER --check-prefix=BDVER4
-
-define i32 @test_x86_tbm_bextri_u32(i32 %a0, i32* nocapture %p1) nounwind {
-; GENERIC-LABEL: test_x86_tbm_bextri_u32:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: bextrl $3076, %edi, %ecx # imm = 0xC04
-; GENERIC-NEXT: # sched: [2:1.00]
-; GENERIC-NEXT: bextrl $3076, (%rsi), %eax # imm = 0xC04
-; GENERIC-NEXT: # sched: [7:1.00]
-; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER2-LABEL: test_x86_tbm_bextri_u32:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: bextrl $3076, (%rsi), %eax # imm = 0xC04
-; BDVER2-NEXT: # sched: [6:0.50]
-; BDVER2-NEXT: bextrl $3076, %edi, %ecx # imm = 0xC04
-; BDVER2-NEXT: # sched: [2:0.50]
-; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_x86_tbm_bextri_u32:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: bextrl $3076, %edi, %ecx # imm = 0xC04
-; BDVER3-NEXT: bextrl $3076, (%rsi), %eax # imm = 0xC04
-; BDVER3-NEXT: addl %ecx, %eax
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_x86_tbm_bextri_u32:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: bextrl $3076, %edi, %ecx # imm = 0xC04
-; BDVER4-NEXT: bextrl $3076, (%rsi), %eax # imm = 0xC04
-; BDVER4-NEXT: addl %ecx, %eax
-; BDVER4-NEXT: retq
- %a1 = load i32, i32* %p1
- %r0 = lshr i32 %a0, 4
- %m0 = lshr i32 %a1, 4
- %r1 = and i32 %r0, 4095
- %m1 = and i32 %m0, 4095
- %res = add i32 %r1, %m1
- ret i32 %res
-}
-
-define i64 @test_x86_tbm_bextri_u64(i64 %a0, i64* nocapture %p1) nounwind {
-; GENERIC-LABEL: test_x86_tbm_bextri_u64:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: bextrl $3076, %edi, %ecx # imm = 0xC04
-; GENERIC-NEXT: # sched: [2:1.00]
-; GENERIC-NEXT: bextrl $3076, (%rsi), %eax # imm = 0xC04
-; GENERIC-NEXT: # sched: [7:1.00]
-; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER2-LABEL: test_x86_tbm_bextri_u64:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: bextrl $3076, (%rsi), %eax # imm = 0xC04
-; BDVER2-NEXT: # sched: [6:0.50]
-; BDVER2-NEXT: bextrl $3076, %edi, %ecx # imm = 0xC04
-; BDVER2-NEXT: # sched: [2:0.50]
-; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_x86_tbm_bextri_u64:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: bextrl $3076, %edi, %ecx # imm = 0xC04
-; BDVER3-NEXT: bextrl $3076, (%rsi), %eax # imm = 0xC04
-; BDVER3-NEXT: addq %rcx, %rax
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_x86_tbm_bextri_u64:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: bextrl $3076, %edi, %ecx # imm = 0xC04
-; BDVER4-NEXT: bextrl $3076, (%rsi), %eax # imm = 0xC04
-; BDVER4-NEXT: addq %rcx, %rax
-; BDVER4-NEXT: retq
- %a1 = load i64, i64* %p1
- %r0 = lshr i64 %a0, 4
- %m0 = lshr i64 %a1, 4
- %r1 = and i64 %r0, 4095
- %m1 = and i64 %m0, 4095
- %res = add i64 %r1, %m1
- ret i64 %res
-}
-
-define i32 @test_x86_tbm_blcfill_u32(i32 %a0, i32* nocapture %p1) nounwind {
-; GENERIC-LABEL: test_x86_tbm_blcfill_u32:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: blcfilll %edi, %ecx # sched: [1:0.33]
-; GENERIC-NEXT: blcfilll (%rsi), %eax # sched: [6:0.50]
-; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER2-LABEL: test_x86_tbm_blcfill_u32:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: blcfilll (%rsi), %eax # sched: [6:0.50]
-; BDVER2-NEXT: blcfilll %edi, %ecx # sched: [2:0.50]
-; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_x86_tbm_blcfill_u32:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: blcfilll %edi, %ecx
-; BDVER3-NEXT: blcfilll (%rsi), %eax
-; BDVER3-NEXT: addl %ecx, %eax
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_x86_tbm_blcfill_u32:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: blcfilll %edi, %ecx
-; BDVER4-NEXT: blcfilll (%rsi), %eax
-; BDVER4-NEXT: addl %ecx, %eax
-; BDVER4-NEXT: retq
- %a1 = load i32, i32* %p1
- %r0 = add i32 %a0, 1
- %m0 = add i32 %a1, 1
- %r1 = and i32 %r0, %a0
- %m1 = and i32 %m0, %a1
- %res = add i32 %r1, %m1
- ret i32 %res
-}
-
-define i64 @test_x86_tbm_blcfill_u64(i64 %a0, i64* nocapture %p1) nounwind {
-; GENERIC-LABEL: test_x86_tbm_blcfill_u64:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: blcfillq %rdi, %rcx # sched: [1:0.33]
-; GENERIC-NEXT: blcfillq (%rsi), %rax # sched: [6:0.50]
-; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER2-LABEL: test_x86_tbm_blcfill_u64:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: blcfillq (%rsi), %rax # sched: [6:0.50]
-; BDVER2-NEXT: blcfillq %rdi, %rcx # sched: [2:0.50]
-; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_x86_tbm_blcfill_u64:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: blcfillq %rdi, %rcx
-; BDVER3-NEXT: blcfillq (%rsi), %rax
-; BDVER3-NEXT: addq %rcx, %rax
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_x86_tbm_blcfill_u64:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: blcfillq %rdi, %rcx
-; BDVER4-NEXT: blcfillq (%rsi), %rax
-; BDVER4-NEXT: addq %rcx, %rax
-; BDVER4-NEXT: retq
- %a1 = load i64, i64* %p1
- %r0 = add i64 %a0, 1
- %m0 = add i64 %a1, 1
- %r1 = and i64 %r0, %a0
- %m1 = and i64 %m0, %a1
- %res = add i64 %r1, %m1
- ret i64 %res
-}
-
-define i32 @test_x86_tbm_blci_u32(i32 %a0, i32* nocapture %p1) nounwind {
-; GENERIC-LABEL: test_x86_tbm_blci_u32:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: blcil %edi, %ecx # sched: [1:0.33]
-; GENERIC-NEXT: blcil (%rsi), %eax # sched: [6:0.50]
-; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER2-LABEL: test_x86_tbm_blci_u32:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: blcil (%rsi), %eax # sched: [6:0.50]
-; BDVER2-NEXT: blcil %edi, %ecx # sched: [2:0.50]
-; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_x86_tbm_blci_u32:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: blcil %edi, %ecx
-; BDVER3-NEXT: blcil (%rsi), %eax
-; BDVER3-NEXT: addl %ecx, %eax
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_x86_tbm_blci_u32:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: blcil %edi, %ecx
-; BDVER4-NEXT: blcil (%rsi), %eax
-; BDVER4-NEXT: addl %ecx, %eax
-; BDVER4-NEXT: retq
- %a1 = load i32, i32* %p1
- %r0 = add i32 1, %a0
- %m0 = add i32 1, %a1
- %r1 = xor i32 %r0, -1
- %m1 = xor i32 %m0, -1
- %r2 = or i32 %r1, %a0
- %m2 = or i32 %m1, %a1
- %res = add i32 %r2, %m2
- ret i32 %res
-}
-
-define i64 @test_x86_tbm_blci_u64(i64 %a0, i64* nocapture %p1) nounwind {
-; GENERIC-LABEL: test_x86_tbm_blci_u64:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: blciq %rdi, %rcx # sched: [1:0.33]
-; GENERIC-NEXT: blciq (%rsi), %rax # sched: [6:0.50]
-; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER2-LABEL: test_x86_tbm_blci_u64:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: blciq (%rsi), %rax # sched: [6:0.50]
-; BDVER2-NEXT: blciq %rdi, %rcx # sched: [2:0.50]
-; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_x86_tbm_blci_u64:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: blciq %rdi, %rcx
-; BDVER3-NEXT: blciq (%rsi), %rax
-; BDVER3-NEXT: addq %rcx, %rax
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_x86_tbm_blci_u64:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: blciq %rdi, %rcx
-; BDVER4-NEXT: blciq (%rsi), %rax
-; BDVER4-NEXT: addq %rcx, %rax
-; BDVER4-NEXT: retq
- %a1 = load i64, i64* %p1
- %r0 = add i64 1, %a0
- %m0 = add i64 1, %a1
- %r1 = xor i64 %r0, -1
- %m1 = xor i64 %m0, -1
- %r2 = or i64 %r1, %a0
- %m2 = or i64 %m1, %a1
- %res = add i64 %r2, %m2
- ret i64 %res
-}
-
-define i32 @test_x86_tbm_blcic_u32(i32 %a0, i32* nocapture %p1) nounwind {
-; GENERIC-LABEL: test_x86_tbm_blcic_u32:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: blcicl %edi, %ecx # sched: [1:0.33]
-; GENERIC-NEXT: blcicl (%rsi), %eax # sched: [6:0.50]
-; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER2-LABEL: test_x86_tbm_blcic_u32:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: blcicl (%rsi), %eax # sched: [6:0.50]
-; BDVER2-NEXT: blcicl %edi, %ecx # sched: [2:0.50]
-; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_x86_tbm_blcic_u32:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: blcicl %edi, %ecx
-; BDVER3-NEXT: blcicl (%rsi), %eax
-; BDVER3-NEXT: addl %ecx, %eax
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_x86_tbm_blcic_u32:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: blcicl %edi, %ecx
-; BDVER4-NEXT: blcicl (%rsi), %eax
-; BDVER4-NEXT: addl %ecx, %eax
-; BDVER4-NEXT: retq
- %a1 = load i32, i32* %p1
- %r0 = xor i32 %a0, -1
- %m0 = xor i32 %a1, -1
- %r1 = add i32 %a0, 1
- %m1 = add i32 %a1, 1
- %r2 = and i32 %r1, %r0
- %m2 = and i32 %m1, %m0
- %res = add i32 %r2, %m2
- ret i32 %res
-}
-
-define i64 @test_x86_tbm_blcic_u64(i64 %a0, i64* nocapture %p1) nounwind {
-; GENERIC-LABEL: test_x86_tbm_blcic_u64:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: blcicq %rdi, %rcx # sched: [1:0.33]
-; GENERIC-NEXT: blcicq (%rsi), %rax # sched: [6:0.50]
-; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER2-LABEL: test_x86_tbm_blcic_u64:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: blcicq (%rsi), %rax # sched: [6:0.50]
-; BDVER2-NEXT: blcicq %rdi, %rcx # sched: [2:0.50]
-; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_x86_tbm_blcic_u64:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: blcicq %rdi, %rcx
-; BDVER3-NEXT: blcicq (%rsi), %rax
-; BDVER3-NEXT: addq %rcx, %rax
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_x86_tbm_blcic_u64:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: blcicq %rdi, %rcx
-; BDVER4-NEXT: blcicq (%rsi), %rax
-; BDVER4-NEXT: addq %rcx, %rax
-; BDVER4-NEXT: retq
- %a1 = load i64, i64* %p1
- %r0 = xor i64 %a0, -1
- %m0 = xor i64 %a1, -1
- %r1 = add i64 %a0, 1
- %m1 = add i64 %a1, 1
- %r2 = and i64 %r1, %r0
- %m2 = and i64 %m1, %m0
- %res = add i64 %r2, %m2
- ret i64 %res
-}
-
-define i32 @test_x86_tbm_blcmsk_u32(i32 %a0, i32* nocapture %p1) nounwind {
-; GENERIC-LABEL: test_x86_tbm_blcmsk_u32:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: blcmskl %edi, %ecx # sched: [1:0.33]
-; GENERIC-NEXT: blcmskl (%rsi), %eax # sched: [6:0.50]
-; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER2-LABEL: test_x86_tbm_blcmsk_u32:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: blcmskl (%rsi), %eax # sched: [6:0.50]
-; BDVER2-NEXT: blcmskl %edi, %ecx # sched: [2:0.50]
-; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_x86_tbm_blcmsk_u32:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: blcmskl %edi, %ecx
-; BDVER3-NEXT: blcmskl (%rsi), %eax
-; BDVER3-NEXT: addl %ecx, %eax
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_x86_tbm_blcmsk_u32:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: blcmskl %edi, %ecx
-; BDVER4-NEXT: blcmskl (%rsi), %eax
-; BDVER4-NEXT: addl %ecx, %eax
-; BDVER4-NEXT: retq
- %a1 = load i32, i32* %p1
- %r0 = add i32 %a0, 1
- %m0 = add i32 %a1, 1
- %r1 = xor i32 %r0, %a0
- %m1 = xor i32 %m0, %a1
- %res = add i32 %r1, %m1
- ret i32 %res
-}
-
-define i64 @test_x86_tbm_blcmsk_u64(i64 %a0, i64* nocapture %p1) nounwind {
-; GENERIC-LABEL: test_x86_tbm_blcmsk_u64:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: blcmskq %rdi, %rcx # sched: [1:0.33]
-; GENERIC-NEXT: blcmskq (%rsi), %rax # sched: [6:0.50]
-; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER2-LABEL: test_x86_tbm_blcmsk_u64:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: blcmskq (%rsi), %rax # sched: [6:0.50]
-; BDVER2-NEXT: blcmskq %rdi, %rcx # sched: [2:0.50]
-; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_x86_tbm_blcmsk_u64:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: blcmskq %rdi, %rcx
-; BDVER3-NEXT: blcmskq (%rsi), %rax
-; BDVER3-NEXT: addq %rcx, %rax
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_x86_tbm_blcmsk_u64:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: blcmskq %rdi, %rcx
-; BDVER4-NEXT: blcmskq (%rsi), %rax
-; BDVER4-NEXT: addq %rcx, %rax
-; BDVER4-NEXT: retq
- %a1 = load i64, i64* %p1
- %r0 = add i64 %a0, 1
- %m0 = add i64 %a1, 1
- %r1 = xor i64 %r0, %a0
- %m1 = xor i64 %m0, %a1
- %res = add i64 %r1, %m1
- ret i64 %res
-}
-
-define i32 @test_x86_tbm_blcs_u32(i32 %a0, i32* nocapture %p1) nounwind {
-; GENERIC-LABEL: test_x86_tbm_blcs_u32:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: blcsl %edi, %ecx # sched: [1:0.33]
-; GENERIC-NEXT: blcsl (%rsi), %eax # sched: [6:0.50]
-; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER2-LABEL: test_x86_tbm_blcs_u32:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: blcsl (%rsi), %eax # sched: [6:0.50]
-; BDVER2-NEXT: blcsl %edi, %ecx # sched: [2:0.50]
-; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_x86_tbm_blcs_u32:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: blcsl %edi, %ecx
-; BDVER3-NEXT: blcsl (%rsi), %eax
-; BDVER3-NEXT: addl %ecx, %eax
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_x86_tbm_blcs_u32:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: blcsl %edi, %ecx
-; BDVER4-NEXT: blcsl (%rsi), %eax
-; BDVER4-NEXT: addl %ecx, %eax
-; BDVER4-NEXT: retq
- %a1 = load i32, i32* %p1
- %r0 = add i32 %a0, 1
- %m0 = add i32 %a1, 1
- %r1 = or i32 %r0, %a0
- %m1 = or i32 %m0, %a1
- %res = add i32 %r1, %m1
- ret i32 %res
-}
-
-define i64 @test_x86_tbm_blcs_u64(i64 %a0, i64* nocapture %p1) nounwind {
-; GENERIC-LABEL: test_x86_tbm_blcs_u64:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: blcsq %rdi, %rcx # sched: [1:0.33]
-; GENERIC-NEXT: blcsq (%rsi), %rax # sched: [6:0.50]
-; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER2-LABEL: test_x86_tbm_blcs_u64:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: blcsq (%rsi), %rax # sched: [6:0.50]
-; BDVER2-NEXT: blcsq %rdi, %rcx # sched: [2:0.50]
-; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_x86_tbm_blcs_u64:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: blcsq %rdi, %rcx
-; BDVER3-NEXT: blcsq (%rsi), %rax
-; BDVER3-NEXT: addq %rcx, %rax
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_x86_tbm_blcs_u64:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: blcsq %rdi, %rcx
-; BDVER4-NEXT: blcsq (%rsi), %rax
-; BDVER4-NEXT: addq %rcx, %rax
-; BDVER4-NEXT: retq
- %a1 = load i64, i64* %p1
- %r0 = add i64 %a0, 1
- %m0 = add i64 %a1, 1
- %r1 = or i64 %r0, %a0
- %m1 = or i64 %m0, %a1
- %res = add i64 %r1, %m1
- ret i64 %res
-}
-
-define i32 @test_x86_tbm_blsfill_u32(i32 %a0, i32* nocapture %p1) nounwind {
-; GENERIC-LABEL: test_x86_tbm_blsfill_u32:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: blsfilll %edi, %ecx # sched: [1:0.33]
-; GENERIC-NEXT: blsfilll (%rsi), %eax # sched: [6:0.50]
-; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER2-LABEL: test_x86_tbm_blsfill_u32:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: blsfilll (%rsi), %eax # sched: [6:0.50]
-; BDVER2-NEXT: blsfilll %edi, %ecx # sched: [2:0.50]
-; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_x86_tbm_blsfill_u32:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: blsfilll %edi, %ecx
-; BDVER3-NEXT: blsfilll (%rsi), %eax
-; BDVER3-NEXT: addl %ecx, %eax
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_x86_tbm_blsfill_u32:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: blsfilll %edi, %ecx
-; BDVER4-NEXT: blsfilll (%rsi), %eax
-; BDVER4-NEXT: addl %ecx, %eax
-; BDVER4-NEXT: retq
- %a1 = load i32, i32* %p1
- %r0 = add i32 %a0, -1
- %m0 = add i32 %a1, -1
- %r1 = or i32 %r0, %a0
- %m1 = or i32 %m0, %a1
- %res = add i32 %r1, %m1
- ret i32 %res
-}
-
-define i64 @test_x86_tbm_blsfill_u64(i64 %a0, i64* nocapture %p1) nounwind {
-; GENERIC-LABEL: test_x86_tbm_blsfill_u64:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: blsfillq %rdi, %rcx # sched: [1:0.33]
-; GENERIC-NEXT: blsfillq (%rsi), %rax # sched: [6:0.50]
-; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER2-LABEL: test_x86_tbm_blsfill_u64:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: blsfillq (%rsi), %rax # sched: [6:0.50]
-; BDVER2-NEXT: blsfillq %rdi, %rcx # sched: [2:0.50]
-; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_x86_tbm_blsfill_u64:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: blsfillq %rdi, %rcx
-; BDVER3-NEXT: blsfillq (%rsi), %rax
-; BDVER3-NEXT: addq %rcx, %rax
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_x86_tbm_blsfill_u64:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: blsfillq %rdi, %rcx
-; BDVER4-NEXT: blsfillq (%rsi), %rax
-; BDVER4-NEXT: addq %rcx, %rax
-; BDVER4-NEXT: retq
- %a1 = load i64, i64* %p1
- %r0 = add i64 %a0, -1
- %m0 = add i64 %a1, -1
- %r1 = or i64 %r0, %a0
- %m1 = or i64 %m0, %a1
- %res = add i64 %r1, %m1
- ret i64 %res
-}
-
-define i32 @test_x86_tbm_blsic_u32(i32 %a0, i32* nocapture %p1) nounwind {
-; GENERIC-LABEL: test_x86_tbm_blsic_u32:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: blsicl %edi, %ecx # sched: [1:0.33]
-; GENERIC-NEXT: blsicl (%rsi), %eax # sched: [6:0.50]
-; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER2-LABEL: test_x86_tbm_blsic_u32:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: blsicl (%rsi), %eax # sched: [6:0.50]
-; BDVER2-NEXT: blsicl %edi, %ecx # sched: [2:0.50]
-; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_x86_tbm_blsic_u32:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: blsicl %edi, %ecx
-; BDVER3-NEXT: blsicl (%rsi), %eax
-; BDVER3-NEXT: addl %ecx, %eax
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_x86_tbm_blsic_u32:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: blsicl %edi, %ecx
-; BDVER4-NEXT: blsicl (%rsi), %eax
-; BDVER4-NEXT: addl %ecx, %eax
-; BDVER4-NEXT: retq
- %a1 = load i32, i32* %p1
- %r0 = xor i32 %a0, -1
- %m0 = xor i32 %a1, -1
- %r1 = add i32 %a0, -1
- %m1 = add i32 %a1, -1
- %r2 = or i32 %r0, %r1
- %m2 = or i32 %m0, %m1
- %res = add i32 %r2, %m2
- ret i32 %res
-}
-
-define i64 @test_x86_tbm_blsic_u64(i64 %a0, i64* nocapture %p1) nounwind {
-; GENERIC-LABEL: test_x86_tbm_blsic_u64:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: blsicq %rdi, %rcx # sched: [1:0.33]
-; GENERIC-NEXT: blsicq (%rsi), %rax # sched: [6:0.50]
-; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER2-LABEL: test_x86_tbm_blsic_u64:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: blsicq (%rsi), %rax # sched: [6:0.50]
-; BDVER2-NEXT: blsicq %rdi, %rcx # sched: [2:0.50]
-; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_x86_tbm_blsic_u64:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: blsicq %rdi, %rcx
-; BDVER3-NEXT: blsicq (%rsi), %rax
-; BDVER3-NEXT: addq %rcx, %rax
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_x86_tbm_blsic_u64:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: blsicq %rdi, %rcx
-; BDVER4-NEXT: blsicq (%rsi), %rax
-; BDVER4-NEXT: addq %rcx, %rax
-; BDVER4-NEXT: retq
- %a1 = load i64, i64* %p1
- %r0 = xor i64 %a0, -1
- %m0 = xor i64 %a1, -1
- %r1 = add i64 %a0, -1
- %m1 = add i64 %a1, -1
- %r2 = or i64 %r0, %r1
- %m2 = or i64 %m0, %m1
- %res = add i64 %r2, %m2
- ret i64 %res
-}
-
-define i32 @test_x86_tbm_t1mskc_u32(i32 %a0, i32* nocapture %p1) nounwind {
-; GENERIC-LABEL: test_x86_tbm_t1mskc_u32:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: t1mskcl %edi, %ecx # sched: [1:0.33]
-; GENERIC-NEXT: t1mskcl (%rsi), %eax # sched: [6:0.50]
-; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER2-LABEL: test_x86_tbm_t1mskc_u32:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: t1mskcl (%rsi), %eax # sched: [6:0.50]
-; BDVER2-NEXT: t1mskcl %edi, %ecx # sched: [2:0.50]
-; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_x86_tbm_t1mskc_u32:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: t1mskcl %edi, %ecx
-; BDVER3-NEXT: t1mskcl (%rsi), %eax
-; BDVER3-NEXT: addl %ecx, %eax
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_x86_tbm_t1mskc_u32:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: t1mskcl %edi, %ecx
-; BDVER4-NEXT: t1mskcl (%rsi), %eax
-; BDVER4-NEXT: addl %ecx, %eax
-; BDVER4-NEXT: retq
- %a1 = load i32, i32* %p1
- %r0 = xor i32 %a0, -1
- %m0 = xor i32 %a1, -1
- %r1 = add i32 %a0, 1
- %m1 = add i32 %a1, 1
- %r2 = or i32 %r0, %r1
- %m2 = or i32 %m0, %m1
- %res = add i32 %r2, %m2
- ret i32 %res
-}
-
-define i64 @test_x86_tbm_t1mskc_u64(i64 %a0, i64* nocapture %p1) nounwind {
-; GENERIC-LABEL: test_x86_tbm_t1mskc_u64:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: t1mskcq %rdi, %rcx # sched: [1:0.33]
-; GENERIC-NEXT: t1mskcq (%rsi), %rax # sched: [6:0.50]
-; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER2-LABEL: test_x86_tbm_t1mskc_u64:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: t1mskcq (%rsi), %rax # sched: [6:0.50]
-; BDVER2-NEXT: t1mskcq %rdi, %rcx # sched: [2:0.50]
-; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_x86_tbm_t1mskc_u64:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: t1mskcq %rdi, %rcx
-; BDVER3-NEXT: t1mskcq (%rsi), %rax
-; BDVER3-NEXT: addq %rcx, %rax
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_x86_tbm_t1mskc_u64:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: t1mskcq %rdi, %rcx
-; BDVER4-NEXT: t1mskcq (%rsi), %rax
-; BDVER4-NEXT: addq %rcx, %rax
-; BDVER4-NEXT: retq
- %a1 = load i64, i64* %p1
- %r0 = xor i64 %a0, -1
- %m0 = xor i64 %a1, -1
- %r1 = add i64 %a0, 1
- %m1 = add i64 %a1, 1
- %r2 = or i64 %r0, %r1
- %m2 = or i64 %m0, %m1
- %res = add i64 %r2, %m2
- ret i64 %res
-}
-
-define i32 @test_x86_tbm_tzmsk_u32(i32 %a0, i32* nocapture %p1) nounwind {
-; GENERIC-LABEL: test_x86_tbm_tzmsk_u32:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: tzmskl %edi, %ecx # sched: [1:0.33]
-; GENERIC-NEXT: tzmskl (%rsi), %eax # sched: [6:0.50]
-; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER2-LABEL: test_x86_tbm_tzmsk_u32:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: tzmskl (%rsi), %eax # sched: [6:0.50]
-; BDVER2-NEXT: tzmskl %edi, %ecx # sched: [2:0.50]
-; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_x86_tbm_tzmsk_u32:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: tzmskl %edi, %ecx
-; BDVER3-NEXT: tzmskl (%rsi), %eax
-; BDVER3-NEXT: addl %ecx, %eax
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_x86_tbm_tzmsk_u32:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: tzmskl %edi, %ecx
-; BDVER4-NEXT: tzmskl (%rsi), %eax
-; BDVER4-NEXT: addl %ecx, %eax
-; BDVER4-NEXT: retq
- %a1 = load i32, i32* %p1
- %r0 = xor i32 %a0, -1
- %m0 = xor i32 %a1, -1
- %r1 = add i32 %a0, -1
- %m1 = add i32 %a1, -1
- %r2 = and i32 %r0, %r1
- %m2 = and i32 %m0, %m1
- %res = add i32 %r2, %m2
- ret i32 %res
-}
-
-define i64 @test_x86_tbm_tzmsk_u64(i64 %a0, i64* nocapture %p1) nounwind {
-; GENERIC-LABEL: test_x86_tbm_tzmsk_u64:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: tzmskq %rdi, %rcx # sched: [1:0.33]
-; GENERIC-NEXT: tzmskq (%rsi), %rax # sched: [6:0.50]
-; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER2-LABEL: test_x86_tbm_tzmsk_u64:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: tzmskq (%rsi), %rax # sched: [6:0.50]
-; BDVER2-NEXT: tzmskq %rdi, %rcx # sched: [2:0.50]
-; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.50]
-; BDVER2-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_x86_tbm_tzmsk_u64:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: tzmskq %rdi, %rcx
-; BDVER3-NEXT: tzmskq (%rsi), %rax
-; BDVER3-NEXT: addq %rcx, %rax
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_x86_tbm_tzmsk_u64:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: tzmskq %rdi, %rcx
-; BDVER4-NEXT: tzmskq (%rsi), %rax
-; BDVER4-NEXT: addq %rcx, %rax
-; BDVER4-NEXT: retq
- %a1 = load i64, i64* %p1
- %r0 = xor i64 %a0, -1
- %m0 = xor i64 %a1, -1
- %r1 = add i64 %a0, -1
- %m1 = add i64 %a1, -1
- %r2 = and i64 %r0, %r1
- %m2 = and i64 %m0, %m1
- %res = add i64 %r2, %m2
- ret i64 %res
-}
Removed: llvm/trunk/test/CodeGen/X86/x87-schedule.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x87-schedule.ll?rev=353042&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/x87-schedule.ll (original)
+++ llvm/trunk/test/CodeGen/X86/x87-schedule.ll (removed)
@@ -1,6420 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -print-schedule -mcpu=i686 | FileCheck %s --check-prefix=CHECK --check-prefix=GENERIC
-; RUN: llc < %s -mtriple=i686-unknown-unknown -print-schedule -mcpu=atom | FileCheck %s --check-prefix=CHECK --check-prefix=ATOM
-; RUN: llc < %s -mtriple=i686-unknown-unknown -print-schedule -mcpu=slm | FileCheck %s --check-prefix=CHECK --check-prefix=SLM
-; RUN: llc < %s -mtriple=i686-unknown-unknown -print-schedule -mcpu=sandybridge | FileCheck %s --check-prefix=CHECK --check-prefix=SANDY
-; RUN: llc < %s -mtriple=i686-unknown-unknown -print-schedule -mcpu=ivybridge | FileCheck %s --check-prefix=CHECK --check-prefix=SANDY
-; RUN: llc < %s -mtriple=i686-unknown-unknown -print-schedule -mcpu=haswell | FileCheck %s --check-prefix=CHECK --check-prefix=HASWELL
-; RUN: llc < %s -mtriple=i686-unknown-unknown -print-schedule -mcpu=broadwell | FileCheck %s --check-prefix=CHECK --check-prefix=BROADWELL
-; RUN: llc < %s -mtriple=i686-unknown-unknown -print-schedule -mcpu=skylake | FileCheck %s --check-prefix=CHECK --check-prefix=SKYLAKE
-; RUN: llc < %s -mtriple=i686-unknown-unknown -print-schedule -mcpu=skx | FileCheck %s --check-prefix=CHECK --check-prefix=SKX
-; RUN: llc < %s -mtriple=i686-unknown-unknown -print-schedule -mcpu=bdver2 | FileCheck %s --check-prefix=CHECK --check-prefix=BDVER2
-; RUN: llc < %s -mtriple=i686-unknown-unknown -print-schedule -mcpu=btver2 | FileCheck %s --check-prefix=CHECK --check-prefix=BTVER2
-; RUN: llc < %s -mtriple=i686-unknown-unknown -print-schedule -mcpu=znver1 | FileCheck %s --check-prefix=CHECK --check-prefix=ZNVER1
-
-define void @test_f2xm1() optsize {
-; GENERIC-LABEL: test_f2xm1:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: f2xm1
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_f2xm1:
-; ATOM: # %bb.0:
-; ATOM-NEXT: #APP
-; ATOM-NEXT: f2xm1 # sched: [99:49.50]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_f2xm1:
-; SLM: # %bb.0:
-; SLM-NEXT: #APP
-; SLM-NEXT: f2xm1 # sched: [100:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_f2xm1:
-; SANDY: # %bb.0:
-; SANDY-NEXT: #APP
-; SANDY-NEXT: f2xm1 # sched: [100:0.33]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_f2xm1:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: f2xm1 # sched: [100:0.25]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_f2xm1:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: f2xm1 # sched: [100:0.25]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_f2xm1:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: f2xm1 # sched: [100:0.25]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_f2xm1:
-; SKX: # %bb.0:
-; SKX-NEXT: #APP
-; SKX-NEXT: f2xm1 # sched: [100:0.25]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_f2xm1:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: f2xm1 # sched: [100:0.50]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_f2xm1:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: f2xm1 # sched: [100:0.50]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_f2xm1:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: f2xm1 # sched: [100:0.25]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "f2xm1", ""() nounwind
- ret void
-}
-
-define void @test_fabs() optsize {
-; GENERIC-LABEL: test_fabs:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fabs
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fabs:
-; ATOM: # %bb.0:
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fabs # sched: [1:1.00]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fabs:
-; SLM: # %bb.0:
-; SLM-NEXT: #APP
-; SLM-NEXT: fabs # sched: [1:0.50]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fabs:
-; SANDY: # %bb.0:
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fabs # sched: [1:1.00]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fabs:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fabs # sched: [1:1.00]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fabs:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fabs # sched: [1:1.00]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fabs:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fabs # sched: [1:1.00]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fabs:
-; SKX: # %bb.0:
-; SKX-NEXT: #APP
-; SKX-NEXT: fabs # sched: [1:1.00]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fabs:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fabs # sched: [1:1.00]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fabs:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fabs # sched: [2:1.00]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fabs:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fabs # sched: [2:1.00]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fabs", ""() nounwind
- ret void
-}
-
-define void @test_fadd(float *%a0, double *%a1) optsize {
-; GENERIC-LABEL: test_fadd:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fadd %st, %st(1)
-; GENERIC-NEXT: fadd %st(2)
-; GENERIC-NEXT: fadds (%ecx)
-; GENERIC-NEXT: faddl (%eax)
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fadd:
-; ATOM: # %bb.0:
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:1.00]
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fadd %st, %st(1) # sched: [5:5.00]
-; ATOM-NEXT: fadd %st(2) # sched: [5:5.00]
-; ATOM-NEXT: fadds (%ecx) # sched: [5:5.00]
-; ATOM-NEXT: faddl (%eax) # sched: [5:5.00]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fadd:
-; SLM: # %bb.0:
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
-; SLM-NEXT: #APP
-; SLM-NEXT: fadd %st, %st(1) # sched: [3:1.00]
-; SLM-NEXT: fadd %st(2) # sched: [3:1.00]
-; SLM-NEXT: fadds (%ecx) # sched: [6:1.00]
-; SLM-NEXT: faddl (%eax) # sched: [6:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fadd:
-; SANDY: # %bb.0:
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fadd %st, %st(1) # sched: [3:1.00]
-; SANDY-NEXT: fadd %st(2) # sched: [3:1.00]
-; SANDY-NEXT: fadds (%ecx) # sched: [10:1.00]
-; SANDY-NEXT: faddl (%eax) # sched: [10:1.00]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fadd:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fadd %st, %st(1) # sched: [3:1.00]
-; HASWELL-NEXT: fadd %st(2) # sched: [3:1.00]
-; HASWELL-NEXT: fadds (%ecx) # sched: [10:1.00]
-; HASWELL-NEXT: faddl (%eax) # sched: [10:1.00]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fadd:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fadd %st, %st(1) # sched: [3:1.00]
-; BROADWELL-NEXT: fadd %st(2) # sched: [3:1.00]
-; BROADWELL-NEXT: fadds (%ecx) # sched: [9:1.00]
-; BROADWELL-NEXT: faddl (%eax) # sched: [9:1.00]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fadd:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fadd %st, %st(1) # sched: [3:1.00]
-; SKYLAKE-NEXT: fadd %st(2) # sched: [3:1.00]
-; SKYLAKE-NEXT: fadds (%ecx) # sched: [10:1.00]
-; SKYLAKE-NEXT: faddl (%eax) # sched: [10:1.00]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fadd:
-; SKX: # %bb.0:
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SKX-NEXT: #APP
-; SKX-NEXT: fadd %st, %st(1) # sched: [3:1.00]
-; SKX-NEXT: fadd %st(2) # sched: [3:1.00]
-; SKX-NEXT: fadds (%ecx) # sched: [10:1.00]
-; SKX-NEXT: faddl (%eax) # sched: [10:1.00]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fadd:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fadd %st, %st(1) # sched: [5:1.00]
-; BDVER2-NEXT: fadd %st(2) # sched: [5:1.00]
-; BDVER2-NEXT: fadds (%ecx) # sched: [10:1.00]
-; BDVER2-NEXT: faddl (%eax) # sched: [10:1.00]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fadd:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fadd %st, %st(1) # sched: [3:1.00]
-; BTVER2-NEXT: fadd %st(2) # sched: [3:1.00]
-; BTVER2-NEXT: fadds (%ecx) # sched: [8:1.00]
-; BTVER2-NEXT: faddl (%eax) # sched: [8:1.00]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fadd:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [8:0.50]
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fadd %st, %st(1) # sched: [3:1.00]
-; ZNVER1-NEXT: fadd %st(2) # sched: [3:1.00]
-; ZNVER1-NEXT: fadds (%ecx) # sched: [10:1.00]
-; ZNVER1-NEXT: faddl (%eax) # sched: [10:1.00]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fadd %st(0), %st(1) \0A\09 fadd %st(2), %st(0) \0A\09 fadds $0 \0A\09 faddl $1", "*m,*m"(float *%a0, double *%a1) nounwind
- ret void
-}
-
-define void @test_faddp_fiadd(i16 *%a0, i32 *%a1) optsize {
-; GENERIC-LABEL: test_faddp_fiadd:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: faddp %st(1)
-; GENERIC-NEXT: faddp %st(2)
-; GENERIC-NEXT: fiadds (%ecx)
-; GENERIC-NEXT: fiaddl (%eax)
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_faddp_fiadd:
-; ATOM: # %bb.0:
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:1.00]
-; ATOM-NEXT: #APP
-; ATOM-NEXT: faddp %st(1) # sched: [5:5.00]
-; ATOM-NEXT: faddp %st(2) # sched: [5:5.00]
-; ATOM-NEXT: fiadds (%ecx) # sched: [5:5.00]
-; ATOM-NEXT: fiaddl (%eax) # sched: [5:5.00]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_faddp_fiadd:
-; SLM: # %bb.0:
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
-; SLM-NEXT: #APP
-; SLM-NEXT: faddp %st(1) # sched: [3:1.00]
-; SLM-NEXT: faddp %st(2) # sched: [3:1.00]
-; SLM-NEXT: fiadds (%ecx) # sched: [6:1.00]
-; SLM-NEXT: fiaddl (%eax) # sched: [6:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_faddp_fiadd:
-; SANDY: # %bb.0:
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SANDY-NEXT: #APP
-; SANDY-NEXT: faddp %st(1) # sched: [3:1.00]
-; SANDY-NEXT: faddp %st(2) # sched: [3:1.00]
-; SANDY-NEXT: fiadds (%ecx) # sched: [13:2.00]
-; SANDY-NEXT: fiaddl (%eax) # sched: [13:2.00]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_faddp_fiadd:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: faddp %st(1) # sched: [3:1.00]
-; HASWELL-NEXT: faddp %st(2) # sched: [3:1.00]
-; HASWELL-NEXT: fiadds (%ecx) # sched: [13:2.00]
-; HASWELL-NEXT: fiaddl (%eax) # sched: [13:2.00]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_faddp_fiadd:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: faddp %st(1) # sched: [3:1.00]
-; BROADWELL-NEXT: faddp %st(2) # sched: [3:1.00]
-; BROADWELL-NEXT: fiadds (%ecx) # sched: [12:2.00]
-; BROADWELL-NEXT: fiaddl (%eax) # sched: [12:2.00]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_faddp_fiadd:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: faddp %st(1) # sched: [3:1.00]
-; SKYLAKE-NEXT: faddp %st(2) # sched: [3:1.00]
-; SKYLAKE-NEXT: fiadds (%ecx) # sched: [13:2.00]
-; SKYLAKE-NEXT: fiaddl (%eax) # sched: [13:2.00]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_faddp_fiadd:
-; SKX: # %bb.0:
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SKX-NEXT: #APP
-; SKX-NEXT: faddp %st(1) # sched: [3:1.00]
-; SKX-NEXT: faddp %st(2) # sched: [3:1.00]
-; SKX-NEXT: fiadds (%ecx) # sched: [13:2.00]
-; SKX-NEXT: fiaddl (%eax) # sched: [13:2.00]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_faddp_fiadd:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: faddp %st(1) # sched: [5:1.00]
-; BDVER2-NEXT: faddp %st(2) # sched: [5:1.00]
-; BDVER2-NEXT: fiadds (%ecx) # sched: [10:1.00]
-; BDVER2-NEXT: fiaddl (%eax) # sched: [10:1.00]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_faddp_fiadd:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: faddp %st(1) # sched: [3:1.00]
-; BTVER2-NEXT: faddp %st(2) # sched: [3:1.00]
-; BTVER2-NEXT: fiadds (%ecx) # sched: [8:1.00]
-; BTVER2-NEXT: fiaddl (%eax) # sched: [8:1.00]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_faddp_fiadd:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [8:0.50]
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: faddp %st(1) # sched: [3:1.00]
-; ZNVER1-NEXT: faddp %st(2) # sched: [3:1.00]
-; ZNVER1-NEXT: fiadds (%ecx) # sched: [10:1.00]
-; ZNVER1-NEXT: fiaddl (%eax) # sched: [10:1.00]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "faddp \0A\09 faddp %st(2), %st(0) \0A\09 fiadds $0 \0A\09 fiaddl $1", "*m,*m"(i16 *%a0, i32 *%a1) nounwind
- ret void
-}
-
-define void @test_fbld_fbstp(i8* %a0) optsize {
-; GENERIC-LABEL: test_fbld_fbstp:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fbld (%eax)
-; GENERIC-NEXT: fbstp (%eax)
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fbld_fbstp:
-; ATOM: # %bb.0:
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fbld (%eax) # sched: [100:0.50]
-; ATOM-NEXT: fbstp (%eax) # sched: [100:0.50]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fbld_fbstp:
-; SLM: # %bb.0:
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; SLM-NEXT: #APP
-; SLM-NEXT: fbld (%eax) # sched: [100:1.00]
-; SLM-NEXT: fbstp (%eax) # sched: [100:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fbld_fbstp:
-; SANDY: # %bb.0:
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fbld (%eax) # sched: [100:0.33]
-; SANDY-NEXT: fbstp (%eax) # sched: [100:0.33]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fbld_fbstp:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fbld (%eax) # sched: [47:10.75]
-; HASWELL-NEXT: fbstp (%eax) # sched: [1:1.00]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fbld_fbstp:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fbld (%eax) # sched: [100:0.25]
-; BROADWELL-NEXT: fbstp (%eax) # sched: [1:1.00]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fbld_fbstp:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fbld (%eax) # sched: [100:0.25]
-; SKYLAKE-NEXT: fbstp (%eax) # sched: [1:1.00]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fbld_fbstp:
-; SKX: # %bb.0:
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKX-NEXT: #APP
-; SKX-NEXT: fbld (%eax) # sched: [100:0.25]
-; SKX-NEXT: fbstp (%eax) # sched: [1:1.00]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fbld_fbstp:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fbld (%eax) # sched: [100:0.50]
-; BDVER2-NEXT: fbstp (%eax) # sched: [100:0.50]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fbld_fbstp:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fbld (%eax) # sched: [100:0.50]
-; BTVER2-NEXT: fbstp (%eax) # sched: [100:0.50]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fbld_fbstp:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fbld (%eax) # sched: [100:0.25]
-; ZNVER1-NEXT: fbstp (%eax) # sched: [100:0.25]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fbld $0 \0A\09 fbstp $0", "*m"(i8 *%a0) nounwind
- ret void
-}
-
-define void @test_fchs() optsize {
-; GENERIC-LABEL: test_fchs:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fchs
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fchs:
-; ATOM: # %bb.0:
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fchs # sched: [1:1.00]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fchs:
-; SLM: # %bb.0:
-; SLM-NEXT: #APP
-; SLM-NEXT: fchs # sched: [1:0.50]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fchs:
-; SANDY: # %bb.0:
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fchs # sched: [1:1.00]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fchs:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fchs # sched: [1:1.00]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fchs:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fchs # sched: [1:1.00]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fchs:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fchs # sched: [1:1.00]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fchs:
-; SKX: # %bb.0:
-; SKX-NEXT: #APP
-; SKX-NEXT: fchs # sched: [1:1.00]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fchs:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fchs # sched: [1:1.00]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fchs:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fchs # sched: [2:1.00]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fchs:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fchs # sched: [1:1.00]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fchs", ""() nounwind
- ret void
-}
-
-define void @test_fclex() optsize {
-; GENERIC-LABEL: test_fclex:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: wait
-; GENERIC-NEXT: fnclex
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fclex:
-; ATOM: # %bb.0:
-; ATOM-NEXT: #APP
-; ATOM-NEXT: wait # sched: [1:0.50]
-; ATOM-NEXT: fnclex # sched: [25:12.50]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fclex:
-; SLM: # %bb.0:
-; SLM-NEXT: #APP
-; SLM-NEXT: wait # sched: [100:1.00]
-; SLM-NEXT: fnclex # sched: [100:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fclex:
-; SANDY: # %bb.0:
-; SANDY-NEXT: #APP
-; SANDY-NEXT: wait # sched: [100:0.33]
-; SANDY-NEXT: fnclex # sched: [100:0.33]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fclex:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: wait # sched: [2:0.50]
-; HASWELL-NEXT: fnclex # sched: [4:1.00]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fclex:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: wait # sched: [2:0.50]
-; BROADWELL-NEXT: fnclex # sched: [4:1.00]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fclex:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: wait # sched: [2:0.50]
-; SKYLAKE-NEXT: fnclex # sched: [4:1.00]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fclex:
-; SKX: # %bb.0:
-; SKX-NEXT: #APP
-; SKX-NEXT: wait # sched: [2:0.50]
-; SKX-NEXT: fnclex # sched: [4:1.00]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fclex:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: wait # sched: [100:0.50]
-; BDVER2-NEXT: fnclex # sched: [100:0.50]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fclex:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: wait # sched: [100:0.50]
-; BTVER2-NEXT: fnclex # sched: [100:0.50]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fclex:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: wait # sched: [1:1.00]
-; ZNVER1-NEXT: fnclex # sched: [100:0.25]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fclex", ""() nounwind
- ret void
-}
-
-define void @test_fnclex() optsize {
-; GENERIC-LABEL: test_fnclex:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fnclex
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fnclex:
-; ATOM: # %bb.0:
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fnclex # sched: [25:12.50]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fnclex:
-; SLM: # %bb.0:
-; SLM-NEXT: #APP
-; SLM-NEXT: fnclex # sched: [100:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fnclex:
-; SANDY: # %bb.0:
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fnclex # sched: [100:0.33]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fnclex:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fnclex # sched: [4:1.00]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fnclex:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fnclex # sched: [4:1.00]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fnclex:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fnclex # sched: [4:1.00]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fnclex:
-; SKX: # %bb.0:
-; SKX-NEXT: #APP
-; SKX-NEXT: fnclex # sched: [4:1.00]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fnclex:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fnclex # sched: [100:0.50]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fnclex:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fnclex # sched: [100:0.50]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fnclex:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fnclex # sched: [100:0.25]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fnclex", ""() nounwind
- ret void
-}
-
-define void @test_fcmov() optsize {
-; GENERIC-LABEL: test_fcmov:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fcmovb %st(1), %st
-; GENERIC-NEXT: fcmovbe %st(1), %st
-; GENERIC-NEXT: fcmove %st(1), %st
-; GENERIC-NEXT: fcmovnb %st(1), %st
-; GENERIC-NEXT: fcmovnbe %st(1), %st
-; GENERIC-NEXT: fcmovne %st(1), %st
-; GENERIC-NEXT: fcmovnu %st(1), %st
-; GENERIC-NEXT: fcmovu %st(1), %st
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fcmov:
-; ATOM: # %bb.0:
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fcmovb %st(1), %st # sched: [9:4.50]
-; ATOM-NEXT: fcmovbe %st(1), %st # sched: [9:4.50]
-; ATOM-NEXT: fcmove %st(1), %st # sched: [9:4.50]
-; ATOM-NEXT: fcmovnb %st(1), %st # sched: [9:4.50]
-; ATOM-NEXT: fcmovnbe %st(1), %st # sched: [9:4.50]
-; ATOM-NEXT: fcmovne %st(1), %st # sched: [9:4.50]
-; ATOM-NEXT: fcmovnu %st(1), %st # sched: [9:4.50]
-; ATOM-NEXT: fcmovu %st(1), %st # sched: [9:4.50]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fcmov:
-; SLM: # %bb.0:
-; SLM-NEXT: #APP
-; SLM-NEXT: fcmovb %st(1), %st # sched: [3:1.00]
-; SLM-NEXT: fcmovbe %st(1), %st # sched: [3:1.00]
-; SLM-NEXT: fcmove %st(1), %st # sched: [3:1.00]
-; SLM-NEXT: fcmovnb %st(1), %st # sched: [3:1.00]
-; SLM-NEXT: fcmovnbe %st(1), %st # sched: [3:1.00]
-; SLM-NEXT: fcmovne %st(1), %st # sched: [3:1.00]
-; SLM-NEXT: fcmovnu %st(1), %st # sched: [3:1.00]
-; SLM-NEXT: fcmovu %st(1), %st # sched: [3:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fcmov:
-; SANDY: # %bb.0:
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fcmovb %st(1), %st # sched: [3:2.00]
-; SANDY-NEXT: fcmovbe %st(1), %st # sched: [3:2.00]
-; SANDY-NEXT: fcmove %st(1), %st # sched: [3:2.00]
-; SANDY-NEXT: fcmovnb %st(1), %st # sched: [3:2.00]
-; SANDY-NEXT: fcmovnbe %st(1), %st # sched: [3:2.00]
-; SANDY-NEXT: fcmovne %st(1), %st # sched: [3:2.00]
-; SANDY-NEXT: fcmovnu %st(1), %st # sched: [3:2.00]
-; SANDY-NEXT: fcmovu %st(1), %st # sched: [3:2.00]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fcmov:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fcmovb %st(1), %st # sched: [3:1.00]
-; HASWELL-NEXT: fcmovbe %st(1), %st # sched: [3:1.00]
-; HASWELL-NEXT: fcmove %st(1), %st # sched: [3:1.00]
-; HASWELL-NEXT: fcmovnb %st(1), %st # sched: [3:1.00]
-; HASWELL-NEXT: fcmovnbe %st(1), %st # sched: [3:1.00]
-; HASWELL-NEXT: fcmovne %st(1), %st # sched: [3:1.00]
-; HASWELL-NEXT: fcmovnu %st(1), %st # sched: [3:1.00]
-; HASWELL-NEXT: fcmovu %st(1), %st # sched: [3:1.00]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fcmov:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fcmovb %st(1), %st # sched: [3:1.00]
-; BROADWELL-NEXT: fcmovbe %st(1), %st # sched: [3:1.00]
-; BROADWELL-NEXT: fcmove %st(1), %st # sched: [3:1.00]
-; BROADWELL-NEXT: fcmovnb %st(1), %st # sched: [3:1.00]
-; BROADWELL-NEXT: fcmovnbe %st(1), %st # sched: [3:1.00]
-; BROADWELL-NEXT: fcmovne %st(1), %st # sched: [3:1.00]
-; BROADWELL-NEXT: fcmovnu %st(1), %st # sched: [3:1.00]
-; BROADWELL-NEXT: fcmovu %st(1), %st # sched: [3:1.00]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fcmov:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fcmovb %st(1), %st # sched: [3:1.00]
-; SKYLAKE-NEXT: fcmovbe %st(1), %st # sched: [3:1.00]
-; SKYLAKE-NEXT: fcmove %st(1), %st # sched: [3:1.00]
-; SKYLAKE-NEXT: fcmovnb %st(1), %st # sched: [3:1.00]
-; SKYLAKE-NEXT: fcmovnbe %st(1), %st # sched: [3:1.00]
-; SKYLAKE-NEXT: fcmovne %st(1), %st # sched: [3:1.00]
-; SKYLAKE-NEXT: fcmovnu %st(1), %st # sched: [3:1.00]
-; SKYLAKE-NEXT: fcmovu %st(1), %st # sched: [3:1.00]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fcmov:
-; SKX: # %bb.0:
-; SKX-NEXT: #APP
-; SKX-NEXT: fcmovb %st(1), %st # sched: [3:1.00]
-; SKX-NEXT: fcmovbe %st(1), %st # sched: [3:1.00]
-; SKX-NEXT: fcmove %st(1), %st # sched: [3:1.00]
-; SKX-NEXT: fcmovnb %st(1), %st # sched: [3:1.00]
-; SKX-NEXT: fcmovnbe %st(1), %st # sched: [3:1.00]
-; SKX-NEXT: fcmovne %st(1), %st # sched: [3:1.00]
-; SKX-NEXT: fcmovnu %st(1), %st # sched: [3:1.00]
-; SKX-NEXT: fcmovu %st(1), %st # sched: [3:1.00]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fcmov:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fcmovb %st(1), %st # sched: [1:1.00]
-; BDVER2-NEXT: fcmovbe %st(1), %st # sched: [1:1.00]
-; BDVER2-NEXT: fcmove %st(1), %st # sched: [1:1.00]
-; BDVER2-NEXT: fcmovnb %st(1), %st # sched: [1:1.00]
-; BDVER2-NEXT: fcmovnbe %st(1), %st # sched: [1:1.00]
-; BDVER2-NEXT: fcmovne %st(1), %st # sched: [1:1.00]
-; BDVER2-NEXT: fcmovnu %st(1), %st # sched: [1:1.00]
-; BDVER2-NEXT: fcmovu %st(1), %st # sched: [1:1.00]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fcmov:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fcmovb %st(1), %st # sched: [3:1.00]
-; BTVER2-NEXT: fcmovbe %st(1), %st # sched: [3:1.00]
-; BTVER2-NEXT: fcmove %st(1), %st # sched: [3:1.00]
-; BTVER2-NEXT: fcmovnb %st(1), %st # sched: [3:1.00]
-; BTVER2-NEXT: fcmovnbe %st(1), %st # sched: [3:1.00]
-; BTVER2-NEXT: fcmovne %st(1), %st # sched: [3:1.00]
-; BTVER2-NEXT: fcmovnu %st(1), %st # sched: [3:1.00]
-; BTVER2-NEXT: fcmovu %st(1), %st # sched: [3:1.00]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fcmov:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fcmovb %st(1), %st # sched: [100:0.25]
-; ZNVER1-NEXT: fcmovbe %st(1), %st # sched: [100:0.25]
-; ZNVER1-NEXT: fcmove %st(1), %st # sched: [100:0.25]
-; ZNVER1-NEXT: fcmovnb %st(1), %st # sched: [100:0.25]
-; ZNVER1-NEXT: fcmovnbe %st(1), %st # sched: [100:0.25]
-; ZNVER1-NEXT: fcmovne %st(1), %st # sched: [100:0.25]
-; ZNVER1-NEXT: fcmovnu %st(1), %st # sched: [100:0.25]
-; ZNVER1-NEXT: fcmovu %st(1), %st # sched: [100:0.25]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fcmovb %st(1), %st(0) \0A\09 fcmovbe %st(1), %st(0) \0A\09 fcmove %st(1), %st(0) \0A\09 fcmovnb %st(1), %st(0) \0A\09 fcmovnbe %st(1), %st(0) \0A\09 fcmovne %st(1), %st(0) \0A\09 fcmovnu %st(1), %st(0) \0A\09 fcmovu %st(1), %st(0)", ""() nounwind
- ret void
-}
-
-define void @test_fcom(float *%a0, double *%a1) optsize {
-; GENERIC-LABEL: test_fcom:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fcom %st(1)
-; GENERIC-NEXT: fcom %st(3)
-; GENERIC-NEXT: fcoms (%ecx)
-; GENERIC-NEXT: fcoml (%eax)
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fcom:
-; ATOM: # %bb.0:
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:1.00]
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fcom %st(1) # sched: [5:5.00]
-; ATOM-NEXT: fcom %st(3) # sched: [5:5.00]
-; ATOM-NEXT: fcoms (%ecx) # sched: [5:5.00]
-; ATOM-NEXT: fcoml (%eax) # sched: [5:5.00]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fcom:
-; SLM: # %bb.0:
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
-; SLM-NEXT: #APP
-; SLM-NEXT: fcom %st(1) # sched: [3:1.00]
-; SLM-NEXT: fcom %st(3) # sched: [3:1.00]
-; SLM-NEXT: fcoms (%ecx) # sched: [6:1.00]
-; SLM-NEXT: fcoml (%eax) # sched: [6:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fcom:
-; SANDY: # %bb.0:
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fcom %st(1) # sched: [1:1.00]
-; SANDY-NEXT: fcom %st(3) # sched: [1:1.00]
-; SANDY-NEXT: fcoms (%ecx) # sched: [8:1.00]
-; SANDY-NEXT: fcoml (%eax) # sched: [8:1.00]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fcom:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fcom %st(1) # sched: [1:1.00]
-; HASWELL-NEXT: fcom %st(3) # sched: [1:1.00]
-; HASWELL-NEXT: fcoms (%ecx) # sched: [8:1.00]
-; HASWELL-NEXT: fcoml (%eax) # sched: [8:1.00]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fcom:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fcom %st(1) # sched: [1:1.00]
-; BROADWELL-NEXT: fcom %st(3) # sched: [1:1.00]
-; BROADWELL-NEXT: fcoms (%ecx) # sched: [7:1.00]
-; BROADWELL-NEXT: fcoml (%eax) # sched: [7:1.00]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fcom:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fcom %st(1) # sched: [1:1.00]
-; SKYLAKE-NEXT: fcom %st(3) # sched: [1:1.00]
-; SKYLAKE-NEXT: fcoms (%ecx) # sched: [8:1.00]
-; SKYLAKE-NEXT: fcoml (%eax) # sched: [8:1.00]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fcom:
-; SKX: # %bb.0:
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SKX-NEXT: #APP
-; SKX-NEXT: fcom %st(1) # sched: [1:1.00]
-; SKX-NEXT: fcom %st(3) # sched: [1:1.00]
-; SKX-NEXT: fcoms (%ecx) # sched: [8:1.00]
-; SKX-NEXT: fcoml (%eax) # sched: [8:1.00]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fcom:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fcom %st(1) # sched: [1:1.00]
-; BDVER2-NEXT: fcom %st(3) # sched: [1:1.00]
-; BDVER2-NEXT: fcoms (%ecx) # sched: [6:1.00]
-; BDVER2-NEXT: fcoml (%eax) # sched: [6:1.00]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fcom:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fcom %st(1) # sched: [3:1.00]
-; BTVER2-NEXT: fcom %st(3) # sched: [3:1.00]
-; BTVER2-NEXT: fcoms (%ecx) # sched: [8:1.00]
-; BTVER2-NEXT: fcoml (%eax) # sched: [8:1.00]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fcom:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [8:0.50]
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fcom %st(1) # sched: [1:1.00]
-; ZNVER1-NEXT: fcom %st(3) # sched: [1:1.00]
-; ZNVER1-NEXT: fcoms (%ecx) # sched: [8:1.00]
-; ZNVER1-NEXT: fcoml (%eax) # sched: [8:1.00]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fcom \0A\09 fcom %st(3) \0A\09 fcoms $0 \0A\09 fcoml $1", "*m,*m"(float *%a0, double *%a1) nounwind
- ret void
-}
-
-define void @test_fcomp_fcompp(float *%a0, double *%a1) optsize {
-; GENERIC-LABEL: test_fcomp_fcompp:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fcomp %st(1)
-; GENERIC-NEXT: fcomp %st(3)
-; GENERIC-NEXT: fcomps (%ecx)
-; GENERIC-NEXT: fcompl (%eax)
-; GENERIC-NEXT: fcompp
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fcomp_fcompp:
-; ATOM: # %bb.0:
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:1.00]
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fcomp %st(1) # sched: [5:5.00]
-; ATOM-NEXT: fcomp %st(3) # sched: [5:5.00]
-; ATOM-NEXT: fcomps (%ecx) # sched: [5:5.00]
-; ATOM-NEXT: fcompl (%eax) # sched: [5:5.00]
-; ATOM-NEXT: fcompp # sched: [1:1.00]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fcomp_fcompp:
-; SLM: # %bb.0:
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
-; SLM-NEXT: #APP
-; SLM-NEXT: fcomp %st(1) # sched: [3:1.00]
-; SLM-NEXT: fcomp %st(3) # sched: [3:1.00]
-; SLM-NEXT: fcomps (%ecx) # sched: [6:1.00]
-; SLM-NEXT: fcompl (%eax) # sched: [6:1.00]
-; SLM-NEXT: fcompp # sched: [100:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fcomp_fcompp:
-; SANDY: # %bb.0:
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fcomp %st(1) # sched: [1:1.00]
-; SANDY-NEXT: fcomp %st(3) # sched: [1:1.00]
-; SANDY-NEXT: fcomps (%ecx) # sched: [8:1.00]
-; SANDY-NEXT: fcompl (%eax) # sched: [8:1.00]
-; SANDY-NEXT: fcompp # sched: [100:0.33]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fcomp_fcompp:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fcomp %st(1) # sched: [1:1.00]
-; HASWELL-NEXT: fcomp %st(3) # sched: [1:1.00]
-; HASWELL-NEXT: fcomps (%ecx) # sched: [8:1.00]
-; HASWELL-NEXT: fcompl (%eax) # sched: [8:1.00]
-; HASWELL-NEXT: fcompp # sched: [1:0.50]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fcomp_fcompp:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fcomp %st(1) # sched: [1:1.00]
-; BROADWELL-NEXT: fcomp %st(3) # sched: [1:1.00]
-; BROADWELL-NEXT: fcomps (%ecx) # sched: [7:1.00]
-; BROADWELL-NEXT: fcompl (%eax) # sched: [7:1.00]
-; BROADWELL-NEXT: fcompp # sched: [100:0.25]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fcomp_fcompp:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fcomp %st(1) # sched: [1:1.00]
-; SKYLAKE-NEXT: fcomp %st(3) # sched: [1:1.00]
-; SKYLAKE-NEXT: fcomps (%ecx) # sched: [8:1.00]
-; SKYLAKE-NEXT: fcompl (%eax) # sched: [8:1.00]
-; SKYLAKE-NEXT: fcompp # sched: [100:0.25]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fcomp_fcompp:
-; SKX: # %bb.0:
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SKX-NEXT: #APP
-; SKX-NEXT: fcomp %st(1) # sched: [1:1.00]
-; SKX-NEXT: fcomp %st(3) # sched: [1:1.00]
-; SKX-NEXT: fcomps (%ecx) # sched: [8:1.00]
-; SKX-NEXT: fcompl (%eax) # sched: [8:1.00]
-; SKX-NEXT: fcompp # sched: [100:0.25]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fcomp_fcompp:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fcomp %st(1) # sched: [1:1.00]
-; BDVER2-NEXT: fcomp %st(3) # sched: [1:1.00]
-; BDVER2-NEXT: fcomps (%ecx) # sched: [6:1.00]
-; BDVER2-NEXT: fcompl (%eax) # sched: [6:1.00]
-; BDVER2-NEXT: fcompp # sched: [100:0.50]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fcomp_fcompp:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fcomp %st(1) # sched: [3:1.00]
-; BTVER2-NEXT: fcomp %st(3) # sched: [3:1.00]
-; BTVER2-NEXT: fcomps (%ecx) # sched: [8:1.00]
-; BTVER2-NEXT: fcompl (%eax) # sched: [8:1.00]
-; BTVER2-NEXT: fcompp # sched: [100:0.50]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fcomp_fcompp:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [8:0.50]
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fcomp %st(1) # sched: [1:1.00]
-; ZNVER1-NEXT: fcomp %st(3) # sched: [1:1.00]
-; ZNVER1-NEXT: fcomps (%ecx) # sched: [8:1.00]
-; ZNVER1-NEXT: fcompl (%eax) # sched: [8:1.00]
-; ZNVER1-NEXT: fcompp # sched: [1:1.00]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fcomp \0A\09 fcomp %st(3) \0A\09 fcomps $0 \0A\09 fcompl $1 \0A\09 fcompp", "*m,*m"(float *%a0, double *%a1) nounwind
- ret void
-}
-
-define void @test_fcomi_fcomip() optsize {
-; GENERIC-LABEL: test_fcomi_fcomip:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fcomi %st(3)
-; GENERIC-NEXT: fcompi %st(3)
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fcomi_fcomip:
-; ATOM: # %bb.0:
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fcomi %st(3) # sched: [9:4.50]
-; ATOM-NEXT: fcompi %st(3) # sched: [9:4.50]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fcomi_fcomip:
-; SLM: # %bb.0:
-; SLM-NEXT: #APP
-; SLM-NEXT: fcomi %st(3) # sched: [3:1.00]
-; SLM-NEXT: fcompi %st(3) # sched: [3:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fcomi_fcomip:
-; SANDY: # %bb.0:
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fcomi %st(3) # sched: [3:1.00]
-; SANDY-NEXT: fcompi %st(3) # sched: [3:1.00]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fcomi_fcomip:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fcomi %st(3) # sched: [1:0.50]
-; HASWELL-NEXT: fcompi %st(3) # sched: [1:0.50]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fcomi_fcomip:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fcomi %st(3) # sched: [3:1.00]
-; BROADWELL-NEXT: fcompi %st(3) # sched: [3:1.00]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fcomi_fcomip:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fcomi %st(3) # sched: [2:1.00]
-; SKYLAKE-NEXT: fcompi %st(3) # sched: [2:1.00]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fcomi_fcomip:
-; SKX: # %bb.0:
-; SKX-NEXT: #APP
-; SKX-NEXT: fcomi %st(3) # sched: [2:1.00]
-; SKX-NEXT: fcompi %st(3) # sched: [2:1.00]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fcomi_fcomip:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fcomi %st(3) # sched: [1:1.00]
-; BDVER2-NEXT: fcompi %st(3) # sched: [1:1.00]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fcomi_fcomip:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fcomi %st(3) # sched: [3:1.00]
-; BTVER2-NEXT: fcompi %st(3) # sched: [3:1.00]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fcomi_fcomip:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fcomi %st(3) # sched: [9:0.50]
-; ZNVER1-NEXT: fcompi %st(3) # sched: [9:0.50]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fcomi %st(3) \0A\09 fcomip %st(3)", ""() nounwind
- ret void
-}
-
-define void @test_fcos() optsize {
-; GENERIC-LABEL: test_fcos:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fcos
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fcos:
-; ATOM: # %bb.0:
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fcos # sched: [174:87.00]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fcos:
-; SLM: # %bb.0:
-; SLM-NEXT: #APP
-; SLM-NEXT: fcos # sched: [100:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fcos:
-; SANDY: # %bb.0:
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fcos # sched: [100:0.33]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fcos:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fcos # sched: [100:0.25]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fcos:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fcos # sched: [100:0.25]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fcos:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fcos # sched: [100:0.25]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fcos:
-; SKX: # %bb.0:
-; SKX-NEXT: #APP
-; SKX-NEXT: fcos # sched: [100:0.25]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fcos:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fcos # sched: [100:0.50]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fcos:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fcos # sched: [100:0.50]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fcos:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fcos # sched: [100:0.25]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fcos", ""() nounwind
- ret void
-}
-
-define void @test_fdecstp() optsize {
-; GENERIC-LABEL: test_fdecstp:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fdecstp
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fdecstp:
-; ATOM: # %bb.0:
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fdecstp # sched: [1:0.50]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fdecstp:
-; SLM: # %bb.0:
-; SLM-NEXT: #APP
-; SLM-NEXT: fdecstp # sched: [100:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fdecstp:
-; SANDY: # %bb.0:
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fdecstp # sched: [1:1.00]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fdecstp:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fdecstp # sched: [2:1.00]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fdecstp:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fdecstp # sched: [2:1.00]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fdecstp:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fdecstp # sched: [2:1.00]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fdecstp:
-; SKX: # %bb.0:
-; SKX-NEXT: #APP
-; SKX-NEXT: fdecstp # sched: [2:1.00]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fdecstp:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fdecstp # sched: [100:0.50]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fdecstp:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fdecstp # sched: [100:0.50]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fdecstp:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fdecstp # sched: [11:1.00]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fdecstp", ""() nounwind
- ret void
-}
-
-define void @test_fdiv(float *%a0, double *%a1) optsize {
-; GENERIC-LABEL: test_fdiv:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fdiv %st, %st(1)
-; GENERIC-NEXT: fdiv %st(2)
-; GENERIC-NEXT: fdivs (%ecx)
-; GENERIC-NEXT: fdivl (%eax)
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fdiv:
-; ATOM: # %bb.0:
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:1.00]
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fdiv %st, %st(1) # sched: [34:17.00]
-; ATOM-NEXT: fdiv %st(2) # sched: [34:17.00]
-; ATOM-NEXT: fdivs (%ecx) # sched: [34:17.00]
-; ATOM-NEXT: fdivl (%eax) # sched: [34:17.00]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fdiv:
-; SLM: # %bb.0:
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
-; SLM-NEXT: #APP
-; SLM-NEXT: fdiv %st, %st(1) # sched: [19:17.00]
-; SLM-NEXT: fdiv %st(2) # sched: [19:17.00]
-; SLM-NEXT: fdivs (%ecx) # sched: [22:17.00]
-; SLM-NEXT: fdivl (%eax) # sched: [22:17.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fdiv:
-; SANDY: # %bb.0:
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fdiv %st, %st(1) # sched: [14:14.00]
-; SANDY-NEXT: fdiv %st(2) # sched: [14:14.00]
-; SANDY-NEXT: fdivs (%ecx) # sched: [31:1.00]
-; SANDY-NEXT: fdivl (%eax) # sched: [31:1.00]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fdiv:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fdiv %st, %st(1) # sched: [24:1.00]
-; HASWELL-NEXT: fdiv %st(2) # sched: [20:1.00]
-; HASWELL-NEXT: fdivs (%ecx) # sched: [31:1.00]
-; HASWELL-NEXT: fdivl (%eax) # sched: [31:1.00]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fdiv:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fdiv %st, %st(1) # sched: [15:1.00]
-; BROADWELL-NEXT: fdiv %st(2) # sched: [20:1.00]
-; BROADWELL-NEXT: fdivs (%ecx) # sched: [21:1.00]
-; BROADWELL-NEXT: fdivl (%eax) # sched: [21:1.00]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fdiv:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fdiv %st, %st(1) # sched: [15:1.00]
-; SKYLAKE-NEXT: fdiv %st(2) # sched: [20:1.00]
-; SKYLAKE-NEXT: fdivs (%ecx) # sched: [22:1.00]
-; SKYLAKE-NEXT: fdivl (%eax) # sched: [22:1.00]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fdiv:
-; SKX: # %bb.0:
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SKX-NEXT: #APP
-; SKX-NEXT: fdiv %st, %st(1) # sched: [15:1.00]
-; SKX-NEXT: fdiv %st(2) # sched: [20:1.00]
-; SKX-NEXT: fdivs (%ecx) # sched: [22:1.00]
-; SKX-NEXT: fdivl (%eax) # sched: [22:1.00]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fdiv:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fdiv %st, %st(1) # sched: [9:9.50]
-; BDVER2-NEXT: fdiv %st(2) # sched: [9:9.50]
-; BDVER2-NEXT: fdivs (%ecx) # sched: [14:9.50]
-; BDVER2-NEXT: fdivl (%eax) # sched: [14:9.50]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fdiv:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fdiv %st, %st(1) # sched: [19:19.00]
-; BTVER2-NEXT: fdiv %st(2) # sched: [19:19.00]
-; BTVER2-NEXT: fdivs (%ecx) # sched: [24:19.00]
-; BTVER2-NEXT: fdivl (%eax) # sched: [24:19.00]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fdiv:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [8:0.50]
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fdiv %st, %st(1) # sched: [15:1.00]
-; ZNVER1-NEXT: fdiv %st(2) # sched: [15:1.00]
-; ZNVER1-NEXT: fdivs (%ecx) # sched: [22:1.00]
-; ZNVER1-NEXT: fdivl (%eax) # sched: [22:1.00]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fdiv %st(0), %st(1) \0A\09 fdiv %st(2), %st(0) \0A\09 fdivs $0 \0A\09 fdivl $1", "*m,*m"(float *%a0, double *%a1) nounwind
- ret void
-}
-
-define void @test_fdivp_fidiv(i16 *%a0, i32 *%a1) optsize {
-; GENERIC-LABEL: test_fdivp_fidiv:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fdivp %st(1)
-; GENERIC-NEXT: fdivp %st(2)
-; GENERIC-NEXT: fidivs (%ecx)
-; GENERIC-NEXT: fidivl (%eax)
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fdivp_fidiv:
-; ATOM: # %bb.0:
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:1.00]
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fdivp %st(1) # sched: [34:17.00]
-; ATOM-NEXT: fdivp %st(2) # sched: [34:17.00]
-; ATOM-NEXT: fidivs (%ecx) # sched: [34:17.00]
-; ATOM-NEXT: fidivl (%eax) # sched: [34:17.00]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fdivp_fidiv:
-; SLM: # %bb.0:
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
-; SLM-NEXT: #APP
-; SLM-NEXT: fdivp %st(1) # sched: [19:17.00]
-; SLM-NEXT: fdivp %st(2) # sched: [19:17.00]
-; SLM-NEXT: fidivs (%ecx) # sched: [22:17.00]
-; SLM-NEXT: fidivl (%eax) # sched: [22:17.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fdivp_fidiv:
-; SANDY: # %bb.0:
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fdivp %st(1) # sched: [14:14.00]
-; SANDY-NEXT: fdivp %st(2) # sched: [14:14.00]
-; SANDY-NEXT: fidivs (%ecx) # sched: [34:1.00]
-; SANDY-NEXT: fidivl (%eax) # sched: [34:1.00]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fdivp_fidiv:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fdivp %st(1) # sched: [24:1.00]
-; HASWELL-NEXT: fdivp %st(2) # sched: [24:1.00]
-; HASWELL-NEXT: fidivs (%ecx) # sched: [34:1.00]
-; HASWELL-NEXT: fidivl (%eax) # sched: [34:1.00]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fdivp_fidiv:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fdivp %st(1) # sched: [15:1.00]
-; BROADWELL-NEXT: fdivp %st(2) # sched: [15:1.00]
-; BROADWELL-NEXT: fidivs (%ecx) # sched: [24:1.00]
-; BROADWELL-NEXT: fidivl (%eax) # sched: [24:1.00]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fdivp_fidiv:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fdivp %st(1) # sched: [15:1.00]
-; SKYLAKE-NEXT: fdivp %st(2) # sched: [15:1.00]
-; SKYLAKE-NEXT: fidivs (%ecx) # sched: [25:1.00]
-; SKYLAKE-NEXT: fidivl (%eax) # sched: [25:1.00]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fdivp_fidiv:
-; SKX: # %bb.0:
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SKX-NEXT: #APP
-; SKX-NEXT: fdivp %st(1) # sched: [15:1.00]
-; SKX-NEXT: fdivp %st(2) # sched: [15:1.00]
-; SKX-NEXT: fidivs (%ecx) # sched: [25:1.00]
-; SKX-NEXT: fidivl (%eax) # sched: [25:1.00]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fdivp_fidiv:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fdivp %st(1) # sched: [9:9.50]
-; BDVER2-NEXT: fdivp %st(2) # sched: [9:9.50]
-; BDVER2-NEXT: fidivs (%ecx) # sched: [14:9.50]
-; BDVER2-NEXT: fidivl (%eax) # sched: [14:9.50]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fdivp_fidiv:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fdivp %st(1) # sched: [19:19.00]
-; BTVER2-NEXT: fdivp %st(2) # sched: [19:19.00]
-; BTVER2-NEXT: fidivs (%ecx) # sched: [24:19.00]
-; BTVER2-NEXT: fidivl (%eax) # sched: [24:19.00]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fdivp_fidiv:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [8:0.50]
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fdivp %st(1) # sched: [15:1.00]
-; ZNVER1-NEXT: fdivp %st(2) # sched: [15:1.00]
-; ZNVER1-NEXT: fidivs (%ecx) # sched: [22:1.00]
-; ZNVER1-NEXT: fidivl (%eax) # sched: [22:1.00]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fdivp \0A\09 fdivp %st(2), %st(0) \0A\09 fidivs $0 \0A\09 fidivl $1", "*m,*m"(i16 *%a0, i32 *%a1) nounwind
- ret void
-}
-
-define void @test_fdivr(float *%a0, double *%a1) optsize {
-; GENERIC-LABEL: test_fdivr:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fdivr %st, %st(1)
-; GENERIC-NEXT: fdivr %st(2)
-; GENERIC-NEXT: fdivrs (%ecx)
-; GENERIC-NEXT: fdivrl (%eax)
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fdivr:
-; ATOM: # %bb.0:
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:1.00]
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fdivr %st, %st(1) # sched: [34:17.00]
-; ATOM-NEXT: fdivr %st(2) # sched: [34:17.00]
-; ATOM-NEXT: fdivrs (%ecx) # sched: [34:17.00]
-; ATOM-NEXT: fdivrl (%eax) # sched: [34:17.00]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fdivr:
-; SLM: # %bb.0:
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
-; SLM-NEXT: #APP
-; SLM-NEXT: fdivr %st, %st(1) # sched: [19:17.00]
-; SLM-NEXT: fdivr %st(2) # sched: [19:17.00]
-; SLM-NEXT: fdivrs (%ecx) # sched: [22:17.00]
-; SLM-NEXT: fdivrl (%eax) # sched: [22:17.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fdivr:
-; SANDY: # %bb.0:
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fdivr %st, %st(1) # sched: [14:14.00]
-; SANDY-NEXT: fdivr %st(2) # sched: [14:14.00]
-; SANDY-NEXT: fdivrs (%ecx) # sched: [31:1.00]
-; SANDY-NEXT: fdivrl (%eax) # sched: [31:1.00]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fdivr:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fdivr %st, %st(1) # sched: [20:1.00]
-; HASWELL-NEXT: fdivr %st(2) # sched: [24:1.00]
-; HASWELL-NEXT: fdivrs (%ecx) # sched: [27:1.00]
-; HASWELL-NEXT: fdivrl (%eax) # sched: [27:1.00]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fdivr:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fdivr %st, %st(1) # sched: [20:1.00]
-; BROADWELL-NEXT: fdivr %st(2) # sched: [15:1.00]
-; BROADWELL-NEXT: fdivrs (%ecx) # sched: [26:1.00]
-; BROADWELL-NEXT: fdivrl (%eax) # sched: [26:1.00]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fdivr:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fdivr %st, %st(1) # sched: [20:1.00]
-; SKYLAKE-NEXT: fdivr %st(2) # sched: [15:1.00]
-; SKYLAKE-NEXT: fdivrs (%ecx) # sched: [27:1.00]
-; SKYLAKE-NEXT: fdivrl (%eax) # sched: [27:1.00]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fdivr:
-; SKX: # %bb.0:
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SKX-NEXT: #APP
-; SKX-NEXT: fdivr %st, %st(1) # sched: [20:1.00]
-; SKX-NEXT: fdivr %st(2) # sched: [15:1.00]
-; SKX-NEXT: fdivrs (%ecx) # sched: [27:1.00]
-; SKX-NEXT: fdivrl (%eax) # sched: [27:1.00]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fdivr:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fdivr %st, %st(1) # sched: [9:9.50]
-; BDVER2-NEXT: fdivr %st(2) # sched: [9:9.50]
-; BDVER2-NEXT: fdivrs (%ecx) # sched: [14:9.50]
-; BDVER2-NEXT: fdivrl (%eax) # sched: [14:9.50]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fdivr:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fdivr %st, %st(1) # sched: [19:19.00]
-; BTVER2-NEXT: fdivr %st(2) # sched: [19:19.00]
-; BTVER2-NEXT: fdivrs (%ecx) # sched: [24:19.00]
-; BTVER2-NEXT: fdivrl (%eax) # sched: [24:19.00]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fdivr:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [8:0.50]
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fdivr %st, %st(1) # sched: [15:1.00]
-; ZNVER1-NEXT: fdivr %st(2) # sched: [15:1.00]
-; ZNVER1-NEXT: fdivrs (%ecx) # sched: [22:1.00]
-; ZNVER1-NEXT: fdivrl (%eax) # sched: [22:1.00]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fdivr %st(0), %st(1) \0A\09 fdivr %st(2), %st(0) \0A\09 fdivrs $0 \0A\09 fdivrl $1", "*m,*m"(float *%a0, double *%a1) nounwind
- ret void
-}
-
-define void @test_fdivrp_fidivr(i16 *%a0, i32 *%a1) optsize {
-; GENERIC-LABEL: test_fdivrp_fidivr:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fdivrp %st(1)
-; GENERIC-NEXT: fdivrp %st(2)
-; GENERIC-NEXT: fidivrs (%ecx)
-; GENERIC-NEXT: fidivrl (%eax)
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fdivrp_fidivr:
-; ATOM: # %bb.0:
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:1.00]
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fdivrp %st(1) # sched: [34:17.00]
-; ATOM-NEXT: fdivrp %st(2) # sched: [34:17.00]
-; ATOM-NEXT: fidivrs (%ecx) # sched: [34:17.00]
-; ATOM-NEXT: fidivrl (%eax) # sched: [34:17.00]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fdivrp_fidivr:
-; SLM: # %bb.0:
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
-; SLM-NEXT: #APP
-; SLM-NEXT: fdivrp %st(1) # sched: [19:17.00]
-; SLM-NEXT: fdivrp %st(2) # sched: [19:17.00]
-; SLM-NEXT: fidivrs (%ecx) # sched: [22:17.00]
-; SLM-NEXT: fidivrl (%eax) # sched: [22:17.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fdivrp_fidivr:
-; SANDY: # %bb.0:
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fdivrp %st(1) # sched: [14:14.00]
-; SANDY-NEXT: fdivrp %st(2) # sched: [14:14.00]
-; SANDY-NEXT: fidivrs (%ecx) # sched: [34:1.00]
-; SANDY-NEXT: fidivrl (%eax) # sched: [34:1.00]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fdivrp_fidivr:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fdivrp %st(1) # sched: [20:1.00]
-; HASWELL-NEXT: fdivrp %st(2) # sched: [20:1.00]
-; HASWELL-NEXT: fidivrs (%ecx) # sched: [30:1.00]
-; HASWELL-NEXT: fidivrl (%eax) # sched: [30:1.00]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fdivrp_fidivr:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fdivrp %st(1) # sched: [20:1.00]
-; BROADWELL-NEXT: fdivrp %st(2) # sched: [20:1.00]
-; BROADWELL-NEXT: fidivrs (%ecx) # sched: [29:1.00]
-; BROADWELL-NEXT: fidivrl (%eax) # sched: [29:1.00]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fdivrp_fidivr:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fdivrp %st(1) # sched: [20:1.00]
-; SKYLAKE-NEXT: fdivrp %st(2) # sched: [20:1.00]
-; SKYLAKE-NEXT: fidivrs (%ecx) # sched: [30:1.00]
-; SKYLAKE-NEXT: fidivrl (%eax) # sched: [30:1.00]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fdivrp_fidivr:
-; SKX: # %bb.0:
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SKX-NEXT: #APP
-; SKX-NEXT: fdivrp %st(1) # sched: [20:1.00]
-; SKX-NEXT: fdivrp %st(2) # sched: [20:1.00]
-; SKX-NEXT: fidivrs (%ecx) # sched: [30:1.00]
-; SKX-NEXT: fidivrl (%eax) # sched: [30:1.00]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fdivrp_fidivr:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fdivrp %st(1) # sched: [9:9.50]
-; BDVER2-NEXT: fdivrp %st(2) # sched: [9:9.50]
-; BDVER2-NEXT: fidivrs (%ecx) # sched: [14:9.50]
-; BDVER2-NEXT: fidivrl (%eax) # sched: [14:9.50]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fdivrp_fidivr:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fdivrp %st(1) # sched: [19:19.00]
-; BTVER2-NEXT: fdivrp %st(2) # sched: [19:19.00]
-; BTVER2-NEXT: fidivrs (%ecx) # sched: [24:19.00]
-; BTVER2-NEXT: fidivrl (%eax) # sched: [24:19.00]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fdivrp_fidivr:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [8:0.50]
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fdivrp %st(1) # sched: [15:1.00]
-; ZNVER1-NEXT: fdivrp %st(2) # sched: [15:1.00]
-; ZNVER1-NEXT: fidivrs (%ecx) # sched: [22:1.00]
-; ZNVER1-NEXT: fidivrl (%eax) # sched: [22:1.00]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fdivrp \0A\09 fdivrp %st(2), %st(0) \0A\09 fidivrs $0 \0A\09 fidivrl $1", "*m,*m"(i16 *%a0, i32 *%a1) nounwind
- ret void
-}
-
-define void @test_ffree() optsize {
-; GENERIC-LABEL: test_ffree:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: ffree %st(0)
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_ffree:
-; ATOM: # %bb.0:
-; ATOM-NEXT: #APP
-; ATOM-NEXT: ffree %st(0) # sched: [1:0.50]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_ffree:
-; SLM: # %bb.0:
-; SLM-NEXT: #APP
-; SLM-NEXT: ffree %st(0) # sched: [100:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_ffree:
-; SANDY: # %bb.0:
-; SANDY-NEXT: #APP
-; SANDY-NEXT: ffree %st(0) # sched: [1:1.00]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_ffree:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: ffree %st(0) # sched: [1:0.50]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_ffree:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: ffree %st(0) # sched: [100:0.25]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_ffree:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: ffree %st(0) # sched: [100:0.25]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_ffree:
-; SKX: # %bb.0:
-; SKX-NEXT: #APP
-; SKX-NEXT: ffree %st(0) # sched: [100:0.25]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_ffree:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: ffree %st(0) # sched: [100:0.50]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_ffree:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: ffree %st(0) # sched: [100:0.50]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_ffree:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: ffree %st(0) # sched: [11:1.00]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "ffree %st(0)", ""() nounwind
- ret void
-}
-
-define void @test_ficom(i16 *%a0, i32 *%a1) optsize {
-; GENERIC-LABEL: test_ficom:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: ficoms (%ecx)
-; GENERIC-NEXT: ficoml (%eax)
-; GENERIC-NEXT: ficomps (%ecx)
-; GENERIC-NEXT: ficompl (%eax)
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_ficom:
-; ATOM: # %bb.0:
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:1.00]
-; ATOM-NEXT: #APP
-; ATOM-NEXT: ficoms (%ecx) # sched: [5:5.00]
-; ATOM-NEXT: ficoml (%eax) # sched: [5:5.00]
-; ATOM-NEXT: ficomps (%ecx) # sched: [5:5.00]
-; ATOM-NEXT: ficompl (%eax) # sched: [5:5.00]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_ficom:
-; SLM: # %bb.0:
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
-; SLM-NEXT: #APP
-; SLM-NEXT: ficoms (%ecx) # sched: [6:1.00]
-; SLM-NEXT: ficoml (%eax) # sched: [6:1.00]
-; SLM-NEXT: ficomps (%ecx) # sched: [6:1.00]
-; SLM-NEXT: ficompl (%eax) # sched: [6:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_ficom:
-; SANDY: # %bb.0:
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SANDY-NEXT: #APP
-; SANDY-NEXT: ficoms (%ecx) # sched: [11:2.00]
-; SANDY-NEXT: ficoml (%eax) # sched: [11:2.00]
-; SANDY-NEXT: ficomps (%ecx) # sched: [11:2.00]
-; SANDY-NEXT: ficompl (%eax) # sched: [11:2.00]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_ficom:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: ficoms (%ecx) # sched: [11:2.00]
-; HASWELL-NEXT: ficoml (%eax) # sched: [11:2.00]
-; HASWELL-NEXT: ficomps (%ecx) # sched: [11:2.00]
-; HASWELL-NEXT: ficompl (%eax) # sched: [11:2.00]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_ficom:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: ficoms (%ecx) # sched: [10:2.00]
-; BROADWELL-NEXT: ficoml (%eax) # sched: [10:2.00]
-; BROADWELL-NEXT: ficomps (%ecx) # sched: [10:2.00]
-; BROADWELL-NEXT: ficompl (%eax) # sched: [10:2.00]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_ficom:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: ficoms (%ecx) # sched: [11:2.00]
-; SKYLAKE-NEXT: ficoml (%eax) # sched: [11:2.00]
-; SKYLAKE-NEXT: ficomps (%ecx) # sched: [11:2.00]
-; SKYLAKE-NEXT: ficompl (%eax) # sched: [11:2.00]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_ficom:
-; SKX: # %bb.0:
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SKX-NEXT: #APP
-; SKX-NEXT: ficoms (%ecx) # sched: [11:2.00]
-; SKX-NEXT: ficoml (%eax) # sched: [11:2.00]
-; SKX-NEXT: ficomps (%ecx) # sched: [11:2.00]
-; SKX-NEXT: ficompl (%eax) # sched: [11:2.00]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_ficom:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: ficoms (%ecx) # sched: [6:1.00]
-; BDVER2-NEXT: ficoml (%eax) # sched: [6:1.00]
-; BDVER2-NEXT: ficomps (%ecx) # sched: [6:1.00]
-; BDVER2-NEXT: ficompl (%eax) # sched: [6:1.00]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_ficom:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: ficoms (%ecx) # sched: [8:1.00]
-; BTVER2-NEXT: ficoml (%eax) # sched: [8:1.00]
-; BTVER2-NEXT: ficomps (%ecx) # sched: [8:1.00]
-; BTVER2-NEXT: ficompl (%eax) # sched: [8:1.00]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_ficom:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [8:0.50]
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: ficoms (%ecx) # sched: [12:1.50]
-; ZNVER1-NEXT: ficoml (%eax) # sched: [12:1.50]
-; ZNVER1-NEXT: ficomps (%ecx) # sched: [12:1.50]
-; ZNVER1-NEXT: ficompl (%eax) # sched: [12:1.50]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "ficoms $0 \0A\09 ficoml $1 \0A\09 ficomps $0 \0A\09 ficompl $1", "*m,*m"(i16 *%a0, i32 *%a1) nounwind
- ret void
-}
-
-define void @test_fild(i16 *%a0, i32 *%a1, i64 *%a2) optsize {
-; GENERIC-LABEL: test_fild:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %edx
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: filds (%edx)
-; GENERIC-NEXT: fildl (%ecx)
-; GENERIC-NEXT: fildll (%eax)
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fild:
-; ATOM: # %bb.0:
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:1.00]
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [1:1.00]
-; ATOM-NEXT: #APP
-; ATOM-NEXT: filds (%edx) # sched: [5:5.00]
-; ATOM-NEXT: fildl (%ecx) # sched: [5:5.00]
-; ATOM-NEXT: fildll (%eax) # sched: [5:5.00]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fild:
-; SLM: # %bb.0:
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [3:1.00]
-; SLM-NEXT: #APP
-; SLM-NEXT: filds (%edx) # sched: [3:1.00]
-; SLM-NEXT: fildl (%ecx) # sched: [3:1.00]
-; SLM-NEXT: fildll (%eax) # sched: [3:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fild:
-; SANDY: # %bb.0:
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:0.50]
-; SANDY-NEXT: #APP
-; SANDY-NEXT: filds (%edx) # sched: [10:1.00]
-; SANDY-NEXT: fildl (%ecx) # sched: [10:1.00]
-; SANDY-NEXT: fildll (%eax) # sched: [10:1.00]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fild:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:0.50]
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: filds (%edx) # sched: [10:1.00]
-; HASWELL-NEXT: fildl (%ecx) # sched: [10:1.00]
-; HASWELL-NEXT: fildll (%eax) # sched: [10:1.00]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fild:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:0.50]
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: filds (%edx) # sched: [9:1.00]
-; BROADWELL-NEXT: fildl (%ecx) # sched: [9:1.00]
-; BROADWELL-NEXT: fildll (%eax) # sched: [9:1.00]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fild:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:0.50]
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: filds (%edx) # sched: [10:1.00]
-; SKYLAKE-NEXT: fildl (%ecx) # sched: [10:1.00]
-; SKYLAKE-NEXT: fildll (%eax) # sched: [10:1.00]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fild:
-; SKX: # %bb.0:
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:0.50]
-; SKX-NEXT: #APP
-; SKX-NEXT: filds (%edx) # sched: [10:1.00]
-; SKX-NEXT: fildl (%ecx) # sched: [10:1.00]
-; SKX-NEXT: fildll (%eax) # sched: [10:1.00]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fild:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:0.50]
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: filds (%edx) # sched: [5:0.50]
-; BDVER2-NEXT: fildl (%ecx) # sched: [5:0.50]
-; BDVER2-NEXT: fildll (%eax) # sched: [5:0.50]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fild:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [3:1.00]
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: filds (%edx) # sched: [3:1.00]
-; BTVER2-NEXT: fildl (%ecx) # sched: [3:1.00]
-; BTVER2-NEXT: fildll (%eax) # sched: [3:1.00]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fild:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [8:0.50]
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [8:0.50]
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: filds (%edx) # sched: [11:1.00]
-; ZNVER1-NEXT: fildl (%ecx) # sched: [11:1.00]
-; ZNVER1-NEXT: fildll (%eax) # sched: [11:1.00]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "filds $0 \0A\09 fildl $1 \0A\09 fildll $2", "*m,*m,*m"(i16 *%a0, i32 *%a1, i64 *%a2) nounwind
- ret void
-}
-
-define void @test_fincstp() optsize {
-; GENERIC-LABEL: test_fincstp:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fincstp
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fincstp:
-; ATOM: # %bb.0:
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fincstp # sched: [1:0.50]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fincstp:
-; SLM: # %bb.0:
-; SLM-NEXT: #APP
-; SLM-NEXT: fincstp # sched: [100:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fincstp:
-; SANDY: # %bb.0:
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fincstp # sched: [1:1.00]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fincstp:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fincstp # sched: [1:0.50]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fincstp:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fincstp # sched: [1:0.50]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fincstp:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fincstp # sched: [1:0.50]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fincstp:
-; SKX: # %bb.0:
-; SKX-NEXT: #APP
-; SKX-NEXT: fincstp # sched: [1:0.50]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fincstp:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fincstp # sched: [100:0.50]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fincstp:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fincstp # sched: [100:0.50]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fincstp:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fincstp # sched: [11:1.00]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fincstp", ""() nounwind
- ret void
-}
-
-define void @test_finit() optsize {
-; GENERIC-LABEL: test_finit:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: wait
-; GENERIC-NEXT: fninit
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_finit:
-; ATOM: # %bb.0:
-; ATOM-NEXT: #APP
-; ATOM-NEXT: wait # sched: [1:0.50]
-; ATOM-NEXT: fninit # sched: [63:31.50]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_finit:
-; SLM: # %bb.0:
-; SLM-NEXT: #APP
-; SLM-NEXT: wait # sched: [100:1.00]
-; SLM-NEXT: fninit # sched: [100:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_finit:
-; SANDY: # %bb.0:
-; SANDY-NEXT: #APP
-; SANDY-NEXT: wait # sched: [100:0.33]
-; SANDY-NEXT: fninit # sched: [5:1.33]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_finit:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: wait # sched: [2:0.50]
-; HASWELL-NEXT: fninit # sched: [75:6.00]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_finit:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: wait # sched: [2:0.50]
-; BROADWELL-NEXT: fninit # sched: [75:6.00]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_finit:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: wait # sched: [2:0.50]
-; SKYLAKE-NEXT: fninit # sched: [75:6.00]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_finit:
-; SKX: # %bb.0:
-; SKX-NEXT: #APP
-; SKX-NEXT: wait # sched: [2:0.50]
-; SKX-NEXT: fninit # sched: [75:6.00]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_finit:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: wait # sched: [100:0.50]
-; BDVER2-NEXT: fninit # sched: [100:0.50]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_finit:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: wait # sched: [100:0.50]
-; BTVER2-NEXT: fninit # sched: [100:0.50]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_finit:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: wait # sched: [1:1.00]
-; ZNVER1-NEXT: fninit # sched: [100:0.25]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "finit", ""() nounwind
- ret void
-}
-
-define void @test_fninit() optsize {
-; GENERIC-LABEL: test_fninit:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fninit
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fninit:
-; ATOM: # %bb.0:
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fninit # sched: [63:31.50]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fninit:
-; SLM: # %bb.0:
-; SLM-NEXT: #APP
-; SLM-NEXT: fninit # sched: [100:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fninit:
-; SANDY: # %bb.0:
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fninit # sched: [5:1.33]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fninit:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fninit # sched: [75:6.00]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fninit:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fninit # sched: [75:6.00]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fninit:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fninit # sched: [75:6.00]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fninit:
-; SKX: # %bb.0:
-; SKX-NEXT: #APP
-; SKX-NEXT: fninit # sched: [75:6.00]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fninit:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fninit # sched: [100:0.50]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fninit:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fninit # sched: [100:0.50]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fninit:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fninit # sched: [100:0.25]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fninit", ""() nounwind
- ret void
-}
-
-define void @test_fist_fistp_fisttp(i16* %a0, i32* %a1, i64 *%a2) optsize {
-; GENERIC-LABEL: test_fist_fistp_fisttp:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %edx
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fists (%edx)
-; GENERIC-NEXT: fistl (%ecx)
-; GENERIC-NEXT: fistps (%edx)
-; GENERIC-NEXT: fistpl (%ecx)
-; GENERIC-NEXT: fistpll (%eax)
-; GENERIC-NEXT: fisttps (%edx)
-; GENERIC-NEXT: fisttpl (%ecx)
-; GENERIC-NEXT: fisttpll (%eax)
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fist_fistp_fisttp:
-; ATOM: # %bb.0:
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:1.00]
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [1:1.00]
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fists (%edx) # sched: [6:3.00]
-; ATOM-NEXT: fistl (%ecx) # sched: [6:3.00]
-; ATOM-NEXT: fistps (%edx) # sched: [6:3.00]
-; ATOM-NEXT: fistpl (%ecx) # sched: [6:3.00]
-; ATOM-NEXT: fistpll (%eax) # sched: [6:3.00]
-; ATOM-NEXT: fisttps (%edx) # sched: [2:1.00]
-; ATOM-NEXT: fisttpl (%ecx) # sched: [2:1.00]
-; ATOM-NEXT: fisttpll (%eax) # sched: [2:1.00]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fist_fistp_fisttp:
-; SLM: # %bb.0:
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [3:1.00]
-; SLM-NEXT: #APP
-; SLM-NEXT: fists (%edx) # sched: [1:1.00]
-; SLM-NEXT: fistl (%ecx) # sched: [1:1.00]
-; SLM-NEXT: fistps (%edx) # sched: [1:1.00]
-; SLM-NEXT: fistpl (%ecx) # sched: [1:1.00]
-; SLM-NEXT: fistpll (%eax) # sched: [1:1.00]
-; SLM-NEXT: fisttps (%edx) # sched: [1:1.00]
-; SLM-NEXT: fisttpl (%ecx) # sched: [1:1.00]
-; SLM-NEXT: fisttpll (%eax) # sched: [1:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fist_fistp_fisttp:
-; SANDY: # %bb.0:
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:0.50]
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fists (%edx) # sched: [9:1.00]
-; SANDY-NEXT: fistl (%ecx) # sched: [9:1.00]
-; SANDY-NEXT: fistps (%edx) # sched: [9:1.00]
-; SANDY-NEXT: fistpl (%ecx) # sched: [9:1.00]
-; SANDY-NEXT: fistpll (%eax) # sched: [9:1.00]
-; SANDY-NEXT: fisttps (%edx) # sched: [5:1.00]
-; SANDY-NEXT: fisttpl (%ecx) # sched: [5:1.00]
-; SANDY-NEXT: fisttpll (%eax) # sched: [5:1.00]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fist_fistp_fisttp:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:0.50]
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fists (%edx) # sched: [4:1.00]
-; HASWELL-NEXT: fistl (%ecx) # sched: [4:1.00]
-; HASWELL-NEXT: fistps (%edx) # sched: [4:1.00]
-; HASWELL-NEXT: fistpl (%ecx) # sched: [4:1.00]
-; HASWELL-NEXT: fistpll (%eax) # sched: [4:1.00]
-; HASWELL-NEXT: fisttps (%edx) # sched: [4:1.00]
-; HASWELL-NEXT: fisttpl (%ecx) # sched: [4:1.00]
-; HASWELL-NEXT: fisttpll (%eax) # sched: [4:1.00]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fist_fistp_fisttp:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:0.50]
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fists (%edx) # sched: [4:1.00]
-; BROADWELL-NEXT: fistl (%ecx) # sched: [4:1.00]
-; BROADWELL-NEXT: fistps (%edx) # sched: [4:1.00]
-; BROADWELL-NEXT: fistpl (%ecx) # sched: [4:1.00]
-; BROADWELL-NEXT: fistpll (%eax) # sched: [4:1.00]
-; BROADWELL-NEXT: fisttps (%edx) # sched: [4:1.00]
-; BROADWELL-NEXT: fisttpl (%ecx) # sched: [4:1.00]
-; BROADWELL-NEXT: fisttpll (%eax) # sched: [4:1.00]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fist_fistp_fisttp:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:0.50]
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fists (%edx) # sched: [4:1.00]
-; SKYLAKE-NEXT: fistl (%ecx) # sched: [4:1.00]
-; SKYLAKE-NEXT: fistps (%edx) # sched: [4:1.00]
-; SKYLAKE-NEXT: fistpl (%ecx) # sched: [4:1.00]
-; SKYLAKE-NEXT: fistpll (%eax) # sched: [4:1.00]
-; SKYLAKE-NEXT: fisttps (%edx) # sched: [4:1.00]
-; SKYLAKE-NEXT: fisttpl (%ecx) # sched: [4:1.00]
-; SKYLAKE-NEXT: fisttpll (%eax) # sched: [4:1.00]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fist_fistp_fisttp:
-; SKX: # %bb.0:
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:0.50]
-; SKX-NEXT: #APP
-; SKX-NEXT: fists (%edx) # sched: [4:1.00]
-; SKX-NEXT: fistl (%ecx) # sched: [4:1.00]
-; SKX-NEXT: fistps (%edx) # sched: [4:1.00]
-; SKX-NEXT: fistpl (%ecx) # sched: [4:1.00]
-; SKX-NEXT: fistpll (%eax) # sched: [4:1.00]
-; SKX-NEXT: fisttps (%edx) # sched: [4:1.00]
-; SKX-NEXT: fisttpl (%ecx) # sched: [4:1.00]
-; SKX-NEXT: fisttpll (%eax) # sched: [4:1.00]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fist_fistp_fisttp:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:0.50]
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fists (%edx) # sched: [1:1.00]
-; BDVER2-NEXT: fistl (%ecx) # sched: [1:1.00]
-; BDVER2-NEXT: fistps (%edx) # sched: [1:1.00]
-; BDVER2-NEXT: fistpl (%ecx) # sched: [1:1.00]
-; BDVER2-NEXT: fistpll (%eax) # sched: [1:1.00]
-; BDVER2-NEXT: fisttps (%edx) # sched: [1:1.00]
-; BDVER2-NEXT: fisttpl (%ecx) # sched: [1:1.00]
-; BDVER2-NEXT: fisttpll (%eax) # sched: [1:1.00]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fist_fistp_fisttp:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [3:1.00]
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fists (%edx) # sched: [1:1.00]
-; BTVER2-NEXT: fistl (%ecx) # sched: [1:1.00]
-; BTVER2-NEXT: fistps (%edx) # sched: [1:1.00]
-; BTVER2-NEXT: fistpl (%ecx) # sched: [1:1.00]
-; BTVER2-NEXT: fistpll (%eax) # sched: [1:1.00]
-; BTVER2-NEXT: fisttps (%edx) # sched: [1:1.00]
-; BTVER2-NEXT: fisttpl (%ecx) # sched: [1:1.00]
-; BTVER2-NEXT: fisttpll (%eax) # sched: [1:1.00]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fist_fistp_fisttp:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [8:0.50]
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [8:0.50]
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fists (%edx) # sched: [12:0.50]
-; ZNVER1-NEXT: fistl (%ecx) # sched: [12:0.50]
-; ZNVER1-NEXT: fistps (%edx) # sched: [12:0.50]
-; ZNVER1-NEXT: fistpl (%ecx) # sched: [12:0.50]
-; ZNVER1-NEXT: fistpll (%eax) # sched: [12:0.50]
-; ZNVER1-NEXT: fisttps (%edx) # sched: [12:0.50]
-; ZNVER1-NEXT: fisttpl (%ecx) # sched: [12:0.50]
-; ZNVER1-NEXT: fisttpll (%eax) # sched: [12:0.50]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fists $0 \0A\09 fistl $1 \0A\09 fistps $0 \0A\09 fistpl $1 \0A\09 fistpll $2 \0A\09 fisttps $0 \0A\09 fisttpl $1 \0A\09 fisttpll $2", "*m,*m,*m"(i16* %a0, i32* %a1, i64 *%a2) nounwind
- ret void
-}
-
-define void @test_fld(i16* %a0, i32* %a1, i64 *%a2) optsize {
-; GENERIC-LABEL: test_fld:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %edx
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fld %st(0)
-; GENERIC-NEXT: flds (%edx)
-; GENERIC-NEXT: fldl (%ecx)
-; GENERIC-NEXT: fldt (%eax)
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fld:
-; ATOM: # %bb.0:
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:1.00]
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [1:1.00]
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fld %st(0) # sched: [1:1.00]
-; ATOM-NEXT: flds (%edx) # sched: [1:1.00]
-; ATOM-NEXT: fldl (%ecx) # sched: [1:1.00]
-; ATOM-NEXT: fldt (%eax) # sched: [4:2.00]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fld:
-; SLM: # %bb.0:
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [3:1.00]
-; SLM-NEXT: #APP
-; SLM-NEXT: fld %st(0) # sched: [1:0.50]
-; SLM-NEXT: flds (%edx) # sched: [3:1.00]
-; SLM-NEXT: fldl (%ecx) # sched: [3:1.00]
-; SLM-NEXT: fldt (%eax) # sched: [3:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fld:
-; SANDY: # %bb.0:
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:0.50]
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fld %st(0) # sched: [1:1.00]
-; SANDY-NEXT: flds (%edx) # sched: [9:1.00]
-; SANDY-NEXT: fldl (%ecx) # sched: [9:1.00]
-; SANDY-NEXT: fldt (%eax) # sched: [9:1.00]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fld:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:0.50]
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fld %st(0) # sched: [1:0.50]
-; HASWELL-NEXT: flds (%edx) # sched: [7:0.50]
-; HASWELL-NEXT: fldl (%ecx) # sched: [7:0.50]
-; HASWELL-NEXT: fldt (%eax) # sched: [7:0.50]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fld:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:0.50]
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fld %st(0) # sched: [1:0.25]
-; BROADWELL-NEXT: flds (%edx) # sched: [6:0.50]
-; BROADWELL-NEXT: fldl (%ecx) # sched: [6:0.50]
-; BROADWELL-NEXT: fldt (%eax) # sched: [6:0.50]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fld:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:0.50]
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fld %st(0) # sched: [1:0.25]
-; SKYLAKE-NEXT: flds (%edx) # sched: [7:0.50]
-; SKYLAKE-NEXT: fldl (%ecx) # sched: [7:0.50]
-; SKYLAKE-NEXT: fldt (%eax) # sched: [7:0.50]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fld:
-; SKX: # %bb.0:
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:0.50]
-; SKX-NEXT: #APP
-; SKX-NEXT: fld %st(0) # sched: [1:0.25]
-; SKX-NEXT: flds (%edx) # sched: [7:0.50]
-; SKX-NEXT: fldl (%ecx) # sched: [7:0.50]
-; SKX-NEXT: fldt (%eax) # sched: [7:0.50]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fld:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:0.50]
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fld %st(0) # sched: [1:0.50]
-; BDVER2-NEXT: flds (%edx) # sched: [5:0.50]
-; BDVER2-NEXT: fldl (%ecx) # sched: [5:0.50]
-; BDVER2-NEXT: fldt (%eax) # sched: [5:0.50]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fld:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [3:1.00]
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fld %st(0) # sched: [1:0.50]
-; BTVER2-NEXT: flds (%edx) # sched: [3:1.00]
-; BTVER2-NEXT: fldl (%ecx) # sched: [3:1.00]
-; BTVER2-NEXT: fldt (%eax) # sched: [3:1.00]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fld:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [8:0.50]
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [8:0.50]
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fld %st(0) # sched: [1:0.50]
-; ZNVER1-NEXT: flds (%edx) # sched: [8:0.50]
-; ZNVER1-NEXT: fldl (%ecx) # sched: [8:0.50]
-; ZNVER1-NEXT: fldt (%eax) # sched: [1:0.50]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fld %st(0) \0A\09 flds $0 \0A\09 fldl $1 \0A\09 fldt $2", "*m,*m,*m"(i16* %a0, i32* %a1, i64 *%a2) nounwind
- ret void
-}
-
-define void @test_fldcw_fldenv(i8* %a0) optsize {
-; GENERIC-LABEL: test_fldcw_fldenv:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fldcw (%eax)
-; GENERIC-NEXT: fldenv (%eax)
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fldcw_fldenv:
-; ATOM: # %bb.0:
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fldcw (%eax) # sched: [5:2.50]
-; ATOM-NEXT: fldenv (%eax) # sched: [100:0.50]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fldcw_fldenv:
-; SLM: # %bb.0:
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; SLM-NEXT: #APP
-; SLM-NEXT: fldcw (%eax) # sched: [3:1.00]
-; SLM-NEXT: fldenv (%eax) # sched: [100:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fldcw_fldenv:
-; SANDY: # %bb.0:
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fldcw (%eax) # sched: [8:2.00]
-; SANDY-NEXT: fldenv (%eax) # sched: [100:0.33]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fldcw_fldenv:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fldcw (%eax) # sched: [7:1.00]
-; HASWELL-NEXT: fldenv (%eax) # sched: [61:14.00]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fldcw_fldenv:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fldcw (%eax) # sched: [7:1.00]
-; BROADWELL-NEXT: fldenv (%eax) # sched: [60:14.00]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fldcw_fldenv:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fldcw (%eax) # sched: [7:1.00]
-; SKYLAKE-NEXT: fldenv (%eax) # sched: [62:14.00]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fldcw_fldenv:
-; SKX: # %bb.0:
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKX-NEXT: #APP
-; SKX-NEXT: fldcw (%eax) # sched: [7:1.00]
-; SKX-NEXT: fldenv (%eax) # sched: [62:14.00]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fldcw_fldenv:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fldcw (%eax) # sched: [5:0.50]
-; BDVER2-NEXT: fldenv (%eax) # sched: [100:0.50]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fldcw_fldenv:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fldcw (%eax) # sched: [3:1.00]
-; BTVER2-NEXT: fldenv (%eax) # sched: [100:0.50]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fldcw_fldenv:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fldcw (%eax) # sched: [100:0.25]
-; ZNVER1-NEXT: fldenv (%eax) # sched: [100:0.25]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fldcw $0 \0A\09 fldenv $0", "*m"(i8* %a0) nounwind
- ret void
-}
-
-define void @test_fld1_fldl2e_fldl2t_fldlg2_fldln2_fldpi_fldz() optsize {
-; GENERIC-LABEL: test_fld1_fldl2e_fldl2t_fldlg2_fldln2_fldpi_fldz:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fld1
-; GENERIC-NEXT: fldl2e
-; GENERIC-NEXT: fldl2t
-; GENERIC-NEXT: fldlg2
-; GENERIC-NEXT: fldln2
-; GENERIC-NEXT: fldpi
-; GENERIC-NEXT: fldz
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fld1_fldl2e_fldl2t_fldlg2_fldln2_fldpi_fldz:
-; ATOM: # %bb.0:
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fld1 # sched: [6:3.00]
-; ATOM-NEXT: fldl2e # sched: [10:5.00]
-; ATOM-NEXT: fldl2t # sched: [10:5.00]
-; ATOM-NEXT: fldlg2 # sched: [10:5.00]
-; ATOM-NEXT: fldln2 # sched: [10:5.00]
-; ATOM-NEXT: fldpi # sched: [10:5.00]
-; ATOM-NEXT: fldz # sched: [1:0.50]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fld1_fldl2e_fldl2t_fldlg2_fldln2_fldpi_fldz:
-; SLM: # %bb.0:
-; SLM-NEXT: #APP
-; SLM-NEXT: fld1 # sched: [1:0.50]
-; SLM-NEXT: fldl2e # sched: [1:1.00]
-; SLM-NEXT: fldl2t # sched: [1:1.00]
-; SLM-NEXT: fldlg2 # sched: [1:1.00]
-; SLM-NEXT: fldln2 # sched: [1:1.00]
-; SLM-NEXT: fldpi # sched: [1:1.00]
-; SLM-NEXT: fldz # sched: [1:0.50]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fld1_fldl2e_fldl2t_fldlg2_fldln2_fldpi_fldz:
-; SANDY: # %bb.0:
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fld1 # sched: [1:1.00]
-; SANDY-NEXT: fldl2e # sched: [1:1.00]
-; SANDY-NEXT: fldl2t # sched: [1:1.00]
-; SANDY-NEXT: fldlg2 # sched: [1:1.00]
-; SANDY-NEXT: fldln2 # sched: [1:1.00]
-; SANDY-NEXT: fldpi # sched: [1:1.00]
-; SANDY-NEXT: fldz # sched: [1:1.00]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fld1_fldl2e_fldl2t_fldlg2_fldln2_fldpi_fldz:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fld1 # sched: [1:1.00]
-; HASWELL-NEXT: fldl2e # sched: [1:1.00]
-; HASWELL-NEXT: fldl2t # sched: [1:1.00]
-; HASWELL-NEXT: fldlg2 # sched: [1:1.00]
-; HASWELL-NEXT: fldln2 # sched: [1:1.00]
-; HASWELL-NEXT: fldpi # sched: [1:1.00]
-; HASWELL-NEXT: fldz # sched: [1:0.50]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fld1_fldl2e_fldl2t_fldlg2_fldln2_fldpi_fldz:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fld1 # sched: [1:1.00]
-; BROADWELL-NEXT: fldl2e # sched: [1:1.00]
-; BROADWELL-NEXT: fldl2t # sched: [1:1.00]
-; BROADWELL-NEXT: fldlg2 # sched: [1:1.00]
-; BROADWELL-NEXT: fldln2 # sched: [1:1.00]
-; BROADWELL-NEXT: fldpi # sched: [1:1.00]
-; BROADWELL-NEXT: fldz # sched: [1:0.50]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fld1_fldl2e_fldl2t_fldlg2_fldln2_fldpi_fldz:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fld1 # sched: [1:1.00]
-; SKYLAKE-NEXT: fldl2e # sched: [1:1.00]
-; SKYLAKE-NEXT: fldl2t # sched: [1:1.00]
-; SKYLAKE-NEXT: fldlg2 # sched: [1:1.00]
-; SKYLAKE-NEXT: fldln2 # sched: [1:1.00]
-; SKYLAKE-NEXT: fldpi # sched: [1:1.00]
-; SKYLAKE-NEXT: fldz # sched: [1:0.50]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fld1_fldl2e_fldl2t_fldlg2_fldln2_fldpi_fldz:
-; SKX: # %bb.0:
-; SKX-NEXT: #APP
-; SKX-NEXT: fld1 # sched: [1:1.00]
-; SKX-NEXT: fldl2e # sched: [1:1.00]
-; SKX-NEXT: fldl2t # sched: [1:1.00]
-; SKX-NEXT: fldlg2 # sched: [1:1.00]
-; SKX-NEXT: fldln2 # sched: [1:1.00]
-; SKX-NEXT: fldpi # sched: [1:1.00]
-; SKX-NEXT: fldz # sched: [1:0.50]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fld1_fldl2e_fldl2t_fldlg2_fldln2_fldpi_fldz:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fld1 # sched: [3:1.00]
-; BDVER2-NEXT: fldl2e # sched: [3:1.00]
-; BDVER2-NEXT: fldl2t # sched: [3:1.00]
-; BDVER2-NEXT: fldlg2 # sched: [3:1.00]
-; BDVER2-NEXT: fldln2 # sched: [3:1.00]
-; BDVER2-NEXT: fldpi # sched: [3:1.00]
-; BDVER2-NEXT: fldz # sched: [3:1.00]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fld1_fldl2e_fldl2t_fldlg2_fldln2_fldpi_fldz:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fld1 # sched: [3:1.00]
-; BTVER2-NEXT: fldl2e # sched: [3:1.00]
-; BTVER2-NEXT: fldl2t # sched: [3:1.00]
-; BTVER2-NEXT: fldlg2 # sched: [3:1.00]
-; BTVER2-NEXT: fldln2 # sched: [3:1.00]
-; BTVER2-NEXT: fldpi # sched: [3:1.00]
-; BTVER2-NEXT: fldz # sched: [3:1.00]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fld1_fldl2e_fldl2t_fldlg2_fldln2_fldpi_fldz:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fld1 # sched: [11:1.00]
-; ZNVER1-NEXT: fldl2e # sched: [11:1.00]
-; ZNVER1-NEXT: fldl2t # sched: [11:1.00]
-; ZNVER1-NEXT: fldlg2 # sched: [11:1.00]
-; ZNVER1-NEXT: fldln2 # sched: [11:1.00]
-; ZNVER1-NEXT: fldpi # sched: [11:1.00]
-; ZNVER1-NEXT: fldz # sched: [8:0.50]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fld1 \0A\09 fldl2e \0A\09 fldl2t \0A\09 fldlg2 \0A\09 fldln2 \0A\09 fldpi \0A\09 fldz", ""() nounwind
- ret void
-}
-
-define void @test_fmul(float *%a0, double *%a1) optsize {
-; GENERIC-LABEL: test_fmul:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fmul %st, %st(1)
-; GENERIC-NEXT: fmul %st(2)
-; GENERIC-NEXT: fmuls (%ecx)
-; GENERIC-NEXT: fmull (%eax)
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fmul:
-; ATOM: # %bb.0:
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:1.00]
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fmul %st, %st(1) # sched: [4:4.00]
-; ATOM-NEXT: fmul %st(2) # sched: [4:4.00]
-; ATOM-NEXT: fmuls (%ecx) # sched: [4:4.00]
-; ATOM-NEXT: fmull (%eax) # sched: [4:4.00]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fmul:
-; SLM: # %bb.0:
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
-; SLM-NEXT: #APP
-; SLM-NEXT: fmul %st, %st(1) # sched: [5:2.00]
-; SLM-NEXT: fmul %st(2) # sched: [5:2.00]
-; SLM-NEXT: fmuls (%ecx) # sched: [8:2.00]
-; SLM-NEXT: fmull (%eax) # sched: [8:2.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fmul:
-; SANDY: # %bb.0:
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fmul %st, %st(1) # sched: [5:1.00]
-; SANDY-NEXT: fmul %st(2) # sched: [5:1.00]
-; SANDY-NEXT: fmuls (%ecx) # sched: [12:1.00]
-; SANDY-NEXT: fmull (%eax) # sched: [12:1.00]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fmul:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fmul %st, %st(1) # sched: [5:1.00]
-; HASWELL-NEXT: fmul %st(2) # sched: [5:1.00]
-; HASWELL-NEXT: fmuls (%ecx) # sched: [12:1.00]
-; HASWELL-NEXT: fmull (%eax) # sched: [12:1.00]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fmul:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fmul %st, %st(1) # sched: [5:1.00]
-; BROADWELL-NEXT: fmul %st(2) # sched: [5:1.00]
-; BROADWELL-NEXT: fmuls (%ecx) # sched: [11:1.00]
-; BROADWELL-NEXT: fmull (%eax) # sched: [11:1.00]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fmul:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fmul %st, %st(1) # sched: [4:1.00]
-; SKYLAKE-NEXT: fmul %st(2) # sched: [4:1.00]
-; SKYLAKE-NEXT: fmuls (%ecx) # sched: [11:1.00]
-; SKYLAKE-NEXT: fmull (%eax) # sched: [11:1.00]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fmul:
-; SKX: # %bb.0:
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SKX-NEXT: #APP
-; SKX-NEXT: fmul %st, %st(1) # sched: [4:1.00]
-; SKX-NEXT: fmul %st(2) # sched: [4:1.00]
-; SKX-NEXT: fmuls (%ecx) # sched: [11:1.00]
-; SKX-NEXT: fmull (%eax) # sched: [11:1.00]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fmul:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fmul %st, %st(1) # sched: [5:1.00]
-; BDVER2-NEXT: fmul %st(2) # sched: [5:1.00]
-; BDVER2-NEXT: fmuls (%ecx) # sched: [10:1.00]
-; BDVER2-NEXT: fmull (%eax) # sched: [10:1.00]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fmul:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fmul %st, %st(1) # sched: [2:1.00]
-; BTVER2-NEXT: fmul %st(2) # sched: [2:1.00]
-; BTVER2-NEXT: fmuls (%ecx) # sched: [7:1.00]
-; BTVER2-NEXT: fmull (%eax) # sched: [7:1.00]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fmul:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [8:0.50]
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fmul %st, %st(1) # sched: [3:0.50]
-; ZNVER1-NEXT: fmul %st(2) # sched: [3:0.50]
-; ZNVER1-NEXT: fmuls (%ecx) # sched: [10:0.50]
-; ZNVER1-NEXT: fmull (%eax) # sched: [10:0.50]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fmul %st(0), %st(1) \0A\09 fmul %st(2), %st(0) \0A\09 fmuls $0 \0A\09 fmull $1", "*m,*m"(float *%a0, double *%a1) nounwind
- ret void
-}
-
-define void @test_fmulp_fimul(i16 *%a0, i32 *%a1) optsize {
-; GENERIC-LABEL: test_fmulp_fimul:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fmulp %st(1)
-; GENERIC-NEXT: fmulp %st(2)
-; GENERIC-NEXT: fimuls (%ecx)
-; GENERIC-NEXT: fimull (%eax)
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fmulp_fimul:
-; ATOM: # %bb.0:
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:1.00]
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fmulp %st(1) # sched: [4:4.00]
-; ATOM-NEXT: fmulp %st(2) # sched: [4:4.00]
-; ATOM-NEXT: fimuls (%ecx) # sched: [4:4.00]
-; ATOM-NEXT: fimull (%eax) # sched: [4:4.00]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fmulp_fimul:
-; SLM: # %bb.0:
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
-; SLM-NEXT: #APP
-; SLM-NEXT: fmulp %st(1) # sched: [5:2.00]
-; SLM-NEXT: fmulp %st(2) # sched: [5:2.00]
-; SLM-NEXT: fimuls (%ecx) # sched: [8:2.00]
-; SLM-NEXT: fimull (%eax) # sched: [8:2.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fmulp_fimul:
-; SANDY: # %bb.0:
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fmulp %st(1) # sched: [5:1.00]
-; SANDY-NEXT: fmulp %st(2) # sched: [5:1.00]
-; SANDY-NEXT: fimuls (%ecx) # sched: [15:1.00]
-; SANDY-NEXT: fimull (%eax) # sched: [15:1.00]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fmulp_fimul:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fmulp %st(1) # sched: [5:1.00]
-; HASWELL-NEXT: fmulp %st(2) # sched: [5:1.00]
-; HASWELL-NEXT: fimuls (%ecx) # sched: [15:1.00]
-; HASWELL-NEXT: fimull (%eax) # sched: [15:1.00]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fmulp_fimul:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fmulp %st(1) # sched: [5:1.00]
-; BROADWELL-NEXT: fmulp %st(2) # sched: [5:1.00]
-; BROADWELL-NEXT: fimuls (%ecx) # sched: [14:1.00]
-; BROADWELL-NEXT: fimull (%eax) # sched: [14:1.00]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fmulp_fimul:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fmulp %st(1) # sched: [4:1.00]
-; SKYLAKE-NEXT: fmulp %st(2) # sched: [4:1.00]
-; SKYLAKE-NEXT: fimuls (%ecx) # sched: [14:1.00]
-; SKYLAKE-NEXT: fimull (%eax) # sched: [14:1.00]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fmulp_fimul:
-; SKX: # %bb.0:
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SKX-NEXT: #APP
-; SKX-NEXT: fmulp %st(1) # sched: [4:1.00]
-; SKX-NEXT: fmulp %st(2) # sched: [4:1.00]
-; SKX-NEXT: fimuls (%ecx) # sched: [14:1.00]
-; SKX-NEXT: fimull (%eax) # sched: [14:1.00]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fmulp_fimul:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fmulp %st(1) # sched: [5:1.00]
-; BDVER2-NEXT: fmulp %st(2) # sched: [5:1.00]
-; BDVER2-NEXT: fimuls (%ecx) # sched: [10:1.00]
-; BDVER2-NEXT: fimull (%eax) # sched: [10:1.00]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fmulp_fimul:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fmulp %st(1) # sched: [2:1.00]
-; BTVER2-NEXT: fmulp %st(2) # sched: [2:1.00]
-; BTVER2-NEXT: fimuls (%ecx) # sched: [7:1.00]
-; BTVER2-NEXT: fimull (%eax) # sched: [7:1.00]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fmulp_fimul:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [8:0.50]
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fmulp %st(1) # sched: [3:0.50]
-; ZNVER1-NEXT: fmulp %st(2) # sched: [3:0.50]
-; ZNVER1-NEXT: fimuls (%ecx) # sched: [10:0.50]
-; ZNVER1-NEXT: fimull (%eax) # sched: [10:0.50]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fmulp \0A\09 fmulp %st(2), %st(0) \0A\09 fimuls $0 \0A\09 fimull $1", "*m,*m"(i16 *%a0, i32 *%a1) nounwind
- ret void
-}
-
-define void @test_fnop() optsize {
-; GENERIC-LABEL: test_fnop:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fnop
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fnop:
-; ATOM: # %bb.0:
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fnop # sched: [1:0.50]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fnop:
-; SLM: # %bb.0:
-; SLM-NEXT: #APP
-; SLM-NEXT: fnop # sched: [1:0.50]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fnop:
-; SANDY: # %bb.0:
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fnop # sched: [1:1.00]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fnop:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fnop # sched: [1:0.50]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fnop:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fnop # sched: [1:0.50]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fnop:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fnop # sched: [1:0.50]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fnop:
-; SKX: # %bb.0:
-; SKX-NEXT: #APP
-; SKX-NEXT: fnop # sched: [1:0.50]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fnop:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fnop # sched: [1:0.50]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fnop:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fnop # sched: [1:0.50]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fnop:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fnop # sched: [1:1.00]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fnop", ""() nounwind
- ret void
-}
-
-define void @test_fpatan() optsize {
-; GENERIC-LABEL: test_fpatan:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fpatan
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fpatan:
-; ATOM: # %bb.0:
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fpatan # sched: [183:91.50]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fpatan:
-; SLM: # %bb.0:
-; SLM-NEXT: #APP
-; SLM-NEXT: fpatan # sched: [100:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fpatan:
-; SANDY: # %bb.0:
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fpatan # sched: [100:0.33]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fpatan:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fpatan # sched: [100:0.25]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fpatan:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fpatan # sched: [100:0.25]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fpatan:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fpatan # sched: [100:0.25]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fpatan:
-; SKX: # %bb.0:
-; SKX-NEXT: #APP
-; SKX-NEXT: fpatan # sched: [100:0.25]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fpatan:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fpatan # sched: [100:0.50]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fpatan:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fpatan # sched: [100:0.50]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fpatan:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fpatan # sched: [100:0.25]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fpatan", ""() nounwind
- ret void
-}
-
-define void @test_fprem_fprem1() optsize {
-; GENERIC-LABEL: test_fprem_fprem1:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fprem
-; GENERIC-NEXT: fprem1
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fprem_fprem1:
-; ATOM: # %bb.0:
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fprem # sched: [55:27.50]
-; ATOM-NEXT: fprem1 # sched: [71:35.50]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fprem_fprem1:
-; SLM: # %bb.0:
-; SLM-NEXT: #APP
-; SLM-NEXT: fprem # sched: [100:1.00]
-; SLM-NEXT: fprem1 # sched: [100:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fprem_fprem1:
-; SANDY: # %bb.0:
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fprem # sched: [100:0.33]
-; SANDY-NEXT: fprem1 # sched: [100:0.33]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fprem_fprem1:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fprem # sched: [19:7.00]
-; HASWELL-NEXT: fprem1 # sched: [27:10.25]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fprem_fprem1:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fprem # sched: [100:0.25]
-; BROADWELL-NEXT: fprem1 # sched: [100:0.25]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fprem_fprem1:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fprem # sched: [100:0.25]
-; SKYLAKE-NEXT: fprem1 # sched: [100:0.25]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fprem_fprem1:
-; SKX: # %bb.0:
-; SKX-NEXT: #APP
-; SKX-NEXT: fprem # sched: [100:0.25]
-; SKX-NEXT: fprem1 # sched: [100:0.25]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fprem_fprem1:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fprem # sched: [100:0.50]
-; BDVER2-NEXT: fprem1 # sched: [100:0.50]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fprem_fprem1:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fprem # sched: [100:0.50]
-; BTVER2-NEXT: fprem1 # sched: [100:0.50]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fprem_fprem1:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fprem # sched: [100:0.25]
-; ZNVER1-NEXT: fprem1 # sched: [100:0.25]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fprem \0A\09 fprem1", ""() nounwind
- ret void
-}
-
-define void @test_fptan() optsize {
-; GENERIC-LABEL: test_fptan:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fptan
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fptan:
-; ATOM: # %bb.0:
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fptan # sched: [168:84.00]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fptan:
-; SLM: # %bb.0:
-; SLM-NEXT: #APP
-; SLM-NEXT: fptan # sched: [100:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fptan:
-; SANDY: # %bb.0:
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fptan # sched: [100:0.33]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fptan:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fptan # sched: [100:0.25]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fptan:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fptan # sched: [100:0.25]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fptan:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fptan # sched: [100:0.25]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fptan:
-; SKX: # %bb.0:
-; SKX-NEXT: #APP
-; SKX-NEXT: fptan # sched: [100:0.25]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fptan:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fptan # sched: [100:0.50]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fptan:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fptan # sched: [100:0.50]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fptan:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fptan # sched: [100:0.25]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fptan", ""() nounwind
- ret void
-}
-
-define void @test_frndint() optsize {
-; GENERIC-LABEL: test_frndint:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: frndint
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_frndint:
-; ATOM: # %bb.0:
-; ATOM-NEXT: #APP
-; ATOM-NEXT: frndint # sched: [46:23.00]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_frndint:
-; SLM: # %bb.0:
-; SLM-NEXT: #APP
-; SLM-NEXT: frndint # sched: [100:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_frndint:
-; SANDY: # %bb.0:
-; SANDY-NEXT: #APP
-; SANDY-NEXT: frndint # sched: [100:0.33]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_frndint:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: frndint # sched: [11:4.25]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_frndint:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: frndint # sched: [100:0.25]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_frndint:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: frndint # sched: [100:0.25]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_frndint:
-; SKX: # %bb.0:
-; SKX-NEXT: #APP
-; SKX-NEXT: frndint # sched: [100:0.25]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_frndint:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: frndint # sched: [100:0.50]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_frndint:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: frndint # sched: [100:0.50]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_frndint:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: frndint # sched: [100:0.25]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "frndint", ""() nounwind
- ret void
-}
-
-define void @test_frstor(i8* %a0) optsize {
-; GENERIC-LABEL: test_frstor:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: frstor (%eax)
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_frstor:
-; ATOM: # %bb.0:
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
-; ATOM-NEXT: #APP
-; ATOM-NEXT: frstor (%eax) # sched: [100:0.50]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_frstor:
-; SLM: # %bb.0:
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; SLM-NEXT: #APP
-; SLM-NEXT: frstor (%eax) # sched: [100:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_frstor:
-; SANDY: # %bb.0:
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SANDY-NEXT: #APP
-; SANDY-NEXT: frstor (%eax) # sched: [100:0.33]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_frstor:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: frstor (%eax) # sched: [1:22.50]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_frstor:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: frstor (%eax) # sched: [100:0.25]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_frstor:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: frstor (%eax) # sched: [100:0.25]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_frstor:
-; SKX: # %bb.0:
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKX-NEXT: #APP
-; SKX-NEXT: frstor (%eax) # sched: [100:0.25]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_frstor:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: frstor (%eax) # sched: [100:0.50]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_frstor:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: frstor (%eax) # sched: [100:0.50]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_frstor:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: frstor (%eax) # sched: [100:0.25]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "frstor $0", "*m"(i8* %a0) nounwind
- ret void
-}
-
-define void @test_fsave(i8* %a0) optsize {
-; GENERIC-LABEL: test_fsave:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: wait
-; GENERIC-NEXT: fnsave (%eax)
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fsave:
-; ATOM: # %bb.0:
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
-; ATOM-NEXT: #APP
-; ATOM-NEXT: wait # sched: [1:0.50]
-; ATOM-NEXT: fnsave (%eax) # sched: [100:0.50]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fsave:
-; SLM: # %bb.0:
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; SLM-NEXT: #APP
-; SLM-NEXT: wait # sched: [100:1.00]
-; SLM-NEXT: fnsave (%eax) # sched: [100:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fsave:
-; SANDY: # %bb.0:
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SANDY-NEXT: #APP
-; SANDY-NEXT: wait # sched: [100:0.33]
-; SANDY-NEXT: fnsave (%eax) # sched: [100:0.33]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fsave:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: wait # sched: [2:0.50]
-; HASWELL-NEXT: fnsave (%eax) # sched: [1:36.75]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fsave:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: wait # sched: [2:0.50]
-; BROADWELL-NEXT: fnsave (%eax) # sched: [100:0.25]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fsave:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: wait # sched: [2:0.50]
-; SKYLAKE-NEXT: fnsave (%eax) # sched: [100:0.25]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fsave:
-; SKX: # %bb.0:
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKX-NEXT: #APP
-; SKX-NEXT: wait # sched: [2:0.50]
-; SKX-NEXT: fnsave (%eax) # sched: [100:0.25]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fsave:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: wait # sched: [100:0.50]
-; BDVER2-NEXT: fnsave (%eax) # sched: [100:0.50]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fsave:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: wait # sched: [100:0.50]
-; BTVER2-NEXT: fnsave (%eax) # sched: [100:0.50]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fsave:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: wait # sched: [1:1.00]
-; ZNVER1-NEXT: fnsave (%eax) # sched: [100:0.25]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fsave $0", "*m"(i8* %a0) nounwind
- ret void
-}
-
-define void @test_fnsave(i8* %a0) optsize {
-; GENERIC-LABEL: test_fnsave:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fnsave (%eax)
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fnsave:
-; ATOM: # %bb.0:
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fnsave (%eax) # sched: [100:0.50]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fnsave:
-; SLM: # %bb.0:
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; SLM-NEXT: #APP
-; SLM-NEXT: fnsave (%eax) # sched: [100:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fnsave:
-; SANDY: # %bb.0:
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fnsave (%eax) # sched: [100:0.33]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fnsave:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fnsave (%eax) # sched: [1:36.75]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fnsave:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fnsave (%eax) # sched: [100:0.25]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fnsave:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fnsave (%eax) # sched: [100:0.25]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fnsave:
-; SKX: # %bb.0:
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKX-NEXT: #APP
-; SKX-NEXT: fnsave (%eax) # sched: [100:0.25]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fnsave:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fnsave (%eax) # sched: [100:0.50]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fnsave:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fnsave (%eax) # sched: [100:0.50]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fnsave:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fnsave (%eax) # sched: [100:0.25]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fnsave $0", "*m"(i8* %a0) nounwind
- ret void
-}
-
-define void @test_fscale() optsize {
-; GENERIC-LABEL: test_fscale:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fscale
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fscale:
-; ATOM: # %bb.0:
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fscale # sched: [77:38.50]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fscale:
-; SLM: # %bb.0:
-; SLM-NEXT: #APP
-; SLM-NEXT: fscale # sched: [100:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fscale:
-; SANDY: # %bb.0:
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fscale # sched: [100:0.33]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fscale:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fscale # sched: [75:12.50]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fscale:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fscale # sched: [100:0.25]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fscale:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fscale # sched: [100:0.25]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fscale:
-; SKX: # %bb.0:
-; SKX-NEXT: #APP
-; SKX-NEXT: fscale # sched: [100:0.25]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fscale:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fscale # sched: [100:0.50]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fscale:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fscale # sched: [100:0.50]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fscale:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fscale # sched: [100:0.25]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fscale", ""() nounwind
- ret void
-}
-
-define void @test_fsin() optsize {
-; GENERIC-LABEL: test_fsin:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fsin
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fsin:
-; ATOM: # %bb.0:
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fsin # sched: [174:87.00]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fsin:
-; SLM: # %bb.0:
-; SLM-NEXT: #APP
-; SLM-NEXT: fsin # sched: [100:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fsin:
-; SANDY: # %bb.0:
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fsin # sched: [100:0.33]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fsin:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fsin # sched: [100:0.25]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fsin:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fsin # sched: [100:0.25]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fsin:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fsin # sched: [100:0.25]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fsin:
-; SKX: # %bb.0:
-; SKX-NEXT: #APP
-; SKX-NEXT: fsin # sched: [100:0.25]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fsin:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fsin # sched: [100:0.50]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fsin:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fsin # sched: [100:0.50]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fsin:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fsin # sched: [100:0.25]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fsin", ""() nounwind
- ret void
-}
-
-define void @test_fsincos() optsize {
-; GENERIC-LABEL: test_fsincos:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fsincos
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fsincos:
-; ATOM: # %bb.0:
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fsincos # sched: [174:87.00]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fsincos:
-; SLM: # %bb.0:
-; SLM-NEXT: #APP
-; SLM-NEXT: fsincos # sched: [100:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fsincos:
-; SANDY: # %bb.0:
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fsincos # sched: [100:0.33]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fsincos:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fsincos # sched: [100:0.25]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fsincos:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fsincos # sched: [100:0.25]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fsincos:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fsincos # sched: [100:0.25]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fsincos:
-; SKX: # %bb.0:
-; SKX-NEXT: #APP
-; SKX-NEXT: fsincos # sched: [100:0.25]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fsincos:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fsincos # sched: [100:0.50]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fsincos:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fsincos # sched: [100:0.50]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fsincos:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fsincos # sched: [100:0.25]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fsincos", ""() nounwind
- ret void
-}
-
-define void @test_fsqrt() optsize {
-; GENERIC-LABEL: test_fsqrt:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fsqrt
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fsqrt:
-; ATOM: # %bb.0:
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fsqrt # sched: [71:35.50]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fsqrt:
-; SLM: # %bb.0:
-; SLM-NEXT: #APP
-; SLM-NEXT: fsqrt # sched: [40:40.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fsqrt:
-; SANDY: # %bb.0:
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fsqrt # sched: [24:24.00]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fsqrt:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fsqrt # sched: [23:17.00]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fsqrt:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fsqrt # sched: [23:9.00]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fsqrt:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fsqrt # sched: [21:7.00]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fsqrt:
-; SKX: # %bb.0:
-; SKX-NEXT: #APP
-; SKX-NEXT: fsqrt # sched: [21:7.00]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fsqrt:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fsqrt # sched: [1:17.50]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fsqrt:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fsqrt # sched: [35:35.00]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fsqrt:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fsqrt # sched: [20:20.00]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fsqrt", ""() nounwind
- ret void
-}
-
-define void @test_fst_fstp(i16* %a0, i32* %a1, i64 *%a2) optsize {
-; GENERIC-LABEL: test_fst_fstp:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %edx
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fst %st(0)
-; GENERIC-NEXT: fsts (%edx)
-; GENERIC-NEXT: fstl (%ecx)
-; GENERIC-NEXT: fstp %st(0)
-; GENERIC-NEXT: fstpl (%edx)
-; GENERIC-NEXT: fstpl (%ecx)
-; GENERIC-NEXT: fstpt (%eax)
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fst_fstp:
-; ATOM: # %bb.0:
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:1.00]
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [1:1.00]
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fst %st(0) # sched: [2:1.00]
-; ATOM-NEXT: fsts (%edx) # sched: [2:1.00]
-; ATOM-NEXT: fstl (%ecx) # sched: [2:1.00]
-; ATOM-NEXT: fstp %st(0) # sched: [2:1.00]
-; ATOM-NEXT: fstpl (%edx) # sched: [2:1.00]
-; ATOM-NEXT: fstpl (%ecx) # sched: [2:1.00]
-; ATOM-NEXT: fstpt (%eax) # sched: [5:2.50]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fst_fstp:
-; SLM: # %bb.0:
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [3:1.00]
-; SLM-NEXT: #APP
-; SLM-NEXT: fst %st(0) # sched: [1:0.50]
-; SLM-NEXT: fsts (%edx) # sched: [1:1.00]
-; SLM-NEXT: fstl (%ecx) # sched: [1:1.00]
-; SLM-NEXT: fstp %st(0) # sched: [1:0.50]
-; SLM-NEXT: fstpl (%edx) # sched: [1:1.00]
-; SLM-NEXT: fstpl (%ecx) # sched: [1:1.00]
-; SLM-NEXT: fstpt (%eax) # sched: [1:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fst_fstp:
-; SANDY: # %bb.0:
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:0.50]
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fst %st(0) # sched: [1:1.00]
-; SANDY-NEXT: fsts (%edx) # sched: [6:1.00]
-; SANDY-NEXT: fstl (%ecx) # sched: [6:1.00]
-; SANDY-NEXT: fstp %st(0) # sched: [1:1.00]
-; SANDY-NEXT: fstpl (%edx) # sched: [6:1.00]
-; SANDY-NEXT: fstpl (%ecx) # sched: [6:1.00]
-; SANDY-NEXT: fstpt (%eax) # sched: [6:1.00]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fst_fstp:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:0.50]
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fst %st(0) # sched: [1:0.50]
-; HASWELL-NEXT: fsts (%edx) # sched: [1:1.00]
-; HASWELL-NEXT: fstl (%ecx) # sched: [1:1.00]
-; HASWELL-NEXT: fstp %st(0) # sched: [1:0.50]
-; HASWELL-NEXT: fstpl (%edx) # sched: [1:1.00]
-; HASWELL-NEXT: fstpl (%ecx) # sched: [1:1.00]
-; HASWELL-NEXT: fstpt (%eax) # sched: [1:1.00]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fst_fstp:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:0.50]
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fst %st(0) # sched: [1:0.25]
-; BROADWELL-NEXT: fsts (%edx) # sched: [1:1.00]
-; BROADWELL-NEXT: fstl (%ecx) # sched: [1:1.00]
-; BROADWELL-NEXT: fstp %st(0) # sched: [1:0.25]
-; BROADWELL-NEXT: fstpl (%edx) # sched: [1:1.00]
-; BROADWELL-NEXT: fstpl (%ecx) # sched: [1:1.00]
-; BROADWELL-NEXT: fstpt (%eax) # sched: [1:1.00]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fst_fstp:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:0.50]
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fst %st(0) # sched: [1:0.25]
-; SKYLAKE-NEXT: fsts (%edx) # sched: [1:1.00]
-; SKYLAKE-NEXT: fstl (%ecx) # sched: [1:1.00]
-; SKYLAKE-NEXT: fstp %st(0) # sched: [1:0.25]
-; SKYLAKE-NEXT: fstpl (%edx) # sched: [1:1.00]
-; SKYLAKE-NEXT: fstpl (%ecx) # sched: [1:1.00]
-; SKYLAKE-NEXT: fstpt (%eax) # sched: [1:1.00]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fst_fstp:
-; SKX: # %bb.0:
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:0.50]
-; SKX-NEXT: #APP
-; SKX-NEXT: fst %st(0) # sched: [1:0.25]
-; SKX-NEXT: fsts (%edx) # sched: [1:1.00]
-; SKX-NEXT: fstl (%ecx) # sched: [1:1.00]
-; SKX-NEXT: fstp %st(0) # sched: [1:0.25]
-; SKX-NEXT: fstpl (%edx) # sched: [1:1.00]
-; SKX-NEXT: fstpl (%ecx) # sched: [1:1.00]
-; SKX-NEXT: fstpt (%eax) # sched: [1:1.00]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fst_fstp:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:0.50]
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fst %st(0) # sched: [1:0.50]
-; BDVER2-NEXT: fsts (%edx) # sched: [1:1.00]
-; BDVER2-NEXT: fstl (%ecx) # sched: [1:1.00]
-; BDVER2-NEXT: fstp %st(0) # sched: [1:0.50]
-; BDVER2-NEXT: fstpl (%edx) # sched: [1:1.00]
-; BDVER2-NEXT: fstpl (%ecx) # sched: [1:1.00]
-; BDVER2-NEXT: fstpt (%eax) # sched: [1:1.00]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fst_fstp:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [3:1.00]
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fst %st(0) # sched: [1:0.50]
-; BTVER2-NEXT: fsts (%edx) # sched: [1:1.00]
-; BTVER2-NEXT: fstl (%ecx) # sched: [1:1.00]
-; BTVER2-NEXT: fstp %st(0) # sched: [1:0.50]
-; BTVER2-NEXT: fstpl (%edx) # sched: [1:1.00]
-; BTVER2-NEXT: fstpl (%ecx) # sched: [1:1.00]
-; BTVER2-NEXT: fstpt (%eax) # sched: [1:1.00]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fst_fstp:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [8:0.50]
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [8:0.50]
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fst %st(0) # sched: [5:0.50]
-; ZNVER1-NEXT: fsts (%edx) # sched: [1:0.50]
-; ZNVER1-NEXT: fstl (%ecx) # sched: [1:0.50]
-; ZNVER1-NEXT: fstp %st(0) # sched: [5:0.50]
-; ZNVER1-NEXT: fstpl (%edx) # sched: [1:0.50]
-; ZNVER1-NEXT: fstpl (%ecx) # sched: [1:0.50]
-; ZNVER1-NEXT: fstpt (%eax) # sched: [5:0.50]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fst %st(0) \0A\09 fsts $0 \0A\09 fstl $1 \0A\09 fstp %st(0) \0A\09 fstpl $0 \0A\09 fstpl $1 \0A\09 fstpt $2", "*m,*m,*m"(i16* %a0, i32* %a1, i64 *%a2) nounwind
- ret void
-}
-
-define void @test_fstcw_fstenv_fstsw(i8* %a0) optsize {
-; GENERIC-LABEL: test_fstcw_fstenv_fstsw:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: wait
-; GENERIC-NEXT: fnstcw (%eax)
-; GENERIC-NEXT: wait
-; GENERIC-NEXT: fnstenv (%eax)
-; GENERIC-NEXT: wait
-; GENERIC-NEXT: fnstsw (%eax)
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fstcw_fstenv_fstsw:
-; ATOM: # %bb.0:
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
-; ATOM-NEXT: #APP
-; ATOM-NEXT: wait # sched: [1:0.50]
-; ATOM-NEXT: fnstcw (%eax) # sched: [8:4.00]
-; ATOM-NEXT: wait # sched: [1:0.50]
-; ATOM-NEXT: fnstenv (%eax) # sched: [100:0.50]
-; ATOM-NEXT: wait # sched: [1:0.50]
-; ATOM-NEXT: fnstsw (%eax) # sched: [100:0.50]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fstcw_fstenv_fstsw:
-; SLM: # %bb.0:
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; SLM-NEXT: #APP
-; SLM-NEXT: wait # sched: [100:1.00]
-; SLM-NEXT: fnstcw (%eax) # sched: [1:0.50]
-; SLM-NEXT: wait # sched: [100:1.00]
-; SLM-NEXT: fnstenv (%eax) # sched: [100:1.00]
-; SLM-NEXT: wait # sched: [100:1.00]
-; SLM-NEXT: fnstsw (%eax) # sched: [100:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fstcw_fstenv_fstsw:
-; SANDY: # %bb.0:
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SANDY-NEXT: #APP
-; SANDY-NEXT: wait # sched: [100:0.33]
-; SANDY-NEXT: fnstcw (%eax) # sched: [7:1.00]
-; SANDY-NEXT: wait # sched: [100:0.33]
-; SANDY-NEXT: fnstenv (%eax) # sched: [100:0.33]
-; SANDY-NEXT: wait # sched: [100:0.33]
-; SANDY-NEXT: fnstsw (%eax) # sched: [7:1.00]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fstcw_fstenv_fstsw:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: wait # sched: [2:0.50]
-; HASWELL-NEXT: fnstcw (%eax) # sched: [2:1.00]
-; HASWELL-NEXT: wait # sched: [2:0.50]
-; HASWELL-NEXT: fnstenv (%eax) # sched: [115:19.50]
-; HASWELL-NEXT: wait # sched: [2:0.50]
-; HASWELL-NEXT: fnstsw (%eax) # sched: [4:1.00]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fstcw_fstenv_fstsw:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: wait # sched: [2:0.50]
-; BROADWELL-NEXT: fnstcw (%eax) # sched: [2:1.00]
-; BROADWELL-NEXT: wait # sched: [2:0.50]
-; BROADWELL-NEXT: fnstenv (%eax) # sched: [115:19.50]
-; BROADWELL-NEXT: wait # sched: [2:0.50]
-; BROADWELL-NEXT: fnstsw (%eax) # sched: [4:1.00]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fstcw_fstenv_fstsw:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: wait # sched: [2:0.50]
-; SKYLAKE-NEXT: fnstcw (%eax) # sched: [2:1.00]
-; SKYLAKE-NEXT: wait # sched: [2:0.50]
-; SKYLAKE-NEXT: fnstenv (%eax) # sched: [106:19.50]
-; SKYLAKE-NEXT: wait # sched: [2:0.50]
-; SKYLAKE-NEXT: fnstsw (%eax) # sched: [3:1.00]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fstcw_fstenv_fstsw:
-; SKX: # %bb.0:
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKX-NEXT: #APP
-; SKX-NEXT: wait # sched: [2:0.50]
-; SKX-NEXT: fnstcw (%eax) # sched: [2:1.00]
-; SKX-NEXT: wait # sched: [2:0.50]
-; SKX-NEXT: fnstenv (%eax) # sched: [106:19.50]
-; SKX-NEXT: wait # sched: [2:0.50]
-; SKX-NEXT: fnstsw (%eax) # sched: [3:1.00]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fstcw_fstenv_fstsw:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: wait # sched: [100:0.50]
-; BDVER2-NEXT: fnstcw (%eax) # sched: [1:0.50]
-; BDVER2-NEXT: wait # sched: [100:0.50]
-; BDVER2-NEXT: fnstenv (%eax) # sched: [100:0.50]
-; BDVER2-NEXT: wait # sched: [100:0.50]
-; BDVER2-NEXT: fnstsw (%eax) # sched: [100:0.50]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fstcw_fstenv_fstsw:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: wait # sched: [100:0.50]
-; BTVER2-NEXT: fnstcw (%eax) # sched: [1:0.50]
-; BTVER2-NEXT: wait # sched: [100:0.50]
-; BTVER2-NEXT: fnstenv (%eax) # sched: [100:0.50]
-; BTVER2-NEXT: wait # sched: [100:0.50]
-; BTVER2-NEXT: fnstsw (%eax) # sched: [100:0.50]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fstcw_fstenv_fstsw:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: wait # sched: [1:1.00]
-; ZNVER1-NEXT: fnstcw (%eax) # sched: [100:0.25]
-; ZNVER1-NEXT: wait # sched: [1:1.00]
-; ZNVER1-NEXT: fnstenv (%eax) # sched: [100:0.25]
-; ZNVER1-NEXT: wait # sched: [1:1.00]
-; ZNVER1-NEXT: fnstsw (%eax) # sched: [100:0.25]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fstcw $0 \0A\09 fstenv $0 \0A\09 fstsw $0", "*m"(i8* %a0) nounwind
- ret void
-}
-
-define void @test_fnstcw_fnstenv_fnstsw(i8* %a0) optsize {
-; GENERIC-LABEL: test_fnstcw_fnstenv_fnstsw:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fnstcw (%eax)
-; GENERIC-NEXT: fnstenv (%eax)
-; GENERIC-NEXT: fnstsw (%eax)
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fnstcw_fnstenv_fnstsw:
-; ATOM: # %bb.0:
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fnstcw (%eax) # sched: [8:4.00]
-; ATOM-NEXT: fnstenv (%eax) # sched: [100:0.50]
-; ATOM-NEXT: fnstsw (%eax) # sched: [100:0.50]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fnstcw_fnstenv_fnstsw:
-; SLM: # %bb.0:
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; SLM-NEXT: #APP
-; SLM-NEXT: fnstcw (%eax) # sched: [1:0.50]
-; SLM-NEXT: fnstenv (%eax) # sched: [100:1.00]
-; SLM-NEXT: fnstsw (%eax) # sched: [100:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fnstcw_fnstenv_fnstsw:
-; SANDY: # %bb.0:
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fnstcw (%eax) # sched: [7:1.00]
-; SANDY-NEXT: fnstenv (%eax) # sched: [100:0.33]
-; SANDY-NEXT: fnstsw (%eax) # sched: [7:1.00]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fnstcw_fnstenv_fnstsw:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fnstcw (%eax) # sched: [2:1.00]
-; HASWELL-NEXT: fnstenv (%eax) # sched: [115:19.50]
-; HASWELL-NEXT: fnstsw (%eax) # sched: [4:1.00]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fnstcw_fnstenv_fnstsw:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fnstcw (%eax) # sched: [2:1.00]
-; BROADWELL-NEXT: fnstenv (%eax) # sched: [115:19.50]
-; BROADWELL-NEXT: fnstsw (%eax) # sched: [4:1.00]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fnstcw_fnstenv_fnstsw:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fnstcw (%eax) # sched: [2:1.00]
-; SKYLAKE-NEXT: fnstenv (%eax) # sched: [106:19.50]
-; SKYLAKE-NEXT: fnstsw (%eax) # sched: [3:1.00]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fnstcw_fnstenv_fnstsw:
-; SKX: # %bb.0:
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKX-NEXT: #APP
-; SKX-NEXT: fnstcw (%eax) # sched: [2:1.00]
-; SKX-NEXT: fnstenv (%eax) # sched: [106:19.50]
-; SKX-NEXT: fnstsw (%eax) # sched: [3:1.00]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fnstcw_fnstenv_fnstsw:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fnstcw (%eax) # sched: [1:0.50]
-; BDVER2-NEXT: fnstenv (%eax) # sched: [100:0.50]
-; BDVER2-NEXT: fnstsw (%eax) # sched: [100:0.50]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fnstcw_fnstenv_fnstsw:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fnstcw (%eax) # sched: [1:0.50]
-; BTVER2-NEXT: fnstenv (%eax) # sched: [100:0.50]
-; BTVER2-NEXT: fnstsw (%eax) # sched: [100:0.50]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fnstcw_fnstenv_fnstsw:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fnstcw (%eax) # sched: [100:0.25]
-; ZNVER1-NEXT: fnstenv (%eax) # sched: [100:0.25]
-; ZNVER1-NEXT: fnstsw (%eax) # sched: [100:0.25]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fnstcw $0 \0A\09 fnstenv $0 \0A\09 fnstsw $0", "*m"(i8* %a0) nounwind
- ret void
-}
-
-define void @test_fsub(float *%a0, double *%a1) optsize {
-; GENERIC-LABEL: test_fsub:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fsub %st, %st(1)
-; GENERIC-NEXT: fsub %st(2)
-; GENERIC-NEXT: fsubs (%ecx)
-; GENERIC-NEXT: fsubl (%eax)
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fsub:
-; ATOM: # %bb.0:
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:1.00]
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fsub %st, %st(1) # sched: [5:5.00]
-; ATOM-NEXT: fsub %st(2) # sched: [5:5.00]
-; ATOM-NEXT: fsubs (%ecx) # sched: [5:5.00]
-; ATOM-NEXT: fsubl (%eax) # sched: [5:5.00]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fsub:
-; SLM: # %bb.0:
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
-; SLM-NEXT: #APP
-; SLM-NEXT: fsub %st, %st(1) # sched: [3:1.00]
-; SLM-NEXT: fsub %st(2) # sched: [3:1.00]
-; SLM-NEXT: fsubs (%ecx) # sched: [6:1.00]
-; SLM-NEXT: fsubl (%eax) # sched: [6:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fsub:
-; SANDY: # %bb.0:
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fsub %st, %st(1) # sched: [3:1.00]
-; SANDY-NEXT: fsub %st(2) # sched: [3:1.00]
-; SANDY-NEXT: fsubs (%ecx) # sched: [10:1.00]
-; SANDY-NEXT: fsubl (%eax) # sched: [10:1.00]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fsub:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fsub %st, %st(1) # sched: [3:1.00]
-; HASWELL-NEXT: fsub %st(2) # sched: [3:1.00]
-; HASWELL-NEXT: fsubs (%ecx) # sched: [10:1.00]
-; HASWELL-NEXT: fsubl (%eax) # sched: [10:1.00]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fsub:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fsub %st, %st(1) # sched: [3:1.00]
-; BROADWELL-NEXT: fsub %st(2) # sched: [3:1.00]
-; BROADWELL-NEXT: fsubs (%ecx) # sched: [9:1.00]
-; BROADWELL-NEXT: fsubl (%eax) # sched: [9:1.00]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fsub:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fsub %st, %st(1) # sched: [3:1.00]
-; SKYLAKE-NEXT: fsub %st(2) # sched: [3:1.00]
-; SKYLAKE-NEXT: fsubs (%ecx) # sched: [10:1.00]
-; SKYLAKE-NEXT: fsubl (%eax) # sched: [10:1.00]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fsub:
-; SKX: # %bb.0:
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SKX-NEXT: #APP
-; SKX-NEXT: fsub %st, %st(1) # sched: [3:1.00]
-; SKX-NEXT: fsub %st(2) # sched: [3:1.00]
-; SKX-NEXT: fsubs (%ecx) # sched: [10:1.00]
-; SKX-NEXT: fsubl (%eax) # sched: [10:1.00]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fsub:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fsub %st, %st(1) # sched: [5:1.00]
-; BDVER2-NEXT: fsub %st(2) # sched: [5:1.00]
-; BDVER2-NEXT: fsubs (%ecx) # sched: [10:1.00]
-; BDVER2-NEXT: fsubl (%eax) # sched: [10:1.00]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fsub:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fsub %st, %st(1) # sched: [3:1.00]
-; BTVER2-NEXT: fsub %st(2) # sched: [3:1.00]
-; BTVER2-NEXT: fsubs (%ecx) # sched: [8:1.00]
-; BTVER2-NEXT: fsubl (%eax) # sched: [8:1.00]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fsub:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [8:0.50]
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fsub %st, %st(1) # sched: [3:1.00]
-; ZNVER1-NEXT: fsub %st(2) # sched: [3:1.00]
-; ZNVER1-NEXT: fsubs (%ecx) # sched: [10:1.00]
-; ZNVER1-NEXT: fsubl (%eax) # sched: [10:1.00]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fsub %st(0), %st(1) \0A\09 fsub %st(2), %st(0) \0A\09 fsubs $0 \0A\09 fsubl $1", "*m,*m"(float *%a0, double *%a1) nounwind
- ret void
-}
-
-define void @test_fsubp_fisub(i16 *%a0, i32 *%a1) optsize {
-; GENERIC-LABEL: test_fsubp_fisub:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fsubp %st(1)
-; GENERIC-NEXT: fsubp %st(2)
-; GENERIC-NEXT: fisubs (%ecx)
-; GENERIC-NEXT: fisubl (%eax)
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fsubp_fisub:
-; ATOM: # %bb.0:
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:1.00]
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fsubp %st(1) # sched: [5:5.00]
-; ATOM-NEXT: fsubp %st(2) # sched: [5:5.00]
-; ATOM-NEXT: fisubs (%ecx) # sched: [5:5.00]
-; ATOM-NEXT: fisubl (%eax) # sched: [5:5.00]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fsubp_fisub:
-; SLM: # %bb.0:
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
-; SLM-NEXT: #APP
-; SLM-NEXT: fsubp %st(1) # sched: [3:1.00]
-; SLM-NEXT: fsubp %st(2) # sched: [3:1.00]
-; SLM-NEXT: fisubs (%ecx) # sched: [6:1.00]
-; SLM-NEXT: fisubl (%eax) # sched: [6:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fsubp_fisub:
-; SANDY: # %bb.0:
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fsubp %st(1) # sched: [3:1.00]
-; SANDY-NEXT: fsubp %st(2) # sched: [3:1.00]
-; SANDY-NEXT: fisubs (%ecx) # sched: [13:2.00]
-; SANDY-NEXT: fisubl (%eax) # sched: [13:2.00]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fsubp_fisub:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fsubp %st(1) # sched: [3:1.00]
-; HASWELL-NEXT: fsubp %st(2) # sched: [3:1.00]
-; HASWELL-NEXT: fisubs (%ecx) # sched: [13:2.00]
-; HASWELL-NEXT: fisubl (%eax) # sched: [13:2.00]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fsubp_fisub:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fsubp %st(1) # sched: [3:1.00]
-; BROADWELL-NEXT: fsubp %st(2) # sched: [3:1.00]
-; BROADWELL-NEXT: fisubs (%ecx) # sched: [12:2.00]
-; BROADWELL-NEXT: fisubl (%eax) # sched: [12:2.00]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fsubp_fisub:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fsubp %st(1) # sched: [3:1.00]
-; SKYLAKE-NEXT: fsubp %st(2) # sched: [3:1.00]
-; SKYLAKE-NEXT: fisubs (%ecx) # sched: [13:2.00]
-; SKYLAKE-NEXT: fisubl (%eax) # sched: [13:2.00]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fsubp_fisub:
-; SKX: # %bb.0:
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SKX-NEXT: #APP
-; SKX-NEXT: fsubp %st(1) # sched: [3:1.00]
-; SKX-NEXT: fsubp %st(2) # sched: [3:1.00]
-; SKX-NEXT: fisubs (%ecx) # sched: [13:2.00]
-; SKX-NEXT: fisubl (%eax) # sched: [13:2.00]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fsubp_fisub:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fsubp %st(1) # sched: [5:1.00]
-; BDVER2-NEXT: fsubp %st(2) # sched: [5:1.00]
-; BDVER2-NEXT: fisubs (%ecx) # sched: [10:1.00]
-; BDVER2-NEXT: fisubl (%eax) # sched: [10:1.00]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fsubp_fisub:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fsubp %st(1) # sched: [3:1.00]
-; BTVER2-NEXT: fsubp %st(2) # sched: [3:1.00]
-; BTVER2-NEXT: fisubs (%ecx) # sched: [8:1.00]
-; BTVER2-NEXT: fisubl (%eax) # sched: [8:1.00]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fsubp_fisub:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [8:0.50]
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fsubp %st(1) # sched: [3:1.00]
-; ZNVER1-NEXT: fsubp %st(2) # sched: [3:1.00]
-; ZNVER1-NEXT: fisubs (%ecx) # sched: [10:1.00]
-; ZNVER1-NEXT: fisubl (%eax) # sched: [10:1.00]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fsubp \0A\09 fsubp %st(2), %st(0) \0A\09 fisubs $0 \0A\09 fisubl $1", "*m,*m"(i16 *%a0, i32 *%a1) nounwind
- ret void
-}
-
-define void @test_fsubr(float *%a0, double *%a1) optsize {
-; GENERIC-LABEL: test_fsubr:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fsubr %st, %st(1)
-; GENERIC-NEXT: fsubr %st(2)
-; GENERIC-NEXT: fsubrs (%ecx)
-; GENERIC-NEXT: fsubrl (%eax)
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fsubr:
-; ATOM: # %bb.0:
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:1.00]
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fsubr %st, %st(1) # sched: [5:5.00]
-; ATOM-NEXT: fsubr %st(2) # sched: [5:5.00]
-; ATOM-NEXT: fsubrs (%ecx) # sched: [5:5.00]
-; ATOM-NEXT: fsubrl (%eax) # sched: [5:5.00]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fsubr:
-; SLM: # %bb.0:
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
-; SLM-NEXT: #APP
-; SLM-NEXT: fsubr %st, %st(1) # sched: [3:1.00]
-; SLM-NEXT: fsubr %st(2) # sched: [3:1.00]
-; SLM-NEXT: fsubrs (%ecx) # sched: [6:1.00]
-; SLM-NEXT: fsubrl (%eax) # sched: [6:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fsubr:
-; SANDY: # %bb.0:
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fsubr %st, %st(1) # sched: [3:1.00]
-; SANDY-NEXT: fsubr %st(2) # sched: [3:1.00]
-; SANDY-NEXT: fsubrs (%ecx) # sched: [10:1.00]
-; SANDY-NEXT: fsubrl (%eax) # sched: [10:1.00]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fsubr:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fsubr %st, %st(1) # sched: [3:1.00]
-; HASWELL-NEXT: fsubr %st(2) # sched: [3:1.00]
-; HASWELL-NEXT: fsubrs (%ecx) # sched: [10:1.00]
-; HASWELL-NEXT: fsubrl (%eax) # sched: [10:1.00]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fsubr:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fsubr %st, %st(1) # sched: [3:1.00]
-; BROADWELL-NEXT: fsubr %st(2) # sched: [3:1.00]
-; BROADWELL-NEXT: fsubrs (%ecx) # sched: [9:1.00]
-; BROADWELL-NEXT: fsubrl (%eax) # sched: [9:1.00]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fsubr:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fsubr %st, %st(1) # sched: [3:1.00]
-; SKYLAKE-NEXT: fsubr %st(2) # sched: [3:1.00]
-; SKYLAKE-NEXT: fsubrs (%ecx) # sched: [10:1.00]
-; SKYLAKE-NEXT: fsubrl (%eax) # sched: [10:1.00]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fsubr:
-; SKX: # %bb.0:
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SKX-NEXT: #APP
-; SKX-NEXT: fsubr %st, %st(1) # sched: [3:1.00]
-; SKX-NEXT: fsubr %st(2) # sched: [3:1.00]
-; SKX-NEXT: fsubrs (%ecx) # sched: [10:1.00]
-; SKX-NEXT: fsubrl (%eax) # sched: [10:1.00]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fsubr:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fsubr %st, %st(1) # sched: [5:1.00]
-; BDVER2-NEXT: fsubr %st(2) # sched: [5:1.00]
-; BDVER2-NEXT: fsubrs (%ecx) # sched: [10:1.00]
-; BDVER2-NEXT: fsubrl (%eax) # sched: [10:1.00]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fsubr:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fsubr %st, %st(1) # sched: [3:1.00]
-; BTVER2-NEXT: fsubr %st(2) # sched: [3:1.00]
-; BTVER2-NEXT: fsubrs (%ecx) # sched: [8:1.00]
-; BTVER2-NEXT: fsubrl (%eax) # sched: [8:1.00]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fsubr:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [8:0.50]
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fsubr %st, %st(1) # sched: [3:1.00]
-; ZNVER1-NEXT: fsubr %st(2) # sched: [3:1.00]
-; ZNVER1-NEXT: fsubrs (%ecx) # sched: [10:1.00]
-; ZNVER1-NEXT: fsubrl (%eax) # sched: [10:1.00]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fsubr %st(0), %st(1) \0A\09 fsubr %st(2), %st(0) \0A\09 fsubrs $0 \0A\09 fsubrl $1", "*m,*m"(float *%a0, double *%a1) nounwind
- ret void
-}
-
-define void @test_fsubrp_fisubr(i16 *%a0, i32 *%a1) optsize {
-; GENERIC-LABEL: test_fsubrp_fisubr:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fsubrp %st(1)
-; GENERIC-NEXT: fsubrp %st(2)
-; GENERIC-NEXT: fisubrs (%ecx)
-; GENERIC-NEXT: fisubrl (%eax)
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fsubrp_fisubr:
-; ATOM: # %bb.0:
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:1.00]
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fsubrp %st(1) # sched: [5:5.00]
-; ATOM-NEXT: fsubrp %st(2) # sched: [5:5.00]
-; ATOM-NEXT: fisubrs (%ecx) # sched: [5:5.00]
-; ATOM-NEXT: fisubrl (%eax) # sched: [5:5.00]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fsubrp_fisubr:
-; SLM: # %bb.0:
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
-; SLM-NEXT: #APP
-; SLM-NEXT: fsubrp %st(1) # sched: [3:1.00]
-; SLM-NEXT: fsubrp %st(2) # sched: [3:1.00]
-; SLM-NEXT: fisubrs (%ecx) # sched: [6:1.00]
-; SLM-NEXT: fisubrl (%eax) # sched: [6:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fsubrp_fisubr:
-; SANDY: # %bb.0:
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fsubrp %st(1) # sched: [3:1.00]
-; SANDY-NEXT: fsubrp %st(2) # sched: [3:1.00]
-; SANDY-NEXT: fisubrs (%ecx) # sched: [13:2.00]
-; SANDY-NEXT: fisubrl (%eax) # sched: [13:2.00]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fsubrp_fisubr:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fsubrp %st(1) # sched: [3:1.00]
-; HASWELL-NEXT: fsubrp %st(2) # sched: [3:1.00]
-; HASWELL-NEXT: fisubrs (%ecx) # sched: [13:2.00]
-; HASWELL-NEXT: fisubrl (%eax) # sched: [13:2.00]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fsubrp_fisubr:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fsubrp %st(1) # sched: [3:1.00]
-; BROADWELL-NEXT: fsubrp %st(2) # sched: [3:1.00]
-; BROADWELL-NEXT: fisubrs (%ecx) # sched: [12:2.00]
-; BROADWELL-NEXT: fisubrl (%eax) # sched: [12:2.00]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fsubrp_fisubr:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fsubrp %st(1) # sched: [3:1.00]
-; SKYLAKE-NEXT: fsubrp %st(2) # sched: [3:1.00]
-; SKYLAKE-NEXT: fisubrs (%ecx) # sched: [13:2.00]
-; SKYLAKE-NEXT: fisubrl (%eax) # sched: [13:2.00]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fsubrp_fisubr:
-; SKX: # %bb.0:
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; SKX-NEXT: #APP
-; SKX-NEXT: fsubrp %st(1) # sched: [3:1.00]
-; SKX-NEXT: fsubrp %st(2) # sched: [3:1.00]
-; SKX-NEXT: fisubrs (%ecx) # sched: [13:2.00]
-; SKX-NEXT: fisubrl (%eax) # sched: [13:2.00]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fsubrp_fisubr:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fsubrp %st(1) # sched: [5:1.00]
-; BDVER2-NEXT: fsubrp %st(2) # sched: [5:1.00]
-; BDVER2-NEXT: fisubrs (%ecx) # sched: [10:1.00]
-; BDVER2-NEXT: fisubrl (%eax) # sched: [10:1.00]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fsubrp_fisubr:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fsubrp %st(1) # sched: [3:1.00]
-; BTVER2-NEXT: fsubrp %st(2) # sched: [3:1.00]
-; BTVER2-NEXT: fisubrs (%ecx) # sched: [8:1.00]
-; BTVER2-NEXT: fisubrl (%eax) # sched: [8:1.00]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fsubrp_fisubr:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [8:0.50]
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fsubrp %st(1) # sched: [3:1.00]
-; ZNVER1-NEXT: fsubrp %st(2) # sched: [3:1.00]
-; ZNVER1-NEXT: fisubrs (%ecx) # sched: [10:1.00]
-; ZNVER1-NEXT: fisubrl (%eax) # sched: [10:1.00]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fsubrp \0A\09 fsubrp %st(2), %st(0) \0A\09 fisubrs $0 \0A\09 fisubrl $1", "*m,*m"(i16 *%a0, i32 *%a1) nounwind
- ret void
-}
-
-define void @test_ftst() optsize {
-; GENERIC-LABEL: test_ftst:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: ftst
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_ftst:
-; ATOM: # %bb.0:
-; ATOM-NEXT: #APP
-; ATOM-NEXT: ftst # sched: [9:4.50]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_ftst:
-; SLM: # %bb.0:
-; SLM-NEXT: #APP
-; SLM-NEXT: ftst # sched: [3:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_ftst:
-; SANDY: # %bb.0:
-; SANDY-NEXT: #APP
-; SANDY-NEXT: ftst # sched: [3:1.00]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_ftst:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: ftst # sched: [1:1.00]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_ftst:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: ftst # sched: [3:1.00]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_ftst:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: ftst # sched: [2:1.00]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_ftst:
-; SKX: # %bb.0:
-; SKX-NEXT: #APP
-; SKX-NEXT: ftst # sched: [2:1.00]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_ftst:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: ftst # sched: [1:1.00]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_ftst:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: ftst # sched: [3:1.00]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_ftst:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: ftst # sched: [1:1.00]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "ftst", ""() nounwind
- ret void
-}
-
-define void @test_fucom_fucomp_fucompp() optsize {
-; GENERIC-LABEL: test_fucom_fucomp_fucompp:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fucom %st(1)
-; GENERIC-NEXT: fucom %st(3)
-; GENERIC-NEXT: fucomp %st(1)
-; GENERIC-NEXT: fucomp %st(3)
-; GENERIC-NEXT: fucompp
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fucom_fucomp_fucompp:
-; ATOM: # %bb.0:
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fucom %st(1) # sched: [1:1.00]
-; ATOM-NEXT: fucom %st(3) # sched: [1:1.00]
-; ATOM-NEXT: fucomp %st(1) # sched: [1:1.00]
-; ATOM-NEXT: fucomp %st(3) # sched: [1:1.00]
-; ATOM-NEXT: fucompp # sched: [1:1.00]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fucom_fucomp_fucompp:
-; SLM: # %bb.0:
-; SLM-NEXT: #APP
-; SLM-NEXT: fucom %st(1) # sched: [3:1.00]
-; SLM-NEXT: fucom %st(3) # sched: [3:1.00]
-; SLM-NEXT: fucomp %st(1) # sched: [3:1.00]
-; SLM-NEXT: fucomp %st(3) # sched: [3:1.00]
-; SLM-NEXT: fucompp # sched: [3:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fucom_fucomp_fucompp:
-; SANDY: # %bb.0:
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fucom %st(1) # sched: [1:1.00]
-; SANDY-NEXT: fucom %st(3) # sched: [1:1.00]
-; SANDY-NEXT: fucomp %st(1) # sched: [1:1.00]
-; SANDY-NEXT: fucomp %st(3) # sched: [1:1.00]
-; SANDY-NEXT: fucompp # sched: [3:1.00]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fucom_fucomp_fucompp:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fucom %st(1) # sched: [1:1.00]
-; HASWELL-NEXT: fucom %st(3) # sched: [1:1.00]
-; HASWELL-NEXT: fucomp %st(1) # sched: [1:1.00]
-; HASWELL-NEXT: fucomp %st(3) # sched: [1:1.00]
-; HASWELL-NEXT: fucompp # sched: [1:0.50]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fucom_fucomp_fucompp:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fucom %st(1) # sched: [1:1.00]
-; BROADWELL-NEXT: fucom %st(3) # sched: [1:1.00]
-; BROADWELL-NEXT: fucomp %st(1) # sched: [1:1.00]
-; BROADWELL-NEXT: fucomp %st(3) # sched: [1:1.00]
-; BROADWELL-NEXT: fucompp # sched: [3:1.00]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fucom_fucomp_fucompp:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fucom %st(1) # sched: [1:1.00]
-; SKYLAKE-NEXT: fucom %st(3) # sched: [1:1.00]
-; SKYLAKE-NEXT: fucomp %st(1) # sched: [1:1.00]
-; SKYLAKE-NEXT: fucomp %st(3) # sched: [1:1.00]
-; SKYLAKE-NEXT: fucompp # sched: [2:1.00]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fucom_fucomp_fucompp:
-; SKX: # %bb.0:
-; SKX-NEXT: #APP
-; SKX-NEXT: fucom %st(1) # sched: [1:1.00]
-; SKX-NEXT: fucom %st(3) # sched: [1:1.00]
-; SKX-NEXT: fucomp %st(1) # sched: [1:1.00]
-; SKX-NEXT: fucomp %st(3) # sched: [1:1.00]
-; SKX-NEXT: fucompp # sched: [2:1.00]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fucom_fucomp_fucompp:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fucom %st(1) # sched: [1:1.00]
-; BDVER2-NEXT: fucom %st(3) # sched: [1:1.00]
-; BDVER2-NEXT: fucomp %st(1) # sched: [1:1.00]
-; BDVER2-NEXT: fucomp %st(3) # sched: [1:1.00]
-; BDVER2-NEXT: fucompp # sched: [1:1.00]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fucom_fucomp_fucompp:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fucom %st(1) # sched: [3:1.00]
-; BTVER2-NEXT: fucom %st(3) # sched: [3:1.00]
-; BTVER2-NEXT: fucomp %st(1) # sched: [3:1.00]
-; BTVER2-NEXT: fucomp %st(3) # sched: [3:1.00]
-; BTVER2-NEXT: fucompp # sched: [3:1.00]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fucom_fucomp_fucompp:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fucom %st(1) # sched: [1:1.00]
-; ZNVER1-NEXT: fucom %st(3) # sched: [1:1.00]
-; ZNVER1-NEXT: fucomp %st(1) # sched: [1:1.00]
-; ZNVER1-NEXT: fucomp %st(3) # sched: [1:1.00]
-; ZNVER1-NEXT: fucompp # sched: [1:1.00]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fucom \0A\09 fucom %st(3) \0A\09 fucomp \0A\09 fucomp %st(3) \0A\09 fucompp", ""() nounwind
- ret void
-}
-
-define void @test_fucomi_fucomip() optsize {
-; GENERIC-LABEL: test_fucomi_fucomip:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fucomi %st(3)
-; GENERIC-NEXT: fucompi %st(3)
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fucomi_fucomip:
-; ATOM: # %bb.0:
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fucomi %st(3) # sched: [9:4.50]
-; ATOM-NEXT: fucompi %st(3) # sched: [9:4.50]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fucomi_fucomip:
-; SLM: # %bb.0:
-; SLM-NEXT: #APP
-; SLM-NEXT: fucomi %st(3) # sched: [3:1.00]
-; SLM-NEXT: fucompi %st(3) # sched: [3:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fucomi_fucomip:
-; SANDY: # %bb.0:
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fucomi %st(3) # sched: [3:1.00]
-; SANDY-NEXT: fucompi %st(3) # sched: [3:1.00]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fucomi_fucomip:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fucomi %st(3) # sched: [1:0.50]
-; HASWELL-NEXT: fucompi %st(3) # sched: [1:0.50]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fucomi_fucomip:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fucomi %st(3) # sched: [3:1.00]
-; BROADWELL-NEXT: fucompi %st(3) # sched: [3:1.00]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fucomi_fucomip:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fucomi %st(3) # sched: [2:1.00]
-; SKYLAKE-NEXT: fucompi %st(3) # sched: [2:1.00]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fucomi_fucomip:
-; SKX: # %bb.0:
-; SKX-NEXT: #APP
-; SKX-NEXT: fucomi %st(3) # sched: [2:1.00]
-; SKX-NEXT: fucompi %st(3) # sched: [2:1.00]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fucomi_fucomip:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fucomi %st(3) # sched: [1:1.00]
-; BDVER2-NEXT: fucompi %st(3) # sched: [1:1.00]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fucomi_fucomip:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fucomi %st(3) # sched: [3:1.00]
-; BTVER2-NEXT: fucompi %st(3) # sched: [3:1.00]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fucomi_fucomip:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fucomi %st(3) # sched: [9:0.50]
-; ZNVER1-NEXT: fucompi %st(3) # sched: [9:0.50]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fucomi %st(3) \0A\09 fucomip %st(3)", ""() nounwind
- ret void
-}
-
-define void @test_fwait() optsize {
-; GENERIC-LABEL: test_fwait:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: wait
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fwait:
-; ATOM: # %bb.0:
-; ATOM-NEXT: #APP
-; ATOM-NEXT: wait # sched: [1:0.50]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fwait:
-; SLM: # %bb.0:
-; SLM-NEXT: #APP
-; SLM-NEXT: wait # sched: [100:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fwait:
-; SANDY: # %bb.0:
-; SANDY-NEXT: #APP
-; SANDY-NEXT: wait # sched: [100:0.33]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fwait:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: wait # sched: [2:0.50]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fwait:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: wait # sched: [2:0.50]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fwait:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: wait # sched: [2:0.50]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fwait:
-; SKX: # %bb.0:
-; SKX-NEXT: #APP
-; SKX-NEXT: wait # sched: [2:0.50]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fwait:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: wait # sched: [100:0.50]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fwait:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: wait # sched: [100:0.50]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fwait:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: wait # sched: [1:1.00]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fwait", ""() nounwind
- ret void
-}
-
-define void @test_fxam() optsize {
-; GENERIC-LABEL: test_fxam:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fxam
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fxam:
-; ATOM: # %bb.0:
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fxam # sched: [1:1.00]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fxam:
-; SLM: # %bb.0:
-; SLM-NEXT: #APP
-; SLM-NEXT: fxam # sched: [100:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fxam:
-; SANDY: # %bb.0:
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fxam # sched: [100:0.33]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fxam:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fxam # sched: [1:2.00]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fxam:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fxam # sched: [100:0.25]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fxam:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fxam # sched: [100:0.25]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fxam:
-; SKX: # %bb.0:
-; SKX-NEXT: #APP
-; SKX-NEXT: fxam # sched: [100:0.25]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fxam:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fxam # sched: [100:0.50]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fxam:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fxam # sched: [100:0.50]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fxam:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fxam # sched: [1:1.00]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fxam", ""() nounwind
- ret void
-}
-
-define void @test_fxch() optsize {
-; GENERIC-LABEL: test_fxch:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fxch %st(1)
-; GENERIC-NEXT: fxch %st(3)
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fxch:
-; ATOM: # %bb.0:
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fxch %st(1) # sched: [1:1.00]
-; ATOM-NEXT: fxch %st(3) # sched: [1:1.00]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fxch:
-; SLM: # %bb.0:
-; SLM-NEXT: #APP
-; SLM-NEXT: fxch %st(1) # sched: [1:0.50]
-; SLM-NEXT: fxch %st(3) # sched: [1:0.50]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fxch:
-; SANDY: # %bb.0:
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fxch %st(1) # sched: [1:0.33]
-; SANDY-NEXT: fxch %st(3) # sched: [1:0.33]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fxch:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fxch %st(1) # sched: [17:4.00]
-; HASWELL-NEXT: fxch %st(3) # sched: [17:4.00]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fxch:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fxch %st(1) # sched: [14:4.00]
-; BROADWELL-NEXT: fxch %st(3) # sched: [14:4.00]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fxch:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fxch %st(1) # sched: [17:4.00]
-; SKYLAKE-NEXT: fxch %st(3) # sched: [17:4.00]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fxch:
-; SKX: # %bb.0:
-; SKX-NEXT: #APP
-; SKX-NEXT: fxch %st(1) # sched: [17:4.00]
-; SKX-NEXT: fxch %st(3) # sched: [17:4.00]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fxch:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fxch %st(1) # sched: [1:0.50]
-; BDVER2-NEXT: fxch %st(3) # sched: [1:0.50]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fxch:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fxch %st(1) # sched: [1:0.50]
-; BTVER2-NEXT: fxch %st(3) # sched: [1:0.50]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fxch:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fxch %st(1) # sched: [1:0.25]
-; ZNVER1-NEXT: fxch %st(3) # sched: [1:0.25]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fxch \0A\09 fxch %st(3)", ""() nounwind
- ret void
-}
-
-define void @test_fxrstor_fxsave(i8* %a0) optsize {
-; GENERIC-LABEL: test_fxrstor_fxsave:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fxrstor (%eax)
-; GENERIC-NEXT: fxsave (%eax)
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fxrstor_fxsave:
-; ATOM: # %bb.0:
-; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fxrstor (%eax) # sched: [141:70.50]
-; ATOM-NEXT: fxsave (%eax) # sched: [140:70.00]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fxrstor_fxsave:
-; SLM: # %bb.0:
-; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; SLM-NEXT: #APP
-; SLM-NEXT: fxrstor (%eax) # sched: [100:1.00]
-; SLM-NEXT: fxsave (%eax) # sched: [100:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fxrstor_fxsave:
-; SANDY: # %bb.0:
-; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fxrstor (%eax) # sched: [5:2.00]
-; SANDY-NEXT: fxsave (%eax) # sched: [100:0.33]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fxrstor_fxsave:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fxrstor (%eax) # sched: [64:16.50]
-; HASWELL-NEXT: fxsave (%eax) # sched: [100:0.25]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fxrstor_fxsave:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fxrstor (%eax) # sched: [63:16.50]
-; BROADWELL-NEXT: fxsave (%eax) # sched: [100:0.25]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fxrstor_fxsave:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fxrstor (%eax) # sched: [63:16.50]
-; SKYLAKE-NEXT: fxsave (%eax) # sched: [100:0.25]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fxrstor_fxsave:
-; SKX: # %bb.0:
-; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; SKX-NEXT: #APP
-; SKX-NEXT: fxrstor (%eax) # sched: [63:16.50]
-; SKX-NEXT: fxsave (%eax) # sched: [100:0.25]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fxrstor_fxsave:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fxrstor (%eax) # sched: [100:0.50]
-; BDVER2-NEXT: fxsave (%eax) # sched: [100:0.50]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fxrstor_fxsave:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fxrstor (%eax) # sched: [100:0.50]
-; BTVER2-NEXT: fxsave (%eax) # sched: [100:0.50]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fxrstor_fxsave:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fxrstor (%eax) # sched: [100:0.25]
-; ZNVER1-NEXT: fxsave (%eax) # sched: [100:0.25]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fxrstor $0 \0A\09 fxsave $0", "*m"(i8 *%a0) nounwind
- ret void
-}
-
-define void @test_fxtract() optsize {
-; GENERIC-LABEL: test_fxtract:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fxtract
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fxtract:
-; ATOM: # %bb.0:
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fxtract # sched: [25:12.50]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fxtract:
-; SLM: # %bb.0:
-; SLM-NEXT: #APP
-; SLM-NEXT: fxtract # sched: [100:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fxtract:
-; SANDY: # %bb.0:
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fxtract # sched: [100:0.33]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fxtract:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fxtract # sched: [15:4.25]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fxtract:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fxtract # sched: [100:0.25]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fxtract:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fxtract # sched: [100:0.25]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fxtract:
-; SKX: # %bb.0:
-; SKX-NEXT: #APP
-; SKX-NEXT: fxtract # sched: [100:0.25]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fxtract:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fxtract # sched: [100:0.50]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fxtract:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fxtract # sched: [100:0.50]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fxtract:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fxtract # sched: [100:0.25]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fxtract", ""() nounwind
- ret void
-}
-
-define void @test_fyl2x() optsize {
-; GENERIC-LABEL: test_fyl2x:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fyl2x
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fyl2x:
-; ATOM: # %bb.0:
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fyl2x # sched: [146:73.00]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fyl2x:
-; SLM: # %bb.0:
-; SLM-NEXT: #APP
-; SLM-NEXT: fyl2x # sched: [100:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fyl2x:
-; SANDY: # %bb.0:
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fyl2x # sched: [100:0.33]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fyl2x:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fyl2x # sched: [100:0.25]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fyl2x:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fyl2x # sched: [100:0.25]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fyl2x:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fyl2x # sched: [100:0.25]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fyl2x:
-; SKX: # %bb.0:
-; SKX-NEXT: #APP
-; SKX-NEXT: fyl2x # sched: [100:0.25]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fyl2x:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fyl2x # sched: [100:0.50]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fyl2x:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fyl2x # sched: [100:0.50]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fyl2x:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fyl2x # sched: [100:0.25]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fyl2x", ""() nounwind
- ret void
-}
-
-define void @test_fyl2xp1() optsize {
-; GENERIC-LABEL: test_fyl2xp1:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: fyl2xp1
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retl
-;
-; ATOM-LABEL: test_fyl2xp1:
-; ATOM: # %bb.0:
-; ATOM-NEXT: #APP
-; ATOM-NEXT: fyl2xp1 # sched: [147:73.50]
-; ATOM-NEXT: #NO_APP
-; ATOM-NEXT: retl # sched: [79:39.50]
-;
-; SLM-LABEL: test_fyl2xp1:
-; SLM: # %bb.0:
-; SLM-NEXT: #APP
-; SLM-NEXT: fyl2xp1 # sched: [100:1.00]
-; SLM-NEXT: #NO_APP
-; SLM-NEXT: retl # sched: [4:1.00]
-;
-; SANDY-LABEL: test_fyl2xp1:
-; SANDY: # %bb.0:
-; SANDY-NEXT: #APP
-; SANDY-NEXT: fyl2xp1 # sched: [100:0.33]
-; SANDY-NEXT: #NO_APP
-; SANDY-NEXT: retl # sched: [6:1.00]
-;
-; HASWELL-LABEL: test_fyl2xp1:
-; HASWELL: # %bb.0:
-; HASWELL-NEXT: #APP
-; HASWELL-NEXT: fyl2xp1 # sched: [100:0.25]
-; HASWELL-NEXT: #NO_APP
-; HASWELL-NEXT: retl # sched: [7:1.00]
-;
-; BROADWELL-LABEL: test_fyl2xp1:
-; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: fyl2xp1 # sched: [100:0.25]
-; BROADWELL-NEXT: #NO_APP
-; BROADWELL-NEXT: retl # sched: [6:0.50]
-;
-; SKYLAKE-LABEL: test_fyl2xp1:
-; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: fyl2xp1 # sched: [100:0.25]
-; SKYLAKE-NEXT: #NO_APP
-; SKYLAKE-NEXT: retl # sched: [6:0.50]
-;
-; SKX-LABEL: test_fyl2xp1:
-; SKX: # %bb.0:
-; SKX-NEXT: #APP
-; SKX-NEXT: fyl2xp1 # sched: [100:0.25]
-; SKX-NEXT: #NO_APP
-; SKX-NEXT: retl # sched: [6:0.50]
-;
-; BDVER2-LABEL: test_fyl2xp1:
-; BDVER2: # %bb.0:
-; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fyl2xp1 # sched: [100:0.50]
-; BDVER2-NEXT: #NO_APP
-; BDVER2-NEXT: retl # sched: [5:1.00]
-;
-; BTVER2-LABEL: test_fyl2xp1:
-; BTVER2: # %bb.0:
-; BTVER2-NEXT: #APP
-; BTVER2-NEXT: fyl2xp1 # sched: [100:0.50]
-; BTVER2-NEXT: #NO_APP
-; BTVER2-NEXT: retl # sched: [4:1.00]
-;
-; ZNVER1-LABEL: test_fyl2xp1:
-; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: #APP
-; ZNVER1-NEXT: fyl2xp1 # sched: [100:0.25]
-; ZNVER1-NEXT: #NO_APP
-; ZNVER1-NEXT: retl # sched: [1:0.50]
- tail call void asm sideeffect "fyl2xp1", ""() nounwind
- ret void
-}
Removed: llvm/trunk/test/CodeGen/X86/xop-schedule.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/xop-schedule.ll?rev=353042&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/xop-schedule.ll (original)
+++ llvm/trunk/test/CodeGen/X86/xop-schedule.ll (removed)
@@ -1,1818 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+xop | FileCheck %s --check-prefix=GENERIC
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver1 | FileCheck %s --check-prefix=BDVER --check-prefix=BDVER12 --check-prefix=BDVER1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 | FileCheck %s --check-prefix=BDVER --check-prefix=BDVER12 --check-prefix=BDVER2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver3 | FileCheck %s --check-prefix=BDVER --check-prefix=BDVER3
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver4 | FileCheck %s --check-prefix=BDVER --check-prefix=BDVER4
-
-define void @test_vfrczpd(<2 x double> %a0, <4 x double> %a1, <2 x double> *%a2, <4 x double> *%a3) {
-; GENERIC-LABEL: test_vfrczpd:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vfrczpd %xmm0, %xmm0 # sched: [3:1.00]
-; GENERIC-NEXT: vfrczpd %ymm1, %ymm1 # sched: [3:1.00]
-; GENERIC-NEXT: vfrczpd (%rdi), %xmm0 # sched: [9:1.00]
-; GENERIC-NEXT: vfrczpd (%rsi), %ymm1 # sched: [10:1.00]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: vzeroupper # sched: [1:1.00]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vfrczpd:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vfrczpd %xmm0, %xmm0 # sched: [10:1.00]
-; BDVER12-NEXT: vfrczpd %ymm1, %ymm1 # sched: [10:2.00]
-; BDVER12-NEXT: vfrczpd (%rdi), %xmm0 # sched: [15:1.00]
-; BDVER12-NEXT: vfrczpd (%rsi), %ymm1 # sched: [15:2.00]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: vzeroupper # sched: [46:4.00]
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vfrczpd:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vfrczpd %xmm0, %xmm0
-; BDVER3-NEXT: vfrczpd %ymm1, %ymm1
-; BDVER3-NEXT: vfrczpd (%rdi), %xmm0
-; BDVER3-NEXT: vfrczpd (%rsi), %ymm1
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: vzeroupper
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vfrczpd:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vfrczpd %xmm0, %xmm0
-; BDVER4-NEXT: vfrczpd %ymm1, %ymm1
-; BDVER4-NEXT: vfrczpd (%rdi), %xmm0
-; BDVER4-NEXT: vfrczpd (%rsi), %ymm1
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: vzeroupper
-; BDVER4-NEXT: retq
- call void asm sideeffect "vfrczpd $0, $0 \0a\09 vfrczpd $1, $1 \0a\09 vfrczpd $2, $0 \0a\09 vfrczpd $3, $1", "x,x,*m,*m"(<2 x double> %a0, <4 x double> %a1, <2 x double> *%a2, <4 x double> *%a3)
- ret void
-}
-
-define void @test_vfrczps(<4 x float> %a0, <4 x double> %a1, <4 x float> *%a2, <4 x double> *%a3) {
-; GENERIC-LABEL: test_vfrczps:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vfrczps %xmm0, %xmm0 # sched: [3:1.00]
-; GENERIC-NEXT: vfrczps %ymm1, %ymm1 # sched: [3:1.00]
-; GENERIC-NEXT: vfrczps (%rdi), %xmm0 # sched: [9:1.00]
-; GENERIC-NEXT: vfrczps (%rsi), %ymm1 # sched: [10:1.00]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: vzeroupper # sched: [1:1.00]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vfrczps:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vfrczps %xmm0, %xmm0 # sched: [10:1.00]
-; BDVER12-NEXT: vfrczps %ymm1, %ymm1 # sched: [10:2.00]
-; BDVER12-NEXT: vfrczps (%rdi), %xmm0 # sched: [15:1.00]
-; BDVER12-NEXT: vfrczps (%rsi), %ymm1 # sched: [15:2.00]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: vzeroupper # sched: [46:4.00]
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vfrczps:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vfrczps %xmm0, %xmm0
-; BDVER3-NEXT: vfrczps %ymm1, %ymm1
-; BDVER3-NEXT: vfrczps (%rdi), %xmm0
-; BDVER3-NEXT: vfrczps (%rsi), %ymm1
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: vzeroupper
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vfrczps:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vfrczps %xmm0, %xmm0
-; BDVER4-NEXT: vfrczps %ymm1, %ymm1
-; BDVER4-NEXT: vfrczps (%rdi), %xmm0
-; BDVER4-NEXT: vfrczps (%rsi), %ymm1
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: vzeroupper
-; BDVER4-NEXT: retq
- call void asm sideeffect "vfrczps $0, $0 \0a\09 vfrczps $1, $1 \0a\09 vfrczps $2, $0 \0a\09 vfrczps $3, $1", "x,x,*m,*m"(<4 x float> %a0, <4 x double> %a1, <4 x float> *%a2, <4 x double> *%a3)
- ret void
-}
-
-define void @test_vfrczsd(<2 x double> %a0, <2 x double> *%a1) {
-; GENERIC-LABEL: test_vfrczsd:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vfrczsd %xmm0, %xmm0 # sched: [3:1.00]
-; GENERIC-NEXT: vfrczsd (%rdi), %xmm0 # sched: [9:1.00]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vfrczsd:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vfrczsd %xmm0, %xmm0 # sched: [10:1.00]
-; BDVER12-NEXT: vfrczsd (%rdi), %xmm0 # sched: [15:1.00]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vfrczsd:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vfrczsd %xmm0, %xmm0
-; BDVER3-NEXT: vfrczsd (%rdi), %xmm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vfrczsd:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vfrczsd %xmm0, %xmm0
-; BDVER4-NEXT: vfrczsd (%rdi), %xmm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: retq
- call void asm sideeffect "vfrczsd $0, $0 \0a\09 vfrczsd $1, $0", "x,*m"(<2 x double> %a0, <2 x double> *%a1)
- ret void
-}
-
-define void @test_vfrczss(<4 x float> %a0, <4 x double> *%a1) {
-; GENERIC-LABEL: test_vfrczss:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vfrczss %xmm0, %xmm0 # sched: [3:1.00]
-; GENERIC-NEXT: vfrczss (%rdi), %xmm0 # sched: [9:1.00]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vfrczss:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vfrczss %xmm0, %xmm0 # sched: [10:1.00]
-; BDVER12-NEXT: vfrczss (%rdi), %xmm0 # sched: [15:1.00]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vfrczss:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vfrczss %xmm0, %xmm0
-; BDVER3-NEXT: vfrczss (%rdi), %xmm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vfrczss:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vfrczss %xmm0, %xmm0
-; BDVER4-NEXT: vfrczss (%rdi), %xmm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: retq
- call void asm sideeffect "vfrczss $0, $0 \0a\09 vfrczss $1, $0", "x,*m"(<4 x float> %a0, <4 x double> *%a1)
- ret void
-}
-
-define void @test_vpcmov_128(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2, <2 x i64> *%a3) {
-; GENERIC-LABEL: test_vpcmov_128:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: vpcmov (%rdi), %xmm1, %xmm0, %xmm0 # sched: [7:0.50]
-; GENERIC-NEXT: vpcmov %xmm2, (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vpcmov_128:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER12-NEXT: vpcmov (%rdi), %xmm1, %xmm0, %xmm0 # sched: [7:0.50]
-; BDVER12-NEXT: vpcmov %xmm2, (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vpcmov_128:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: vpcmov (%rdi), %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: vpcmov %xmm2, (%rdi), %xmm0, %xmm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vpcmov_128:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: vpcmov (%rdi), %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: vpcmov %xmm2, (%rdi), %xmm0, %xmm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: retq
- call void asm sideeffect "vpcmov $2, $1, $0, $0 \0a\09 vpcmov $3, $1, $0, $0 \0a\09 vpcmov $2, $3, $0, $0", "x,x,x,*m"(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2, <2 x i64> *%a3)
- ret void
-}
-
-define void @test_vpcmov_256(<4 x i64> %a0, <4 x i64> %a1, <4 x i64> %a2, <4 x i64> *%a3) {
-; GENERIC-LABEL: test_vpcmov_256:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vpcmov %ymm2, %ymm1, %ymm0, %ymm0 # sched: [1:1.00]
-; GENERIC-NEXT: vpcmov (%rdi), %ymm1, %ymm0, %ymm0 # sched: [8:1.00]
-; GENERIC-NEXT: vpcmov %ymm2, (%rdi), %ymm0, %ymm0 # sched: [8:1.00]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: vzeroupper # sched: [1:1.00]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vpcmov_256:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vpcmov %ymm2, %ymm1, %ymm0, %ymm0 # sched: [2:0.50]
-; BDVER12-NEXT: vpcmov (%rdi), %ymm1, %ymm0, %ymm0 # sched: [7:1.00]
-; BDVER12-NEXT: vpcmov %ymm2, (%rdi), %ymm0, %ymm0 # sched: [7:1.00]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: vzeroupper # sched: [46:4.00]
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vpcmov_256:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vpcmov %ymm2, %ymm1, %ymm0, %ymm0
-; BDVER3-NEXT: vpcmov (%rdi), %ymm1, %ymm0, %ymm0
-; BDVER3-NEXT: vpcmov %ymm2, (%rdi), %ymm0, %ymm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: vzeroupper
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vpcmov_256:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vpcmov %ymm2, %ymm1, %ymm0, %ymm0
-; BDVER4-NEXT: vpcmov (%rdi), %ymm1, %ymm0, %ymm0
-; BDVER4-NEXT: vpcmov %ymm2, (%rdi), %ymm0, %ymm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: vzeroupper
-; BDVER4-NEXT: retq
- call void asm sideeffect "vpcmov $2, $1, $0, $0 \0a\09 vpcmov $3, $1, $0, $0 \0a\09 vpcmov $2, $3, $0, $0", "x,x,x,*m"(<4 x i64> %a0, <4 x i64> %a1, <4 x i64> %a2, <4 x i64> *%a3)
- ret void
-}
-
-define void @test_vpcom(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> *%a2) {
-; GENERIC-LABEL: test_vpcom:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vpcomb $3, %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: vpcomd $3, %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: vpcomq $3, %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: vpcomw $3, %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: vpcomb $3, (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; GENERIC-NEXT: vpcomd $3, (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; GENERIC-NEXT: vpcomq $3, (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; GENERIC-NEXT: vpcomw $3, (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vpcom:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vpcomb $3, %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER12-NEXT: vpcomd $3, %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER12-NEXT: vpcomq $3, %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER12-NEXT: vpcomw $3, %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER12-NEXT: vpcomb $3, (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; BDVER12-NEXT: vpcomd $3, (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; BDVER12-NEXT: vpcomq $3, (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; BDVER12-NEXT: vpcomw $3, (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vpcom:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vpcomb $3, %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: vpcomd $3, %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: vpcomq $3, %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: vpcomw $3, %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: vpcomb $3, (%rdi), %xmm0, %xmm0
-; BDVER3-NEXT: vpcomd $3, (%rdi), %xmm0, %xmm0
-; BDVER3-NEXT: vpcomq $3, (%rdi), %xmm0, %xmm0
-; BDVER3-NEXT: vpcomw $3, (%rdi), %xmm0, %xmm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vpcom:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vpcomb $3, %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: vpcomd $3, %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: vpcomq $3, %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: vpcomw $3, %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: vpcomb $3, (%rdi), %xmm0, %xmm0
-; BDVER4-NEXT: vpcomd $3, (%rdi), %xmm0, %xmm0
-; BDVER4-NEXT: vpcomq $3, (%rdi), %xmm0, %xmm0
-; BDVER4-NEXT: vpcomw $3, (%rdi), %xmm0, %xmm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: retq
- call void asm sideeffect "vpcomb $3, $1, $0, $0 \0a\09 vpcomd $3, $1, $0, $0 \0a\09 vpcomq $3, $1, $0, $0 \0a\09 vpcomw $3, $1, $0, $0 \0a\09 vpcomb $3, $2, $0, $0 \0a\09 vpcomd $3, $2, $0, $0 \0a\09 vpcomq $3, $2, $0, $0 \0a\09 vpcomw $3, $2, $0, $0", "x,x,*m,i"(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> *%a2, i8 3)
- ret void
-}
-
-define void @test_vpcomu(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> *%a2) {
-; GENERIC-LABEL: test_vpcomu:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vpcomub $3, %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: vpcomud $3, %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: vpcomuq $3, %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: vpcomuw $3, %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: vpcomub $3, (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; GENERIC-NEXT: vpcomud $3, (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; GENERIC-NEXT: vpcomuq $3, (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; GENERIC-NEXT: vpcomuw $3, (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vpcomu:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vpcomub $3, %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER12-NEXT: vpcomud $3, %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER12-NEXT: vpcomuq $3, %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER12-NEXT: vpcomuw $3, %xmm1, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER12-NEXT: vpcomub $3, (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; BDVER12-NEXT: vpcomud $3, (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; BDVER12-NEXT: vpcomuq $3, (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; BDVER12-NEXT: vpcomuw $3, (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vpcomu:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vpcomub $3, %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: vpcomud $3, %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: vpcomuq $3, %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: vpcomuw $3, %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: vpcomub $3, (%rdi), %xmm0, %xmm0
-; BDVER3-NEXT: vpcomud $3, (%rdi), %xmm0, %xmm0
-; BDVER3-NEXT: vpcomuq $3, (%rdi), %xmm0, %xmm0
-; BDVER3-NEXT: vpcomuw $3, (%rdi), %xmm0, %xmm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vpcomu:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vpcomub $3, %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: vpcomud $3, %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: vpcomuq $3, %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: vpcomuw $3, %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: vpcomub $3, (%rdi), %xmm0, %xmm0
-; BDVER4-NEXT: vpcomud $3, (%rdi), %xmm0, %xmm0
-; BDVER4-NEXT: vpcomuq $3, (%rdi), %xmm0, %xmm0
-; BDVER4-NEXT: vpcomuw $3, (%rdi), %xmm0, %xmm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: retq
- call void asm sideeffect "vpcomub $3, $1, $0, $0 \0a\09 vpcomud $3, $1, $0, $0 \0a\09 vpcomuq $3, $1, $0, $0 \0a\09 vpcomuw $3, $1, $0, $0 \0a\09 vpcomub $3, $2, $0, $0 \0a\09 vpcomud $3, $2, $0, $0 \0a\09 vpcomuq $3, $2, $0, $0 \0a\09 vpcomuw $3, $2, $0, $0", "x,x,*m,i"(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> *%a2, i8 3)
- ret void
-}
-
-define void @test_vpermil2pd_128(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2, <2 x double> *%a3) {
-; GENERIC-LABEL: test_vpermil2pd_128:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vpermil2pd $3, %xmm2, %xmm1, %xmm0, %xmm0 # sched: [1:1.00]
-; GENERIC-NEXT: vpermil2pd $3, %xmm2, (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
-; GENERIC-NEXT: vpermil2pd $3, (%rdi), %xmm1, %xmm0, %xmm0 # sched: [7:1.00]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vpermil2pd_128:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vpermil2pd $3, %xmm2, %xmm1, %xmm0, %xmm0 # sched: [3:2.00]
-; BDVER12-NEXT: vpermil2pd $3, %xmm2, (%rdi), %xmm0, %xmm0 # sched: [8:2.00]
-; BDVER12-NEXT: vpermil2pd $3, (%rdi), %xmm1, %xmm0, %xmm0 # sched: [8:2.00]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vpermil2pd_128:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vpermil2pd $3, %xmm2, %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: vpermil2pd $3, %xmm2, (%rdi), %xmm0, %xmm0
-; BDVER3-NEXT: vpermil2pd $3, (%rdi), %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vpermil2pd_128:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vpermil2pd $3, %xmm2, %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: vpermil2pd $3, %xmm2, (%rdi), %xmm0, %xmm0
-; BDVER4-NEXT: vpermil2pd $3, (%rdi), %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: retq
- call void asm sideeffect "vpermil2pd $4, $2, $1, $0, $0 \0a\09 vpermil2pd $4, $2, $3, $0, $0 \0a\09 vpermil2pd $4, $3, $1, $0, $0", "x,x,x,*m,i"(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2, <2 x double> *%a3, i8 3)
- ret void
-}
-
-define void @test_vpermil2pd_256(<4 x double> %a0, <4 x double> %a1, <4 x double> %a2, <4 x double> *%a3) {
-; GENERIC-LABEL: test_vpermil2pd_256:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vpermil2pd $3, %ymm2, %ymm1, %ymm0, %ymm0 # sched: [1:1.00]
-; GENERIC-NEXT: vpermil2pd $3, %ymm2, (%rdi), %ymm0, %ymm0 # sched: [8:1.00]
-; GENERIC-NEXT: vpermil2pd $3, (%rdi), %ymm1, %ymm0, %ymm0 # sched: [8:1.00]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: vzeroupper # sched: [1:1.00]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vpermil2pd_256:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vpermil2pd $3, %ymm2, %ymm1, %ymm0, %ymm0 # sched: [3:3.00]
-; BDVER12-NEXT: vpermil2pd $3, %ymm2, (%rdi), %ymm0, %ymm0 # sched: [8:3.00]
-; BDVER12-NEXT: vpermil2pd $3, (%rdi), %ymm1, %ymm0, %ymm0 # sched: [8:3.00]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: vzeroupper # sched: [46:4.00]
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vpermil2pd_256:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vpermil2pd $3, %ymm2, %ymm1, %ymm0, %ymm0
-; BDVER3-NEXT: vpermil2pd $3, %ymm2, (%rdi), %ymm0, %ymm0
-; BDVER3-NEXT: vpermil2pd $3, (%rdi), %ymm1, %ymm0, %ymm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: vzeroupper
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vpermil2pd_256:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vpermil2pd $3, %ymm2, %ymm1, %ymm0, %ymm0
-; BDVER4-NEXT: vpermil2pd $3, %ymm2, (%rdi), %ymm0, %ymm0
-; BDVER4-NEXT: vpermil2pd $3, (%rdi), %ymm1, %ymm0, %ymm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: vzeroupper
-; BDVER4-NEXT: retq
- call void asm sideeffect "vpermil2pd $4, $2, $1, $0, $0 \0a\09 vpermil2pd $4, $2, $3, $0, $0 \0a\09 vpermil2pd $4, $3, $1, $0, $0", "x,x,x,*m,i"(<4 x double> %a0, <4 x double> %a1, <4 x double> %a2, <4 x double> *%a3, i8 3)
- ret void
-}
-
-define void @test_vpermil2ps_128(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2, <4 x float> *%a3) {
-; GENERIC-LABEL: test_vpermil2ps_128:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vpermil2ps $3, %xmm2, %xmm1, %xmm0, %xmm0 # sched: [1:1.00]
-; GENERIC-NEXT: vpermil2ps $3, %xmm2, (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
-; GENERIC-NEXT: vpermil2ps $3, (%rdi), %xmm1, %xmm0, %xmm0 # sched: [7:1.00]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vpermil2ps_128:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vpermil2ps $3, %xmm2, %xmm1, %xmm0, %xmm0 # sched: [3:2.00]
-; BDVER12-NEXT: vpermil2ps $3, %xmm2, (%rdi), %xmm0, %xmm0 # sched: [8:2.00]
-; BDVER12-NEXT: vpermil2ps $3, (%rdi), %xmm1, %xmm0, %xmm0 # sched: [8:2.00]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vpermil2ps_128:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vpermil2ps $3, %xmm2, %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: vpermil2ps $3, %xmm2, (%rdi), %xmm0, %xmm0
-; BDVER3-NEXT: vpermil2ps $3, (%rdi), %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vpermil2ps_128:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vpermil2ps $3, %xmm2, %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: vpermil2ps $3, %xmm2, (%rdi), %xmm0, %xmm0
-; BDVER4-NEXT: vpermil2ps $3, (%rdi), %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: retq
- call void asm sideeffect "vpermil2ps $4, $2, $1, $0, $0 \0a\09 vpermil2ps $4, $2, $3, $0, $0 \0a\09 vpermil2ps $4, $3, $1, $0, $0", "x,x,x,*m,i"(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2, <4 x float> *%a3, i8 3)
- ret void
-}
-
-define void @test_vpermil2ps_256(<8 x float> %a0, <8 x float> %a1, <8 x float> %a2, <8 x float> *%a3) {
-; GENERIC-LABEL: test_vpermil2ps_256:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vpermil2ps $3, %ymm2, %ymm1, %ymm0, %ymm0 # sched: [1:1.00]
-; GENERIC-NEXT: vpermil2ps $3, %ymm2, (%rdi), %ymm0, %ymm0 # sched: [8:1.00]
-; GENERIC-NEXT: vpermil2ps $3, (%rdi), %ymm1, %ymm0, %ymm0 # sched: [8:1.00]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: vzeroupper # sched: [1:1.00]
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vpermil2ps_256:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vpermil2ps $3, %ymm2, %ymm1, %ymm0, %ymm0 # sched: [3:3.00]
-; BDVER12-NEXT: vpermil2ps $3, %ymm2, (%rdi), %ymm0, %ymm0 # sched: [8:3.00]
-; BDVER12-NEXT: vpermil2ps $3, (%rdi), %ymm1, %ymm0, %ymm0 # sched: [8:3.00]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: vzeroupper # sched: [46:4.00]
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vpermil2ps_256:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vpermil2ps $3, %ymm2, %ymm1, %ymm0, %ymm0
-; BDVER3-NEXT: vpermil2ps $3, %ymm2, (%rdi), %ymm0, %ymm0
-; BDVER3-NEXT: vpermil2ps $3, (%rdi), %ymm1, %ymm0, %ymm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: vzeroupper
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vpermil2ps_256:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vpermil2ps $3, %ymm2, %ymm1, %ymm0, %ymm0
-; BDVER4-NEXT: vpermil2ps $3, %ymm2, (%rdi), %ymm0, %ymm0
-; BDVER4-NEXT: vpermil2ps $3, (%rdi), %ymm1, %ymm0, %ymm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: vzeroupper
-; BDVER4-NEXT: retq
- call void asm sideeffect "vpermil2ps $4, $2, $1, $0, $0 \0a\09 vpermil2ps $4, $2, $3, $0, $0 \0a\09 vpermil2ps $4, $3, $1, $0, $0", "x,x,x,*m,i"(<8 x float> %a0, <8 x float> %a1, <8 x float> %a2, <8 x float> *%a3, i8 3)
- ret void
-}
-
-define void @test_vphaddbd(<2 x i64> %a0, <2 x i64> *%a1) {
-; GENERIC-LABEL: test_vphaddbd:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vphaddbd %xmm0, %xmm0 # sched: [3:1.50]
-; GENERIC-NEXT: vphaddbd (%rdi), %xmm0 # sched: [9:1.50]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vphaddbd:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vphaddbd %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER12-NEXT: vphaddbd (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vphaddbd:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vphaddbd %xmm0, %xmm0
-; BDVER3-NEXT: vphaddbd (%rdi), %xmm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vphaddbd:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vphaddbd %xmm0, %xmm0
-; BDVER4-NEXT: vphaddbd (%rdi), %xmm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: retq
- call void asm sideeffect "vphaddbd $0, $0 \0a\09 vphaddbd $1, $0", "x,*m"(<2 x i64> %a0, <2 x i64> *%a1)
- ret void
-}
-
-define void @test_vphaddbq(<2 x i64> %a0, <2 x i64> *%a1) {
-; GENERIC-LABEL: test_vphaddbq:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vphaddbq %xmm0, %xmm0 # sched: [3:1.50]
-; GENERIC-NEXT: vphaddbq (%rdi), %xmm0 # sched: [9:1.50]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vphaddbq:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vphaddbq %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER12-NEXT: vphaddbq (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vphaddbq:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vphaddbq %xmm0, %xmm0
-; BDVER3-NEXT: vphaddbq (%rdi), %xmm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vphaddbq:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vphaddbq %xmm0, %xmm0
-; BDVER4-NEXT: vphaddbq (%rdi), %xmm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: retq
- call void asm sideeffect "vphaddbq $0, $0 \0a\09 vphaddbq $1, $0", "x,*m"(<2 x i64> %a0, <2 x i64> *%a1)
- ret void
-}
-
-define void @test_vphaddbw(<2 x i64> %a0, <2 x i64> *%a1) {
-; GENERIC-LABEL: test_vphaddbw:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vphaddbw %xmm0, %xmm0 # sched: [3:1.50]
-; GENERIC-NEXT: vphaddbw (%rdi), %xmm0 # sched: [9:1.50]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vphaddbw:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vphaddbw %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER12-NEXT: vphaddbw (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vphaddbw:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vphaddbw %xmm0, %xmm0
-; BDVER3-NEXT: vphaddbw (%rdi), %xmm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vphaddbw:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vphaddbw %xmm0, %xmm0
-; BDVER4-NEXT: vphaddbw (%rdi), %xmm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: retq
- call void asm sideeffect "vphaddbw $0, $0 \0a\09 vphaddbw $1, $0", "x,*m"(<2 x i64> %a0, <2 x i64> *%a1)
- ret void
-}
-
-define void @test_vphadddq(<2 x i64> %a0, <2 x i64> *%a1) {
-; GENERIC-LABEL: test_vphadddq:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vphadddq %xmm0, %xmm0 # sched: [3:1.50]
-; GENERIC-NEXT: vphadddq (%rdi), %xmm0 # sched: [9:1.50]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vphadddq:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vphadddq %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER12-NEXT: vphadddq (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vphadddq:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vphadddq %xmm0, %xmm0
-; BDVER3-NEXT: vphadddq (%rdi), %xmm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vphadddq:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vphadddq %xmm0, %xmm0
-; BDVER4-NEXT: vphadddq (%rdi), %xmm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: retq
- call void asm sideeffect "vphadddq $0, $0 \0a\09 vphadddq $1, $0", "x,*m"(<2 x i64> %a0, <2 x i64> *%a1)
- ret void
-}
-
-define void @test_vphaddubd(<2 x i64> %a0, <2 x i64> *%a1) {
-; GENERIC-LABEL: test_vphaddubd:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vphaddubd %xmm0, %xmm0 # sched: [3:1.50]
-; GENERIC-NEXT: vphaddubd (%rdi), %xmm0 # sched: [9:1.50]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vphaddubd:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vphaddubd %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER12-NEXT: vphaddubd (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vphaddubd:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vphaddubd %xmm0, %xmm0
-; BDVER3-NEXT: vphaddubd (%rdi), %xmm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vphaddubd:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vphaddubd %xmm0, %xmm0
-; BDVER4-NEXT: vphaddubd (%rdi), %xmm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: retq
- call void asm sideeffect "vphaddubd $0, $0 \0a\09 vphaddubd $1, $0", "x,*m"(<2 x i64> %a0, <2 x i64> *%a1)
- ret void
-}
-
-define void @test_vphaddubq(<2 x i64> %a0, <2 x i64> *%a1) {
-; GENERIC-LABEL: test_vphaddubq:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vphaddubq %xmm0, %xmm0 # sched: [3:1.50]
-; GENERIC-NEXT: vphaddubq (%rdi), %xmm0 # sched: [9:1.50]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vphaddubq:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vphaddubq %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER12-NEXT: vphaddubq (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vphaddubq:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vphaddubq %xmm0, %xmm0
-; BDVER3-NEXT: vphaddubq (%rdi), %xmm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vphaddubq:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vphaddubq %xmm0, %xmm0
-; BDVER4-NEXT: vphaddubq (%rdi), %xmm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: retq
- call void asm sideeffect "vphaddubq $0, $0 \0a\09 vphaddubq $1, $0", "x,*m"(<2 x i64> %a0, <2 x i64> *%a1)
- ret void
-}
-
-define void @test_vphaddubw(<2 x i64> %a0, <2 x i64> *%a1) {
-; GENERIC-LABEL: test_vphaddubw:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vphaddubw %xmm0, %xmm0 # sched: [3:1.50]
-; GENERIC-NEXT: vphaddubw (%rdi), %xmm0 # sched: [9:1.50]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vphaddubw:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vphaddubw %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER12-NEXT: vphaddubw (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vphaddubw:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vphaddubw %xmm0, %xmm0
-; BDVER3-NEXT: vphaddubw (%rdi), %xmm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vphaddubw:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vphaddubw %xmm0, %xmm0
-; BDVER4-NEXT: vphaddubw (%rdi), %xmm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: retq
- call void asm sideeffect "vphaddubw $0, $0 \0a\09 vphaddubw $1, $0", "x,*m"(<2 x i64> %a0, <2 x i64> *%a1)
- ret void
-}
-
-define void @test_vphaddudq(<2 x i64> %a0, <2 x i64> *%a1) {
-; GENERIC-LABEL: test_vphaddudq:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vphaddudq %xmm0, %xmm0 # sched: [3:1.50]
-; GENERIC-NEXT: vphaddudq (%rdi), %xmm0 # sched: [9:1.50]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vphaddudq:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vphaddudq %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER12-NEXT: vphaddudq (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vphaddudq:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vphaddudq %xmm0, %xmm0
-; BDVER3-NEXT: vphaddudq (%rdi), %xmm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vphaddudq:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vphaddudq %xmm0, %xmm0
-; BDVER4-NEXT: vphaddudq (%rdi), %xmm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: retq
- call void asm sideeffect "vphaddudq $0, $0 \0a\09 vphaddudq $1, $0", "x,*m"(<2 x i64> %a0, <2 x i64> *%a1)
- ret void
-}
-
-define void @test_vphadduwd(<2 x i64> %a0, <2 x i64> *%a1) {
-; GENERIC-LABEL: test_vphadduwd:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vphadduwd %xmm0, %xmm0 # sched: [3:1.50]
-; GENERIC-NEXT: vphadduwd (%rdi), %xmm0 # sched: [9:1.50]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vphadduwd:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vphadduwd %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER12-NEXT: vphadduwd (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vphadduwd:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vphadduwd %xmm0, %xmm0
-; BDVER3-NEXT: vphadduwd (%rdi), %xmm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vphadduwd:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vphadduwd %xmm0, %xmm0
-; BDVER4-NEXT: vphadduwd (%rdi), %xmm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: retq
- call void asm sideeffect "vphadduwd $0, $0 \0a\09 vphadduwd $1, $0", "x,*m"(<2 x i64> %a0, <2 x i64> *%a1)
- ret void
-}
-
-define void @test_vphadduwq(<2 x i64> %a0, <2 x i64> *%a1) {
-; GENERIC-LABEL: test_vphadduwq:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vphadduwq %xmm0, %xmm0 # sched: [3:1.50]
-; GENERIC-NEXT: vphadduwq (%rdi), %xmm0 # sched: [9:1.50]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vphadduwq:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vphadduwq %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER12-NEXT: vphadduwq (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vphadduwq:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vphadduwq %xmm0, %xmm0
-; BDVER3-NEXT: vphadduwq (%rdi), %xmm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vphadduwq:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vphadduwq %xmm0, %xmm0
-; BDVER4-NEXT: vphadduwq (%rdi), %xmm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: retq
- call void asm sideeffect "vphadduwq $0, $0 \0a\09 vphadduwq $1, $0", "x,*m"(<2 x i64> %a0, <2 x i64> *%a1)
- ret void
-}
-
-define void @test_vphaddwd(<2 x i64> %a0, <2 x i64> *%a1) {
-; GENERIC-LABEL: test_vphaddwd:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vphaddwd %xmm0, %xmm0 # sched: [3:1.50]
-; GENERIC-NEXT: vphaddwd (%rdi), %xmm0 # sched: [9:1.50]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vphaddwd:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vphaddwd %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER12-NEXT: vphaddwd (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vphaddwd:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vphaddwd %xmm0, %xmm0
-; BDVER3-NEXT: vphaddwd (%rdi), %xmm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vphaddwd:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vphaddwd %xmm0, %xmm0
-; BDVER4-NEXT: vphaddwd (%rdi), %xmm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: retq
- call void asm sideeffect "vphaddwd $0, $0 \0a\09 vphaddwd $1, $0", "x,*m"(<2 x i64> %a0, <2 x i64> *%a1)
- ret void
-}
-
-define void @test_vphaddwq(<2 x i64> %a0, <2 x i64> *%a1) {
-; GENERIC-LABEL: test_vphaddwq:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vphaddwq %xmm0, %xmm0 # sched: [3:1.50]
-; GENERIC-NEXT: vphaddwq (%rdi), %xmm0 # sched: [9:1.50]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vphaddwq:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vphaddwq %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER12-NEXT: vphaddwq (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vphaddwq:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vphaddwq %xmm0, %xmm0
-; BDVER3-NEXT: vphaddwq (%rdi), %xmm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vphaddwq:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vphaddwq %xmm0, %xmm0
-; BDVER4-NEXT: vphaddwq (%rdi), %xmm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: retq
- call void asm sideeffect "vphaddwq $0, $0 \0a\09 vphaddwq $1, $0", "x,*m"(<2 x i64> %a0, <2 x i64> *%a1)
- ret void
-}
-
-define void @test_vphsubbw(<2 x i64> %a0, <2 x i64> *%a1) {
-; GENERIC-LABEL: test_vphsubbw:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vphsubbw %xmm0, %xmm0 # sched: [3:1.50]
-; GENERIC-NEXT: vphsubbw (%rdi), %xmm0 # sched: [9:1.50]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vphsubbw:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vphsubbw %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER12-NEXT: vphsubbw (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vphsubbw:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vphsubbw %xmm0, %xmm0
-; BDVER3-NEXT: vphsubbw (%rdi), %xmm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vphsubbw:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vphsubbw %xmm0, %xmm0
-; BDVER4-NEXT: vphsubbw (%rdi), %xmm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: retq
- call void asm sideeffect "vphsubbw $0, $0 \0a\09 vphsubbw $1, $0", "x,*m"(<2 x i64> %a0, <2 x i64> *%a1)
- ret void
-}
-
-define void @test_vphsubdq(<2 x i64> %a0, <2 x i64> *%a1) {
-; GENERIC-LABEL: test_vphsubdq:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vphsubdq %xmm0, %xmm0 # sched: [3:1.50]
-; GENERIC-NEXT: vphsubdq (%rdi), %xmm0 # sched: [9:1.50]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vphsubdq:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vphsubdq %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER12-NEXT: vphsubdq (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vphsubdq:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vphsubdq %xmm0, %xmm0
-; BDVER3-NEXT: vphsubdq (%rdi), %xmm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vphsubdq:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vphsubdq %xmm0, %xmm0
-; BDVER4-NEXT: vphsubdq (%rdi), %xmm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: retq
- call void asm sideeffect "vphsubdq $0, $0 \0a\09 vphsubdq $1, $0", "x,*m"(<2 x i64> %a0, <2 x i64> *%a1)
- ret void
-}
-
-define void @test_vphsubwd(<2 x i64> %a0, <2 x i64> *%a1) {
-; GENERIC-LABEL: test_vphsubwd:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vphsubwd %xmm0, %xmm0 # sched: [3:1.50]
-; GENERIC-NEXT: vphsubwd (%rdi), %xmm0 # sched: [9:1.50]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vphsubwd:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vphsubwd %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER12-NEXT: vphsubwd (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vphsubwd:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vphsubwd %xmm0, %xmm0
-; BDVER3-NEXT: vphsubwd (%rdi), %xmm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vphsubwd:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vphsubwd %xmm0, %xmm0
-; BDVER4-NEXT: vphsubwd (%rdi), %xmm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: retq
- call void asm sideeffect "vphsubwd $0, $0 \0a\09 vphsubwd $1, $0", "x,*m"(<2 x i64> %a0, <2 x i64> *%a1)
- ret void
-}
-
-define void @test_vpmacsdd(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2, <2 x i64> *%a3) {
-; GENERIC-LABEL: test_vpmacsdd:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vpmacsdd %xmm2, %xmm1, %xmm0, %xmm0 # sched: [5:1.00]
-; GENERIC-NEXT: vpmacsdd %xmm2, (%rdi), %xmm0, %xmm0 # sched: [11:1.00]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vpmacsdd:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vpmacsdd %xmm2, %xmm1, %xmm0, %xmm0 # sched: [5:2.00]
-; BDVER12-NEXT: vpmacsdd %xmm2, (%rdi), %xmm0, %xmm0 # sched: [10:2.00]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vpmacsdd:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vpmacsdd %xmm2, %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: vpmacsdd %xmm2, (%rdi), %xmm0, %xmm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vpmacsdd:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vpmacsdd %xmm2, %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: vpmacsdd %xmm2, (%rdi), %xmm0, %xmm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: retq
- call void asm sideeffect "vpmacsdd $2, $1, $0, $0 \0a\09 vpmacsdd $2, $3, $0, $0", "x,x,x,*m"(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2, <2 x i64> *%a3)
- ret void
-}
-
-define void @test_vpmacsdqh(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2, <2 x i64> *%a3) {
-; GENERIC-LABEL: test_vpmacsdqh:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vpmacsdqh %xmm2, %xmm1, %xmm0, %xmm0 # sched: [5:1.00]
-; GENERIC-NEXT: vpmacsdqh %xmm2, (%rdi), %xmm0, %xmm0 # sched: [11:1.00]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vpmacsdqh:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vpmacsdqh %xmm2, %xmm1, %xmm0, %xmm0 # sched: [4:2.00]
-; BDVER12-NEXT: vpmacsdqh %xmm2, (%rdi), %xmm0, %xmm0 # sched: [10:2.00]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vpmacsdqh:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vpmacsdqh %xmm2, %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: vpmacsdqh %xmm2, (%rdi), %xmm0, %xmm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vpmacsdqh:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vpmacsdqh %xmm2, %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: vpmacsdqh %xmm2, (%rdi), %xmm0, %xmm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: retq
- call void asm sideeffect "vpmacsdqh $2, $1, $0, $0 \0a\09 vpmacsdqh $2, $3, $0, $0", "x,x,x,*m"(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2, <2 x i64> *%a3)
- ret void
-}
-
-define void @test_vpmacsdql(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2, <2 x i64> *%a3) {
-; GENERIC-LABEL: test_vpmacsdql:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vpmacsdql %xmm2, %xmm1, %xmm0, %xmm0 # sched: [5:1.00]
-; GENERIC-NEXT: vpmacsdql %xmm2, (%rdi), %xmm0, %xmm0 # sched: [11:1.00]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vpmacsdql:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vpmacsdql %xmm2, %xmm1, %xmm0, %xmm0 # sched: [4:2.00]
-; BDVER12-NEXT: vpmacsdql %xmm2, (%rdi), %xmm0, %xmm0 # sched: [10:2.00]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vpmacsdql:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vpmacsdql %xmm2, %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: vpmacsdql %xmm2, (%rdi), %xmm0, %xmm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vpmacsdql:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vpmacsdql %xmm2, %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: vpmacsdql %xmm2, (%rdi), %xmm0, %xmm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: retq
- call void asm sideeffect "vpmacsdql $2, $1, $0, $0 \0a\09 vpmacsdql $2, $3, $0, $0", "x,x,x,*m"(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2, <2 x i64> *%a3)
- ret void
-}
-
-define void @test_vpmacssdd(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2, <2 x i64> *%a3) {
-; GENERIC-LABEL: test_vpmacssdd:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vpmacssdd %xmm2, %xmm1, %xmm0, %xmm0 # sched: [5:1.00]
-; GENERIC-NEXT: vpmacssdd %xmm2, (%rdi), %xmm0, %xmm0 # sched: [11:1.00]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vpmacssdd:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vpmacssdd %xmm2, %xmm1, %xmm0, %xmm0 # sched: [5:2.00]
-; BDVER12-NEXT: vpmacssdd %xmm2, (%rdi), %xmm0, %xmm0 # sched: [10:2.00]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vpmacssdd:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vpmacssdd %xmm2, %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: vpmacssdd %xmm2, (%rdi), %xmm0, %xmm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vpmacssdd:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vpmacssdd %xmm2, %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: vpmacssdd %xmm2, (%rdi), %xmm0, %xmm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: retq
- call void asm sideeffect "vpmacssdd $2, $1, $0, $0 \0a\09 vpmacssdd $2, $3, $0, $0", "x,x,x,*m"(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2, <2 x i64> *%a3)
- ret void
-}
-
-define void @test_vpmacssdqh(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2, <2 x i64> *%a3) {
-; GENERIC-LABEL: test_vpmacssdqh:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vpmacssdqh %xmm2, %xmm1, %xmm0, %xmm0 # sched: [5:1.00]
-; GENERIC-NEXT: vpmacssdqh %xmm2, (%rdi), %xmm0, %xmm0 # sched: [11:1.00]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vpmacssdqh:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vpmacssdqh %xmm2, %xmm1, %xmm0, %xmm0 # sched: [4:2.00]
-; BDVER12-NEXT: vpmacssdqh %xmm2, (%rdi), %xmm0, %xmm0 # sched: [10:2.00]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vpmacssdqh:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vpmacssdqh %xmm2, %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: vpmacssdqh %xmm2, (%rdi), %xmm0, %xmm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vpmacssdqh:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vpmacssdqh %xmm2, %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: vpmacssdqh %xmm2, (%rdi), %xmm0, %xmm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: retq
- call void asm sideeffect "vpmacssdqh $2, $1, $0, $0 \0a\09 vpmacssdqh $2, $3, $0, $0", "x,x,x,*m"(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2, <2 x i64> *%a3)
- ret void
-}
-
-define void @test_vpmacssdql(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2, <2 x i64> *%a3) {
-; GENERIC-LABEL: test_vpmacssdql:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vpmacssdql %xmm2, %xmm1, %xmm0, %xmm0 # sched: [5:1.00]
-; GENERIC-NEXT: vpmacssdql %xmm2, (%rdi), %xmm0, %xmm0 # sched: [11:1.00]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vpmacssdql:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vpmacssdql %xmm2, %xmm1, %xmm0, %xmm0 # sched: [4:2.00]
-; BDVER12-NEXT: vpmacssdql %xmm2, (%rdi), %xmm0, %xmm0 # sched: [10:2.00]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vpmacssdql:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vpmacssdql %xmm2, %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: vpmacssdql %xmm2, (%rdi), %xmm0, %xmm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vpmacssdql:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vpmacssdql %xmm2, %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: vpmacssdql %xmm2, (%rdi), %xmm0, %xmm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: retq
- call void asm sideeffect "vpmacssdql $2, $1, $0, $0 \0a\09 vpmacssdql $2, $3, $0, $0", "x,x,x,*m"(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2, <2 x i64> *%a3)
- ret void
-}
-
-define void @test_vpmacsswd(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2, <2 x i64> *%a3) {
-; GENERIC-LABEL: test_vpmacsswd:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vpmacsswd %xmm2, %xmm1, %xmm0, %xmm0 # sched: [5:1.00]
-; GENERIC-NEXT: vpmacsswd %xmm2, (%rdi), %xmm0, %xmm0 # sched: [11:1.00]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vpmacsswd:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vpmacsswd %xmm2, %xmm1, %xmm0, %xmm0 # sched: [4:1.00]
-; BDVER12-NEXT: vpmacsswd %xmm2, (%rdi), %xmm0, %xmm0 # sched: [9:1.00]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vpmacsswd:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vpmacsswd %xmm2, %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: vpmacsswd %xmm2, (%rdi), %xmm0, %xmm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vpmacsswd:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vpmacsswd %xmm2, %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: vpmacsswd %xmm2, (%rdi), %xmm0, %xmm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: retq
- call void asm sideeffect "vpmacsswd $2, $1, $0, $0 \0a\09 vpmacsswd $2, $3, $0, $0", "x,x,x,*m"(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2, <2 x i64> *%a3)
- ret void
-}
-
-define void @test_vpmacssww(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2, <2 x i64> *%a3) {
-; GENERIC-LABEL: test_vpmacssww:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vpmacssww %xmm2, %xmm1, %xmm0, %xmm0 # sched: [5:1.00]
-; GENERIC-NEXT: vpmacssww %xmm2, (%rdi), %xmm0, %xmm0 # sched: [11:1.00]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vpmacssww:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vpmacssww %xmm2, %xmm1, %xmm0, %xmm0 # sched: [4:1.00]
-; BDVER12-NEXT: vpmacssww %xmm2, (%rdi), %xmm0, %xmm0 # sched: [9:1.00]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vpmacssww:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vpmacssww %xmm2, %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: vpmacssww %xmm2, (%rdi), %xmm0, %xmm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vpmacssww:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vpmacssww %xmm2, %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: vpmacssww %xmm2, (%rdi), %xmm0, %xmm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: retq
- call void asm sideeffect "vpmacssww $2, $1, $0, $0 \0a\09 vpmacssww $2, $3, $0, $0", "x,x,x,*m"(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2, <2 x i64> *%a3)
- ret void
-}
-
-define void @test_vpmacswd(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2, <2 x i64> *%a3) {
-; GENERIC-LABEL: test_vpmacswd:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vpmacswd %xmm2, %xmm1, %xmm0, %xmm0 # sched: [5:1.00]
-; GENERIC-NEXT: vpmacswd %xmm2, (%rdi), %xmm0, %xmm0 # sched: [11:1.00]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vpmacswd:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vpmacswd %xmm2, %xmm1, %xmm0, %xmm0 # sched: [4:1.00]
-; BDVER12-NEXT: vpmacswd %xmm2, (%rdi), %xmm0, %xmm0 # sched: [9:1.00]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vpmacswd:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vpmacswd %xmm2, %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: vpmacswd %xmm2, (%rdi), %xmm0, %xmm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vpmacswd:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vpmacswd %xmm2, %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: vpmacswd %xmm2, (%rdi), %xmm0, %xmm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: retq
- call void asm sideeffect "vpmacswd $2, $1, $0, $0 \0a\09 vpmacswd $2, $3, $0, $0", "x,x,x,*m"(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2, <2 x i64> *%a3)
- ret void
-}
-
-define void @test_vpmacsww(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2, <2 x i64> *%a3) {
-; GENERIC-LABEL: test_vpmacsww:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vpmacsww %xmm2, %xmm1, %xmm0, %xmm0 # sched: [5:1.00]
-; GENERIC-NEXT: vpmacsww %xmm2, (%rdi), %xmm0, %xmm0 # sched: [11:1.00]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vpmacsww:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vpmacsww %xmm2, %xmm1, %xmm0, %xmm0 # sched: [4:1.00]
-; BDVER12-NEXT: vpmacsww %xmm2, (%rdi), %xmm0, %xmm0 # sched: [9:1.00]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vpmacsww:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vpmacsww %xmm2, %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: vpmacsww %xmm2, (%rdi), %xmm0, %xmm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vpmacsww:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vpmacsww %xmm2, %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: vpmacsww %xmm2, (%rdi), %xmm0, %xmm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: retq
- call void asm sideeffect "vpmacsww $2, $1, $0, $0 \0a\09 vpmacsww $2, $3, $0, $0", "x,x,x,*m"(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2, <2 x i64> *%a3)
- ret void
-}
-
-define void @test_vpmadcsswd(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2, <2 x i64> *%a3) {
-; GENERIC-LABEL: test_vpmadcsswd:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vpmadcsswd %xmm2, %xmm1, %xmm0, %xmm0 # sched: [5:1.00]
-; GENERIC-NEXT: vpmadcsswd %xmm2, (%rdi), %xmm0, %xmm0 # sched: [11:1.00]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vpmadcsswd:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vpmadcsswd %xmm2, %xmm1, %xmm0, %xmm0 # sched: [4:1.00]
-; BDVER12-NEXT: vpmadcsswd %xmm2, (%rdi), %xmm0, %xmm0 # sched: [9:1.00]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vpmadcsswd:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vpmadcsswd %xmm2, %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: vpmadcsswd %xmm2, (%rdi), %xmm0, %xmm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vpmadcsswd:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vpmadcsswd %xmm2, %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: vpmadcsswd %xmm2, (%rdi), %xmm0, %xmm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: retq
- call void asm sideeffect "vpmadcsswd $2, $1, $0, $0 \0a\09 vpmadcsswd $2, $3, $0, $0", "x,x,x,*m"(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2, <2 x i64> *%a3)
- ret void
-}
-
-define void @test_vpmadcswd(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2, <2 x i64> *%a3) {
-; GENERIC-LABEL: test_vpmadcswd:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vpmadcswd %xmm2, %xmm1, %xmm0, %xmm0 # sched: [5:1.00]
-; GENERIC-NEXT: vpmadcswd %xmm2, (%rdi), %xmm0, %xmm0 # sched: [11:1.00]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vpmadcswd:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vpmadcswd %xmm2, %xmm1, %xmm0, %xmm0 # sched: [4:1.00]
-; BDVER12-NEXT: vpmadcswd %xmm2, (%rdi), %xmm0, %xmm0 # sched: [9:1.00]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vpmadcswd:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vpmadcswd %xmm2, %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: vpmadcswd %xmm2, (%rdi), %xmm0, %xmm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vpmadcswd:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vpmadcswd %xmm2, %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: vpmadcswd %xmm2, (%rdi), %xmm0, %xmm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: retq
- call void asm sideeffect "vpmadcswd $2, $1, $0, $0 \0a\09 vpmadcswd $2, $3, $0, $0", "x,x,x,*m"(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2, <2 x i64> *%a3)
- ret void
-}
-
-define void @test_vpperm(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2, <2 x i64> *%a3) {
-; GENERIC-LABEL: test_vpperm:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vpperm %xmm2, %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
-; GENERIC-NEXT: vpperm (%rdi), %xmm1, %xmm0, %xmm0 # sched: [7:0.50]
-; GENERIC-NEXT: vpperm %xmm2, (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vpperm:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vpperm %xmm2, %xmm1, %xmm0, %xmm0 # sched: [3:2.00]
-; BDVER12-NEXT: vpperm (%rdi), %xmm1, %xmm0, %xmm0 # sched: [8:2.00]
-; BDVER12-NEXT: vpperm %xmm2, (%rdi), %xmm0, %xmm0 # sched: [8:2.00]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vpperm:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vpperm %xmm2, %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: vpperm (%rdi), %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: vpperm %xmm2, (%rdi), %xmm0, %xmm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vpperm:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vpperm %xmm2, %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: vpperm (%rdi), %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: vpperm %xmm2, (%rdi), %xmm0, %xmm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: retq
- call void asm sideeffect "vpperm $2, $1, $0, $0 \0A\09 vpperm $3, $1, $0, $0 \0A\09 vpperm $2, $3, $0, $0", "x,x,x,*m"(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2, <2 x i64> *%a3)
- ret void
-}
-
-define void @test_vprot(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> *%a2) {
-; GENERIC-LABEL: test_vprot:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vprotb %xmm1, %xmm0, %xmm0 # sched: [1:1.00]
-; GENERIC-NEXT: vprotd %xmm1, %xmm0, %xmm0 # sched: [1:1.00]
-; GENERIC-NEXT: vprotq %xmm1, %xmm0, %xmm0 # sched: [1:1.00]
-; GENERIC-NEXT: vprotw %xmm1, %xmm0, %xmm0 # sched: [1:1.00]
-; GENERIC-NEXT: vprotb (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
-; GENERIC-NEXT: vprotd (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
-; GENERIC-NEXT: vprotq (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
-; GENERIC-NEXT: vprotw (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
-; GENERIC-NEXT: vprotb %xmm0, (%rdi), %xmm0 # sched: [7:1.00]
-; GENERIC-NEXT: vprotd %xmm0, (%rdi), %xmm0 # sched: [7:1.00]
-; GENERIC-NEXT: vprotq %xmm0, (%rdi), %xmm0 # sched: [7:1.00]
-; GENERIC-NEXT: vprotw %xmm0, (%rdi), %xmm0 # sched: [7:1.00]
-; GENERIC-NEXT: vprotb $7, %xmm0, %xmm0 # sched: [1:1.00]
-; GENERIC-NEXT: vprotd $7, %xmm0, %xmm0 # sched: [1:1.00]
-; GENERIC-NEXT: vprotq $7, %xmm0, %xmm0 # sched: [1:1.00]
-; GENERIC-NEXT: vprotw $7, %xmm0, %xmm0 # sched: [1:1.00]
-; GENERIC-NEXT: vprotb $7, (%rdi), %xmm0 # sched: [7:1.00]
-; GENERIC-NEXT: vprotd $7, (%rdi), %xmm0 # sched: [7:1.00]
-; GENERIC-NEXT: vprotq $7, (%rdi), %xmm0 # sched: [7:1.00]
-; GENERIC-NEXT: vprotw $7, (%rdi), %xmm0 # sched: [7:1.00]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vprot:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vprotb %xmm1, %xmm0, %xmm0 # sched: [3:0.50]
-; BDVER12-NEXT: vprotd %xmm1, %xmm0, %xmm0 # sched: [3:0.50]
-; BDVER12-NEXT: vprotq %xmm1, %xmm0, %xmm0 # sched: [3:0.50]
-; BDVER12-NEXT: vprotw %xmm1, %xmm0, %xmm0 # sched: [3:0.50]
-; BDVER12-NEXT: vprotb (%rdi), %xmm0, %xmm0 # sched: [8:0.50]
-; BDVER12-NEXT: vprotd (%rdi), %xmm0, %xmm0 # sched: [8:0.50]
-; BDVER12-NEXT: vprotq (%rdi), %xmm0, %xmm0 # sched: [8:0.50]
-; BDVER12-NEXT: vprotw (%rdi), %xmm0, %xmm0 # sched: [8:0.50]
-; BDVER12-NEXT: vprotb %xmm0, (%rdi), %xmm0 # sched: [8:0.50]
-; BDVER12-NEXT: vprotd %xmm0, (%rdi), %xmm0 # sched: [8:0.50]
-; BDVER12-NEXT: vprotq %xmm0, (%rdi), %xmm0 # sched: [8:0.50]
-; BDVER12-NEXT: vprotw %xmm0, (%rdi), %xmm0 # sched: [8:0.50]
-; BDVER12-NEXT: vprotb $7, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER12-NEXT: vprotd $7, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER12-NEXT: vprotq $7, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER12-NEXT: vprotw $7, %xmm0, %xmm0 # sched: [2:0.50]
-; BDVER12-NEXT: vprotb $7, (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER12-NEXT: vprotd $7, (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER12-NEXT: vprotq $7, (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER12-NEXT: vprotw $7, (%rdi), %xmm0 # sched: [7:0.50]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vprot:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vprotb %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: vprotd %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: vprotq %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: vprotw %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: vprotb (%rdi), %xmm0, %xmm0
-; BDVER3-NEXT: vprotd (%rdi), %xmm0, %xmm0
-; BDVER3-NEXT: vprotq (%rdi), %xmm0, %xmm0
-; BDVER3-NEXT: vprotw (%rdi), %xmm0, %xmm0
-; BDVER3-NEXT: vprotb %xmm0, (%rdi), %xmm0
-; BDVER3-NEXT: vprotd %xmm0, (%rdi), %xmm0
-; BDVER3-NEXT: vprotq %xmm0, (%rdi), %xmm0
-; BDVER3-NEXT: vprotw %xmm0, (%rdi), %xmm0
-; BDVER3-NEXT: vprotb $7, %xmm0, %xmm0
-; BDVER3-NEXT: vprotd $7, %xmm0, %xmm0
-; BDVER3-NEXT: vprotq $7, %xmm0, %xmm0
-; BDVER3-NEXT: vprotw $7, %xmm0, %xmm0
-; BDVER3-NEXT: vprotb $7, (%rdi), %xmm0
-; BDVER3-NEXT: vprotd $7, (%rdi), %xmm0
-; BDVER3-NEXT: vprotq $7, (%rdi), %xmm0
-; BDVER3-NEXT: vprotw $7, (%rdi), %xmm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vprot:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vprotb %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: vprotd %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: vprotq %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: vprotw %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: vprotb (%rdi), %xmm0, %xmm0
-; BDVER4-NEXT: vprotd (%rdi), %xmm0, %xmm0
-; BDVER4-NEXT: vprotq (%rdi), %xmm0, %xmm0
-; BDVER4-NEXT: vprotw (%rdi), %xmm0, %xmm0
-; BDVER4-NEXT: vprotb %xmm0, (%rdi), %xmm0
-; BDVER4-NEXT: vprotd %xmm0, (%rdi), %xmm0
-; BDVER4-NEXT: vprotq %xmm0, (%rdi), %xmm0
-; BDVER4-NEXT: vprotw %xmm0, (%rdi), %xmm0
-; BDVER4-NEXT: vprotb $7, %xmm0, %xmm0
-; BDVER4-NEXT: vprotd $7, %xmm0, %xmm0
-; BDVER4-NEXT: vprotq $7, %xmm0, %xmm0
-; BDVER4-NEXT: vprotw $7, %xmm0, %xmm0
-; BDVER4-NEXT: vprotb $7, (%rdi), %xmm0
-; BDVER4-NEXT: vprotd $7, (%rdi), %xmm0
-; BDVER4-NEXT: vprotq $7, (%rdi), %xmm0
-; BDVER4-NEXT: vprotw $7, (%rdi), %xmm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: retq
- call void asm sideeffect "vprotb $1, $0, $0 \0A\09 vprotd $1, $0, $0 \0A\09 vprotq $1, $0, $0 \0A\09 vprotw $1, $0, $0 \0A\09 vprotb $2, $0, $0 \0A\09 vprotd $2, $0, $0 \0A\09 vprotq $2, $0, $0 \0A\09 vprotw $2, $0, $0 \0A\09 vprotb $0, $2, $0 \0A\09 vprotd $0, $2, $0 \0A\09 vprotq $0, $2, $0 \0A\09 vprotw $0, $2, $0 \0A\09 vprotb $3, $0, $0 \0A\09 vprotd $3, $0, $0 \0A\09 vprotq $3, $0, $0 \0A\09 vprotw $3, $0, $0 \0A\09 vprotb $3, $2, $0 \0A\09 vprotd $3, $2, $0 \0A\09 vprotq $3, $2, $0 \0A\09 vprotw $3, $2, $0", "x,x,*m,i"(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> *%a2, i8 7)
- ret void
-}
-
-define void @test_vpsha(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> *%a2) {
-; GENERIC-LABEL: test_vpsha:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vpshab %xmm1, %xmm0, %xmm0 # sched: [1:1.00]
-; GENERIC-NEXT: vpshad %xmm1, %xmm0, %xmm0 # sched: [1:1.00]
-; GENERIC-NEXT: vpshaq %xmm1, %xmm0, %xmm0 # sched: [1:1.00]
-; GENERIC-NEXT: vpshaw %xmm1, %xmm0, %xmm0 # sched: [1:1.00]
-; GENERIC-NEXT: vpshab (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
-; GENERIC-NEXT: vpshad (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
-; GENERIC-NEXT: vpshaq (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
-; GENERIC-NEXT: vpshaw (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
-; GENERIC-NEXT: vpshab %xmm0, (%rdi), %xmm0 # sched: [7:1.00]
-; GENERIC-NEXT: vpshad %xmm0, (%rdi), %xmm0 # sched: [7:1.00]
-; GENERIC-NEXT: vpshaq %xmm0, (%rdi), %xmm0 # sched: [7:1.00]
-; GENERIC-NEXT: vpshaw %xmm0, (%rdi), %xmm0 # sched: [7:1.00]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vpsha:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vpshab %xmm1, %xmm0, %xmm0 # sched: [3:0.50]
-; BDVER12-NEXT: vpshad %xmm1, %xmm0, %xmm0 # sched: [3:0.50]
-; BDVER12-NEXT: vpshaq %xmm1, %xmm0, %xmm0 # sched: [3:0.50]
-; BDVER12-NEXT: vpshaw %xmm1, %xmm0, %xmm0 # sched: [3:0.50]
-; BDVER12-NEXT: vpshab (%rdi), %xmm0, %xmm0 # sched: [8:0.50]
-; BDVER12-NEXT: vpshad (%rdi), %xmm0, %xmm0 # sched: [8:0.50]
-; BDVER12-NEXT: vpshaq (%rdi), %xmm0, %xmm0 # sched: [8:0.50]
-; BDVER12-NEXT: vpshaw (%rdi), %xmm0, %xmm0 # sched: [8:0.50]
-; BDVER12-NEXT: vpshab %xmm0, (%rdi), %xmm0 # sched: [8:0.50]
-; BDVER12-NEXT: vpshad %xmm0, (%rdi), %xmm0 # sched: [8:0.50]
-; BDVER12-NEXT: vpshaq %xmm0, (%rdi), %xmm0 # sched: [8:0.50]
-; BDVER12-NEXT: vpshaw %xmm0, (%rdi), %xmm0 # sched: [8:0.50]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vpsha:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vpshab %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: vpshad %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: vpshaq %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: vpshaw %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: vpshab (%rdi), %xmm0, %xmm0
-; BDVER3-NEXT: vpshad (%rdi), %xmm0, %xmm0
-; BDVER3-NEXT: vpshaq (%rdi), %xmm0, %xmm0
-; BDVER3-NEXT: vpshaw (%rdi), %xmm0, %xmm0
-; BDVER3-NEXT: vpshab %xmm0, (%rdi), %xmm0
-; BDVER3-NEXT: vpshad %xmm0, (%rdi), %xmm0
-; BDVER3-NEXT: vpshaq %xmm0, (%rdi), %xmm0
-; BDVER3-NEXT: vpshaw %xmm0, (%rdi), %xmm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vpsha:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vpshab %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: vpshad %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: vpshaq %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: vpshaw %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: vpshab (%rdi), %xmm0, %xmm0
-; BDVER4-NEXT: vpshad (%rdi), %xmm0, %xmm0
-; BDVER4-NEXT: vpshaq (%rdi), %xmm0, %xmm0
-; BDVER4-NEXT: vpshaw (%rdi), %xmm0, %xmm0
-; BDVER4-NEXT: vpshab %xmm0, (%rdi), %xmm0
-; BDVER4-NEXT: vpshad %xmm0, (%rdi), %xmm0
-; BDVER4-NEXT: vpshaq %xmm0, (%rdi), %xmm0
-; BDVER4-NEXT: vpshaw %xmm0, (%rdi), %xmm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: retq
- call void asm sideeffect "vpshab $1, $0, $0 \0A\09 vpshad $1, $0, $0 \0A\09 vpshaq $1, $0, $0 \0A\09 vpshaw $1, $0, $0 \0A\09 vpshab $2, $0, $0 \0A\09 vpshad $2, $0, $0 \0A\09 vpshaq $2, $0, $0 \0A\09 vpshaw $2, $0, $0 \0A\09 vpshab $0, $2, $0 \0A\09 vpshad $0, $2, $0 \0A\09 vpshaq $0, $2, $0 \0A\09 vpshaw $0, $2, $0", "x,x,*m"(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> *%a2)
- ret void
-}
-
-define void @test_vpshl(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> *%a2) {
-; GENERIC-LABEL: test_vpshl:
-; GENERIC: # %bb.0:
-; GENERIC-NEXT: #APP
-; GENERIC-NEXT: vpshlb %xmm1, %xmm0, %xmm0 # sched: [1:1.00]
-; GENERIC-NEXT: vpshld %xmm1, %xmm0, %xmm0 # sched: [1:1.00]
-; GENERIC-NEXT: vpshlq %xmm1, %xmm0, %xmm0 # sched: [1:1.00]
-; GENERIC-NEXT: vpshlw %xmm1, %xmm0, %xmm0 # sched: [1:1.00]
-; GENERIC-NEXT: vpshlb (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
-; GENERIC-NEXT: vpshld (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
-; GENERIC-NEXT: vpshlq (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
-; GENERIC-NEXT: vpshlw (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
-; GENERIC-NEXT: vpshlb %xmm0, (%rdi), %xmm0 # sched: [7:1.00]
-; GENERIC-NEXT: vpshld %xmm0, (%rdi), %xmm0 # sched: [7:1.00]
-; GENERIC-NEXT: vpshlq %xmm0, (%rdi), %xmm0 # sched: [7:1.00]
-; GENERIC-NEXT: vpshlw %xmm0, (%rdi), %xmm0 # sched: [7:1.00]
-; GENERIC-NEXT: #NO_APP
-; GENERIC-NEXT: retq # sched: [1:1.00]
-;
-; BDVER12-LABEL: test_vpshl:
-; BDVER12: # %bb.0:
-; BDVER12-NEXT: #APP
-; BDVER12-NEXT: vpshlb %xmm1, %xmm0, %xmm0 # sched: [3:0.50]
-; BDVER12-NEXT: vpshld %xmm1, %xmm0, %xmm0 # sched: [3:0.50]
-; BDVER12-NEXT: vpshlq %xmm1, %xmm0, %xmm0 # sched: [3:0.50]
-; BDVER12-NEXT: vpshlw %xmm1, %xmm0, %xmm0 # sched: [3:0.50]
-; BDVER12-NEXT: vpshlb (%rdi), %xmm0, %xmm0 # sched: [8:0.50]
-; BDVER12-NEXT: vpshld (%rdi), %xmm0, %xmm0 # sched: [8:0.50]
-; BDVER12-NEXT: vpshlq (%rdi), %xmm0, %xmm0 # sched: [8:0.50]
-; BDVER12-NEXT: vpshlw (%rdi), %xmm0, %xmm0 # sched: [8:0.50]
-; BDVER12-NEXT: vpshlb %xmm0, (%rdi), %xmm0 # sched: [8:0.50]
-; BDVER12-NEXT: vpshld %xmm0, (%rdi), %xmm0 # sched: [8:0.50]
-; BDVER12-NEXT: vpshlq %xmm0, (%rdi), %xmm0 # sched: [8:0.50]
-; BDVER12-NEXT: vpshlw %xmm0, (%rdi), %xmm0 # sched: [8:0.50]
-; BDVER12-NEXT: #NO_APP
-; BDVER12-NEXT: retq # sched: [5:1.00]
-;
-; BDVER3-LABEL: test_vpshl:
-; BDVER3: # %bb.0:
-; BDVER3-NEXT: #APP
-; BDVER3-NEXT: vpshlb %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: vpshld %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: vpshlq %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: vpshlw %xmm1, %xmm0, %xmm0
-; BDVER3-NEXT: vpshlb (%rdi), %xmm0, %xmm0
-; BDVER3-NEXT: vpshld (%rdi), %xmm0, %xmm0
-; BDVER3-NEXT: vpshlq (%rdi), %xmm0, %xmm0
-; BDVER3-NEXT: vpshlw (%rdi), %xmm0, %xmm0
-; BDVER3-NEXT: vpshlb %xmm0, (%rdi), %xmm0
-; BDVER3-NEXT: vpshld %xmm0, (%rdi), %xmm0
-; BDVER3-NEXT: vpshlq %xmm0, (%rdi), %xmm0
-; BDVER3-NEXT: vpshlw %xmm0, (%rdi), %xmm0
-; BDVER3-NEXT: #NO_APP
-; BDVER3-NEXT: retq
-;
-; BDVER4-LABEL: test_vpshl:
-; BDVER4: # %bb.0:
-; BDVER4-NEXT: #APP
-; BDVER4-NEXT: vpshlb %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: vpshld %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: vpshlq %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: vpshlw %xmm1, %xmm0, %xmm0
-; BDVER4-NEXT: vpshlb (%rdi), %xmm0, %xmm0
-; BDVER4-NEXT: vpshld (%rdi), %xmm0, %xmm0
-; BDVER4-NEXT: vpshlq (%rdi), %xmm0, %xmm0
-; BDVER4-NEXT: vpshlw (%rdi), %xmm0, %xmm0
-; BDVER4-NEXT: vpshlb %xmm0, (%rdi), %xmm0
-; BDVER4-NEXT: vpshld %xmm0, (%rdi), %xmm0
-; BDVER4-NEXT: vpshlq %xmm0, (%rdi), %xmm0
-; BDVER4-NEXT: vpshlw %xmm0, (%rdi), %xmm0
-; BDVER4-NEXT: #NO_APP
-; BDVER4-NEXT: retq
- call void asm sideeffect "vpshlb $1, $0, $0 \0A\09 vpshld $1, $0, $0 \0A\09 vpshlq $1, $0, $0 \0A\09 vpshlw $1, $0, $0 \0A\09 vpshlb $2, $0, $0 \0A\09 vpshld $2, $0, $0 \0A\09 vpshlq $2, $0, $0 \0A\09 vpshlw $2, $0, $0 \0A\09 vpshlb $0, $2, $0 \0A\09 vpshld $0, $2, $0 \0A\09 vpshlq $0, $2, $0 \0A\09 vpshlw $0, $2, $0", "x,x,*m"(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> *%a2)
- ret void
-}
Modified: llvm/trunk/tools/llvm-exegesis/llvm-exegesis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-exegesis/llvm-exegesis.cpp?rev=353043&r1=353042&r2=353043&view=diff
==============================================================================
--- llvm/trunk/tools/llvm-exegesis/llvm-exegesis.cpp (original)
+++ llvm/trunk/tools/llvm-exegesis/llvm-exegesis.cpp Mon Feb 4 04:51:26 2019
@@ -191,8 +191,7 @@ public:
// Implementation of the llvm::MCStreamer interface. We only care about
// instructions.
void EmitInstruction(const llvm::MCInst &Instruction,
- const llvm::MCSubtargetInfo &STI,
- bool PrintSchedInfo) override {
+ const llvm::MCSubtargetInfo &STI) override {
Result->Instructions.push_back(Instruction);
}
Modified: llvm/trunk/tools/llvm-mca/CodeRegionGenerator.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mca/CodeRegionGenerator.cpp?rev=353043&r1=353042&r2=353043&view=diff
==============================================================================
--- llvm/trunk/tools/llvm-mca/CodeRegionGenerator.cpp (original)
+++ llvm/trunk/tools/llvm-mca/CodeRegionGenerator.cpp Mon Feb 4 04:51:26 2019
@@ -48,8 +48,7 @@ public:
// We only want to intercept the emission of new instructions.
virtual void EmitInstruction(const MCInst &Inst,
- const MCSubtargetInfo & /* unused */,
- bool /* unused */) override {
+ const MCSubtargetInfo &/* unused */) override {
Regions.addInstruction(Inst);
}
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