[llvm] r352967 - [X86] Add another test case for PR40539. NFC

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Sat Feb 2 14:01:42 PST 2019


Author: ctopper
Date: Sat Feb  2 14:01:41 2019
New Revision: 352967

URL: http://llvm.org/viewvc/llvm-project?rev=352967&view=rev
Log:
[X86] Add another test case for PR40539. NFC

Modified:
    llvm/trunk/test/CodeGen/X86/pr40539.ll

Modified: llvm/trunk/test/CodeGen/X86/pr40539.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr40539.ll?rev=352967&r1=352966&r2=352967&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr40539.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr40539.ll Sat Feb  2 14:01:41 2019
@@ -34,3 +34,40 @@ entry:
   %3 = fcmp oeq float %conv, 0.000000e+00
   ret i1 %3
 }
+
+ at fpi = external global float, align 4
+
+define zeroext i1 @_Z8test_cosv() {
+; CHECK-LABEL: _Z8test_cosv:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    subl $8, %esp
+; CHECK-NEXT:    .cfi_def_cfa_offset 12
+; CHECK-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; CHECK-NEXT:    movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; CHECK-NEXT:    #APP
+; CHECK-NEXT:    fcos
+; CHECK-NEXT:    #NO_APP
+; CHECK-NEXT:    divss {{\.LCPI.*}}, %xmm0
+; CHECK-NEXT:    movss %xmm0, {{[0-9]+}}(%esp)
+; CHECK-NEXT:    flds {{[0-9]+}}(%esp)
+; CHECK-NEXT:    fstps (%esp)
+; CHECK-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; CHECK-NEXT:    ucomiss %xmm0, %xmm1
+; CHECK-NEXT:    setae %cl
+; CHECK-NEXT:    ucomiss {{\.LCPI.*}}, %xmm0
+; CHECK-NEXT:    setae %al
+; CHECK-NEXT:    andb %cl, %al
+; CHECK-NEXT:    addl $8, %esp
+; CHECK-NEXT:    .cfi_def_cfa_offset 4
+; CHECK-NEXT:    retl
+entry:
+  %0 = load float, float* @fpi, align 4
+  %div = fdiv float %0, 6.000000e+00
+  %1 = fpext float %div to x86_fp80
+  %2 = tail call x86_fp80 asm "fcos", "={st},0,~{dirflag},~{fpsr},~{flags}"(x86_fp80 %1)
+  %conv = fptrunc x86_fp80 %2 to float
+  %cmp = fcmp ole float %conv, 0x3FEBD70A40000000
+  %cmp1 = fcmp oge float %conv, 0x3FEB851EC0000000
+  %or.cond = and i1 %cmp, %cmp1
+  ret i1 %or.cond
+}




More information about the llvm-commits mailing list