[llvm] r352301 - GlobalISel: Fix typo in assert messages

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Sat Jan 26 16:53:54 PST 2019


Author: arsenm
Date: Sat Jan 26 16:53:54 2019
New Revision: 352301

URL: http://llvm.org/viewvc/llvm-project?rev=352301&view=rev
Log:
GlobalISel: Fix typo in assert messages

Modified:
    llvm/trunk/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp

Modified: llvm/trunk/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp?rev=352301&r1=352300&r2=352301&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp (original)
+++ llvm/trunk/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp Sat Jan 26 16:53:54 2019
@@ -974,7 +974,7 @@ MachineInstrBuilder MachineIRBuilder::bu
            "type mismatch in input list");
     assert(SrcOps.size() * SrcOps[0].getLLTTy(*getMRI()).getSizeInBits() ==
                DstOps[0].getLLTTy(*getMRI()).getSizeInBits() &&
-           "input scalars do not exactly cover the outpur vector register");
+           "input scalars do not exactly cover the output vector register");
     break;
   }
   case TargetOpcode::G_BUILD_VECTOR_TRUNC: {
@@ -1007,7 +1007,7 @@ MachineInstrBuilder MachineIRBuilder::bu
            "type mismatch in input list");
     assert(SrcOps.size() * SrcOps[0].getLLTTy(*getMRI()).getSizeInBits() ==
                DstOps[0].getLLTTy(*getMRI()).getSizeInBits() &&
-           "input vectors do not exactly cover the outpur vector register");
+           "input vectors do not exactly cover the output vector register");
     break;
   }
   case TargetOpcode::G_UADDE: {




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