[PATCH] D57246: GlobalISel: Fix address space limit in LLT

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added reviewers: aemerson, aditya_nandakumar, dsanders, volkan, paquette, qcolombet, t.p.northover.
Herald added subscribers: javed.absar, kristof.beyls, rovka, wdng.

The IR enforced limit for the address space is 24-bits, but LLT was
only using 23-bits. Additionally, the argument to the constructor was
truncating to 16-bits.

      

A similar problem still exists for the number of vector elements. The
IR enforces no limit, so if you try to use a vector with > 65535
elements the IRTranslator asserts in the LLT constructor.


https://reviews.llvm.org/D57246

Files:
  include/llvm/Support/LowLevelTypeImpl.h
  test/CodeGen/AArch64/GlobalISel/irtranslator-max-address-space.ll
  unittests/CodeGen/LowLevelTypeTest.cpp

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