[PATCH] D57156: [x86] narrow a shuffle that doesn't use or set any high elements

[Sanjay Patel via Phabricator via llvm-commits]

spatel updated this revision to Diff 183420.
spatel added a comment.

Patch updated:
Reduced logic duplication by refactoring the existing lowering code that does this transform and more.

I tried to share even more code by just making the existing code take a mode param to know if we were combining or lowering, but that doesn't work. During lowering, we require a web of subtarget checks to avoid fighting with other shuffle lowerings (infinite looping). We don't want those during this combine, or we'll lose optimizations.

I made this rev of the patch have the same constraints as the earlier version, so the test diffs are identical. It may be possible to allow some of the other shuffle narrowing transforms that we do during lowering, but I think that should be a follow-up (we may need other transforms to avoid regressions).


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D57156/new/

https://reviews.llvm.org/D57156

Files:
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/avg.ll
  test/CodeGen/X86/avx512-hadd-hsub.ll
  test/CodeGen/X86/madd.ll
  test/CodeGen/X86/min-legal-vector-width.ll
  test/CodeGen/X86/sad.ll
  test/CodeGen/X86/vector-compare-all_of.ll
  test/CodeGen/X86/vector-compare-any_of.ll
  test/CodeGen/X86/vector-reduce-add-widen.ll
  test/CodeGen/X86/vector-reduce-add.ll
  test/CodeGen/X86/vector-reduce-and-widen.ll
  test/CodeGen/X86/vector-reduce-and.ll
  test/CodeGen/X86/vector-reduce-fadd-fast.ll
  test/CodeGen/X86/vector-reduce-fmul-fast.ll
  test/CodeGen/X86/vector-reduce-mul-widen.ll
  test/CodeGen/X86/vector-reduce-mul.ll
  test/CodeGen/X86/vector-reduce-or-widen.ll
  test/CodeGen/X86/vector-reduce-or.ll
  test/CodeGen/X86/vector-reduce-xor-widen.ll
  test/CodeGen/X86/vector-reduce-xor.ll

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