[PATCH] D56772: [MIR] Add simple PRE pass to MachineCSE

[Hal Finkel via Phabricator via llvm-commits]

hfinkel added a comment.

Have you measured the compile-time impact?



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Comment at: lib/CodeGen/MachineCSE.cpp:755
+// We use stronger conditions for PREed instrs rather than for CSE ones
+// to decrease number of PREed instrs that won't be CSEed.
+bool MachineCSE::isPRECandidate(MachineInstr *MI) {
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I think it would be useful to elaborate on under what conditions we create these PRE instructions that are not later CSEd. Do you know how often that happens (I assume that you can figure this out by looking at the statistics and comparing runs where this happens vs. where it doesn't)?



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  https://reviews.llvm.org/D56772/new/

https://reviews.llvm.org/D56772