[PATCH] D57096: [RISCV] Custom-legalise i32 SDIV/UDIV/UREM on RV64M

[Alex Bradbury via Phabricator via llvm-commits]

asb created this revision.
asb added reviewers: efriedma, rogfer01, apazos.
Herald added subscribers: jocewei, PkmX, rkruppe, the_o, brucehoult, MartinMosbeck, edward-jones, zzheng, shiva0217, kito-cheng, niosHD, sabuasal, simoncook, johnrusso, rbar.

Follow the same custom legalisation strategy as used in D57085 <https://reviews.llvm.org/D57085> for variable-length shifts (see that patch summary for more discussion). Although we may lose out on some late-stage DAG combines, I think this custom legalisation strategy is ultimately easier to reason about.

There are some codegen changes in rv64m-exhaustive-w-insts.ll but they are all neutral in terms of the number of instructions.


https://reviews.llvm.org/D57096

Files:
  lib/Target/RISCV/RISCVISelLowering.cpp
  lib/Target/RISCV/RISCVISelLowering.h
  lib/Target/RISCV/RISCVInstrInfoM.td
  test/CodeGen/RISCV/rv64m-exhaustive-w-insts.ll

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