[PATCH] D57008: [AMDGPU] With XNACK, cannot clause a load with result coalesced with operand

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: test/CodeGen/AMDGPU/smem-no-clause-coalesced.mir:27-29
+    %18:vgpr_32 = COPY $vgpr1
+    %12:sgpr_32 = COPY $sgpr12
+    %3:sgpr_32 = COPY $sgpr3
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Can you run-pass=none to repack the register numbers


Repository:
  rL LLVM

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  https://reviews.llvm.org/D57008/new/

https://reviews.llvm.org/D57008