[PATCH] D56717: [SLH] AArch64: correctly pick temporary register to mask SP

Oliver Stannard via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jan 22 06:26:46 PST 2019


olista01 accepted this revision.
olista01 added a comment.
This revision is now accepted and ready to land.

LGTM with one nit.



================
Comment at: llvm/lib/Target/AArch64/AArch64SpeculationHardening.cpp:307
+    // already to do this - but it's unclear if that could easily be used here.
+    unsigned TmpReg = RS.FindUnusedReg(&AArch64::GPR64allRegClass);
+    LLVM_DEBUG(dbgs() << "RS finds "
----------------
GPR64allRegClass includes SP and XZR, I don't think it actually matters here because neither of them are allocatable, but it would be clearer to use GPR64common.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D56717/new/

https://reviews.llvm.org/D56717





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