[llvm] r351599 - AMDGPU/GlobalISel: Legalize more types for select
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 18 13:42:55 PST 2019
Author: arsenm
Date: Fri Jan 18 13:42:55 2019
New Revision: 351599
URL: http://llvm.org/viewvc/llvm-project?rev=351599&view=rev
Log:
AMDGPU/GlobalISel: Legalize more types for select
Modified:
llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir
llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect-select.mir
Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp?rev=351599&r1=351598&r2=351599&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp Fri Jan 18 13:42:55 2019
@@ -245,8 +245,10 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo
Atomics.legalFor({{S32, FlatPtr}, {S64, FlatPtr}});
}
- setAction({G_SELECT, S32}, Legal);
- setAction({G_SELECT, 1, S1}, Legal);
+ // TODO: Pointer types, any 32-bit or 64-bit vector
+ getActionDefinitionsBuilder(G_SELECT)
+ .legalFor({{S32, S1}, {S64, S1}, {V2S32, S1}, {V2S16, S1}})
+ .clampScalar(0, S32, S64);
setAction({G_SHL, S32}, Legal);
Modified: llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir?rev=351599&r1=351598&r2=351599&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir Fri Jan 18 13:42:55 2019
@@ -2,17 +2,18 @@
# RUN: llc -O0 -march=amdgcn -mcpu=fiji -run-pass=legalizer %s -o - | FileCheck %s
---
-name: test_select
+name: test_select_s32
body: |
bb.0:
liveins: $vgpr0
- ; CHECK-LABEL: name: test_select
+ ; CHECK-LABEL: name: test_select_s32
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[C]](s32), [[COPY]]
; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
; CHECK: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s1), [[C1]], [[C2]]
+ ; CHECK: $vgpr0 = COPY [[SELECT]](s32)
%0:_(s32) = G_CONSTANT i32 0
%1:_(s32) = COPY $vgpr0
@@ -23,3 +24,158 @@ body: |
$vgpr0 = COPY %5
...
+
+---
+name: test_select_s64
+body: |
+ bb.0:
+ liveins: $vgpr0
+ ; CHECK-LABEL: name: test_select_s64
+ ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+ ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+ ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[C]](s32), [[COPY]]
+ ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
+ ; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
+ ; CHECK: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[C1]], [[C2]]
+ ; CHECK: $vgpr0_vgpr1 = COPY [[SELECT]](s64)
+ %0:_(s32) = G_CONSTANT i32 0
+ %1:_(s32) = COPY $vgpr0
+
+ %2:_(s1) = G_ICMP intpred(ne), %0, %1
+ %3:_(s64) = G_CONSTANT i64 1
+ %4:_(s64) = G_CONSTANT i64 2
+ %5:_(s64) = G_SELECT %2, %3, %4
+ $vgpr0_vgpr1 = COPY %5
+
+...
+
+---
+name: test_select_v2s32
+body: |
+ bb.0:
+ liveins: $vgpr0
+ ; CHECK-LABEL: name: test_select_v2s32
+ ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+ ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+ ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[C]](s32), [[COPY]]
+ ; CHECK: [[C1:%[0-9]+]]:_(<2 x s32>) = G_CONSTANT i32 1
+ ; CHECK: [[C2:%[0-9]+]]:_(<2 x s32>) = G_CONSTANT i32 2
+ ; CHECK: [[SELECT:%[0-9]+]]:_(<2 x s32>) = G_SELECT [[ICMP]](s1), [[C1]], [[C2]]
+ ; CHECK: $vgpr0_vgpr1 = COPY [[SELECT]](<2 x s32>)
+ %0:_(s32) = G_CONSTANT i32 0
+ %1:_(s32) = COPY $vgpr0
+
+ %2:_(s1) = G_ICMP intpred(ne), %0, %1
+ %3:_(<2 x s32>) = G_CONSTANT i32 1
+ %4:_(<2 x s32>) = G_CONSTANT i32 2
+ %5:_(<2 x s32>) = G_SELECT %2, %3, %4
+ $vgpr0_vgpr1 = COPY %5
+
+...
+
+---
+name: test_select_s16
+body: |
+ bb.0:
+ liveins: $vgpr0
+ ; CHECK-LABEL: name: test_select_s16
+ ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+ ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+ ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[C]](s32), [[COPY]]
+ ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+ ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
+ ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
+ ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[C2]](s32)
+ ; CHECK: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s1), [[COPY1]], [[COPY2]]
+ ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
+ ; CHECK: $vgpr0 = COPY [[COPY3]](s32)
+ %0:_(s32) = G_CONSTANT i32 0
+ %1:_(s32) = COPY $vgpr0
+
+ %2:_(s1) = G_ICMP intpred(ne), %0, %1
+ %3:_(s16) = G_CONSTANT i16 1
+ %4:_(s16) = G_CONSTANT i16 2
+ %5:_(s16) = G_SELECT %2, %3, %4
+ %6:_(s32) = G_ANYEXT %5
+ $vgpr0 = COPY %6
+
+...
+
+---
+name: test_select_s8
+body: |
+ bb.0:
+ liveins: $vgpr0
+ ; CHECK-LABEL: name: test_select_s8
+ ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+ ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+ ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[C]](s32), [[COPY]]
+ ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+ ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
+ ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
+ ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[C2]](s32)
+ ; CHECK: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s1), [[COPY1]], [[COPY2]]
+ ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
+ ; CHECK: $vgpr0 = COPY [[COPY3]](s32)
+ %0:_(s32) = G_CONSTANT i32 0
+ %1:_(s32) = COPY $vgpr0
+
+ %2:_(s1) = G_ICMP intpred(ne), %0, %1
+ %3:_(s8) = G_CONSTANT i16 1
+ %4:_(s8) = G_CONSTANT i16 2
+ %5:_(s8) = G_SELECT %2, %3, %4
+ %6:_(s32) = G_ANYEXT %5
+ $vgpr0 = COPY %6
+
+...
+
+---
+name: test_select_s7
+body: |
+ bb.0:
+ liveins: $vgpr0
+ ; CHECK-LABEL: name: test_select_s7
+ ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+ ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+ ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[C]](s32), [[COPY]]
+ ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+ ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
+ ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
+ ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[C2]](s32)
+ ; CHECK: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s1), [[COPY1]], [[COPY2]]
+ ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
+ ; CHECK: $vgpr0 = COPY [[COPY3]](s32)
+ %0:_(s32) = G_CONSTANT i32 0
+ %1:_(s32) = COPY $vgpr0
+
+ %2:_(s1) = G_ICMP intpred(ne), %0, %1
+ %3:_(s7) = G_CONSTANT i16 1
+ %4:_(s7) = G_CONSTANT i16 2
+ %5:_(s7) = G_SELECT %2, %3, %4
+ %6:_(s32) = G_ANYEXT %5
+ $vgpr0 = COPY %6
+
+...
+---
+name: test_select_v2s16
+body: |
+ bb.0:
+ liveins: $vgpr0
+ ; CHECK-LABEL: name: test_select_v2s16
+ ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+ ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+ ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[C]](s32), [[COPY]]
+ ; CHECK: [[C1:%[0-9]+]]:_(<2 x s16>) = G_CONSTANT i32 1
+ ; CHECK: [[C2:%[0-9]+]]:_(<2 x s16>) = G_CONSTANT i32 2
+ ; CHECK: [[SELECT:%[0-9]+]]:_(<2 x s16>) = G_SELECT [[ICMP]](s1), [[C1]], [[C2]]
+ ; CHECK: $vgpr0 = COPY [[SELECT]](<2 x s16>)
+ %0:_(s32) = G_CONSTANT i32 0
+ %1:_(s32) = COPY $vgpr0
+
+ %2:_(s1) = G_ICMP intpred(ne), %0, %1
+ %3:_(<2 x s16>) = G_CONSTANT i32 1
+ %4:_(<2 x s16>) = G_CONSTANT i32 2
+ %5:_(<2 x s16>) = G_SELECT %2, %3, %4
+ $vgpr0 = COPY %5
+
+...
Modified: llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect-select.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect-select.mir?rev=351599&r1=351598&r2=351599&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect-select.mir (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect-select.mir Fri Jan 18 13:42:55 2019
@@ -3,12 +3,12 @@
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -global-isel %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck %s
---
-name: select_sss
+name: select_s32_sss
legalized: true
body: |
bb.0:
liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3
- ; CHECK-LABEL: name: select_sss
+ ; CHECK-LABEL: name: select_s32_sss
; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
; CHECK: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr2
@@ -24,12 +24,12 @@ body: |
...
---
-name: select_ssv
+name: select_s32_ssv
legalized: true
body: |
bb.0:
liveins: $sgpr0, $sgpr1, $sgpr2, $vgpr0
- ; CHECK-LABEL: name: select_ssv
+ ; CHECK-LABEL: name: select_s32_ssv
; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
; CHECK: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr2
@@ -48,12 +48,12 @@ body: |
...
---
-name: select_svs
+name: select_s32_svs
legalized: true
body: |
bb.0:
liveins: $sgpr0, $sgpr1, $sgpr2, $vgpr0
- ; CHECK-LABEL: name: select_svs
+ ; CHECK-LABEL: name: select_s32_svs
; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
; CHECK: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr2
@@ -71,12 +71,12 @@ body: |
...
---
-name: select_svv
+name: select_s32_svv
legalized: true
body: |
bb.0:
liveins: $sgpr0, $sgpr1, $vgpr0, $vgpr1
- ; CHECK-LABEL: name: select_svv
+ ; CHECK-LABEL: name: select_s32_svv
; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
@@ -93,12 +93,12 @@ body: |
...
---
-name: select_vss
+name: select_s32_vss
legalized: true
body: |
bb.0:
liveins: $sgpr0, $sgpr1, $vgpr0, $vgpr1
- ; CHECK-LABEL: name: select_vss
+ ; CHECK-LABEL: name: select_s32_vss
; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
@@ -116,12 +116,12 @@ body: |
...
---
-name: select_vsv
+name: select_s32_vsv
legalized: true
body: |
bb.0:
liveins: $sgpr0, $vgpr0, $vgpr1, $vgpr2
- ; CHECK-LABEL: name: select_vsv
+ ; CHECK-LABEL: name: select_s32_vsv
; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
@@ -138,12 +138,12 @@ body: |
...
---
-name: select_vvs
+name: select_s32_vvs
legalized: true
body: |
bb.0:
liveins: $sgpr0, $vgpr0, $vgpr1, $vgpr2
- ; CHECK-LABEL: name: select_vvs
+ ; CHECK-LABEL: name: select_s32_vvs
; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
@@ -160,12 +160,12 @@ body: |
...
---
-name: select_vvv
+name: select_s32_vvv
legalized: true
body: |
bb.0:
liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
- ; CHECK-LABEL: name: select_vvv
+ ; CHECK-LABEL: name: select_s32_vvv
; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr2
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