[PATCH] D56922: [X86][BtVer2] Update the WriteLoad latency.

[Andrea Di Biagio via Phabricator via llvm-commits]

andreadb created this revision.
andreadb added reviewers: RKSimon, spatel, craig.topper.
Herald added a subscriber: gbedwell.

r327630 introduced new write definitions for float/vector loads.
Before that revision, `WriteLoad` was used by both integer/float (scalar/vector) load. So, `WriteLoad` had to conservatively declare a latency to 5cy. That is because the load-to-use latency for float/vector load is 5cy.

Now that we have dedicated writes for float/vector loads, there is no reason why we should keep the latency of `WriteLoad` to 5cy. At the moment, WriteLoad is only used by scalar integer loads only; we can assume an optimstic 3cy latency for them.
This patch changes that latency from 5cy to 3cy, and regenerates the affected scheduling/mca tests.


https://reviews.llvm.org/D56922

Files:
  lib/Target/X86/X86ScheduleBtVer2.td
  test/CodeGen/X86/schedule-x86-64-shld.ll
  test/CodeGen/X86/schedule-x86_32.ll
  test/CodeGen/X86/schedule-x86_64.ll
  test/CodeGen/X86/sse-schedule.ll
  test/CodeGen/X86/sse2-schedule.ll
  test/CodeGen/X86/x87-schedule.ll
  test/tools/llvm-mca/X86/BtVer2/resources-avx1.s
  test/tools/llvm-mca/X86/BtVer2/resources-prefetchw.s
  test/tools/llvm-mca/X86/BtVer2/resources-sse1.s
  test/tools/llvm-mca/X86/BtVer2/resources-sse2.s
  test/tools/llvm-mca/X86/BtVer2/resources-x86_64.s
  test/tools/llvm-mca/X86/BtVer2/resources-x87.s

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