[PATCH] D56784: [X86][SSE] Use PSLLDQ/PSRLDQ to mask out zeroable ends of a shuffle

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added a comment.

In D56784#1360580 <https://reviews.llvm.org/D56784#1360580>, @spatel wrote:

> The double-shift cases look good, but I'm skeptical about the triple-shift. Wouldn't those always be better with an 'and' mask followed by shift? We reduce the dependent chain of vector ops and instruction count for the cost of a speculatable constant pool load.


I did consider that but then we contradict the "3 op limit" for older machines (like pre-SSSE3) before using "variable" shuffle masks - which includes AND masks.


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