[PATCH] D56771: [X86] Use X86ISD::BLENDV for blendv intrinsics. Replace vselect with blendv just before isel table lookup. Remove vselect isel patterns.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jan 15 23:55:23 PST 2019


craig.topper created this revision.
craig.topper added reviewers: RKSimon, spatel.

This cleans up the duplication we have with both intrinsic isel patterns and vselect isel patterns. This should also allow the intrinsics to demanded bits support for the condition.

I've switched the canonical pattern in isel to use the X86ISD::BLENDV node instead of VSELECT. Since it always seemed weird to move from BLENDV with its relaxed rules on condition bits to VSELECT which has strict rules about all bits of the condition element being the same. Its more correct to go from VSELECT to BLENDV.


Repository:
  rL LLVM

https://reviews.llvm.org/D56771

Files:
  lib/Target/X86/X86ISelDAGToDAG.cpp
  lib/Target/X86/X86ISelLowering.cpp
  lib/Target/X86/X86ISelLowering.h
  lib/Target/X86/X86InstrFragmentsSIMD.td
  lib/Target/X86/X86InstrSSE.td
  lib/Target/X86/X86IntrinsicsInfo.h

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