[PATCH] D56281: [DAGCombiner] reduce buildvec of zexted extracted element to shuffle

Sanjay Patel via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jan 15 07:47:50 PST 2019


spatel marked 2 inline comments as done.
spatel added inline comments.


================
Comment at: test/CodeGen/X86/buildvec-extract.ll:412
+; SSE2-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[3,2,0,1,4,5,6,7]
+; SSE2-NEXT:    retq
+;
----------------
RKSimon wrote:
> Please can you raise a bug on this - we should do better for this shuffle.
https://bugs.llvm.org/show_bug.cgi?id=40318


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D56281/new/

https://reviews.llvm.org/D56281





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