[PATCH] D56714: [SLP] introduce control over arithmetic horizontal reduction

[Fedor Sergeev via Phabricator via llvm-commits]

fedor.sergeev updated this revision to Diff 181767.
fedor.sergeev added a comment.
Herald added a subscriber: zzheng.

adding control to a couple tests that expect hor to happen


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D56714/new/

https://reviews.llvm.org/D56714

Files:
  lib/Transforms/Vectorize/SLPVectorizer.cpp
  test/Transforms/SLPVectorizer/X86/PR39774.ll
  test/Transforms/SLPVectorizer/X86/reduction_unrolled.ll


Index: test/Transforms/SLPVectorizer/X86/reduction_unrolled.ll
===================================================================
--- test/Transforms/SLPVectorizer/X86/reduction_unrolled.ll
+++ test/Transforms/SLPVectorizer/X86/reduction_unrolled.ll
@@ -1,6 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -slp-vectorizer -slp-vectorize-hor -S -mtriple=x86_64-unknown-linux-gnu -mcpu=bdver2 -debug < %s 2>&1 | FileCheck %s --check-prefixes=CHECK,AVX
-; RUN: opt -slp-vectorizer -slp-vectorize-hor -S -mtriple=x86_64-unknown-linux-gnu -mcpu=core2 -debug < %s 2>&1 | FileCheck %s --check-prefixes=CHECK,SSE
+; RUN: opt -slp-vectorizer -slp-vectorize-hor -slp-vectorize-hor-arith=true -S -mtriple=x86_64-unknown-linux-gnu -mcpu=bdver2 -debug < %s 2>&1 | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: opt -slp-vectorizer -slp-vectorize-hor -slp-vectorize-hor-arith=true -S -mtriple=x86_64-unknown-linux-gnu -mcpu=core2 -debug < %s 2>&1 | FileCheck %s --check-prefixes=CHECK,SSE
 ; REQUIRES: asserts
 
 ; int test_add(unsigned int *p) {
Index: test/Transforms/SLPVectorizer/X86/PR39774.ll
===================================================================
--- test/Transforms/SLPVectorizer/X86/PR39774.ll
+++ test/Transforms/SLPVectorizer/X86/PR39774.ll
@@ -1,6 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -slp-vectorizer -S < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=skylake -slp-threshold=-7 | FileCheck %s --check-prefixes=ALL,CHECK
-; RUN: opt -slp-vectorizer -S < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=skylake -slp-threshold=-8 -slp-min-tree-size=6 | FileCheck %s --check-prefixes=ALL,FORCE_REDUCTION
+; RUN: opt -slp-vectorizer -slp-vectorize-hor -slp-vectorize-hor-arith=true -S < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=skylake -slp-threshold=-7 | FileCheck %s --check-prefixes=ALL,CHECK
+; RUN: opt -slp-vectorizer -slp-vectorize-hor -slp-vectorize-hor-arith=true -S < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=skylake -slp-threshold=-8 -slp-min-tree-size=6 | FileCheck %s --check-prefixes=ALL,FORCE_REDUCTION
 
 define void @Test(i32) {
 ; ALL-LABEL: @Test(
Index: lib/Transforms/Vectorize/SLPVectorizer.cpp
===================================================================
--- lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -115,6 +115,11 @@
 ShouldVectorizeHor("slp-vectorize-hor", cl::init(true), cl::Hidden,
                    cl::desc("Attempt to vectorize horizontal reductions"));
 
+static cl::opt<bool> ShouldVectorizeHorArith(
+    "slp-vectorize-hor-arith", cl::init(false), cl::Hidden,
+    cl::desc("Attempt to vectorize horizontal reductions for arithmetic "
+             "operations other than add/fadd."));
+
 static cl::opt<bool> ShouldStartVectorizeHorAtStore(
     "slp-vectorize-hor-store", cl::init(false), cl::Hidden,
     cl::desc(
@@ -5131,9 +5136,10 @@
              // We currently only support add/mul/logical && min/max reductions.
              ((Kind == RK_Arithmetic &&
                (Opcode == Instruction::Add || Opcode == Instruction::FAdd ||
-                Opcode == Instruction::Mul || Opcode == Instruction::FMul ||
-                Opcode == Instruction::And || Opcode == Instruction::Or ||
-                Opcode == Instruction::Xor)) ||
+                (ShouldVectorizeHorArith &&
+                 (Opcode == Instruction::Mul || Opcode == Instruction::FMul ||
+                  Opcode == Instruction::And || Opcode == Instruction::Or ||
+                  Opcode == Instruction::Xor)))) ||
               ((Opcode == Instruction::ICmp || Opcode == Instruction::FCmp) &&
                (Kind == RK_Min || Kind == RK_Max)) ||
               (Opcode == Instruction::ICmp &&


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