[llvm] r351073 - [DAGCombiner] Add (sub_sat x, x) -> 0 combine

[Simon Pilgrim via llvm-commits]

Author: rksimon
Date: Mon Jan 14 07:43:34 2019
New Revision: 351073

URL: http://llvm.org/viewvc/llvm-project?rev=351073&view=rev
Log:
[DAGCombiner] Add (sub_sat x, x) -> 0 combine

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    llvm/trunk/test/CodeGen/X86/combine-sub-ssat.ll
    llvm/trunk/test/CodeGen/X86/combine-sub-usat.ll

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=351073&r1=351072&r2=351073&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Mon Jan 14 07:43:34 2019
@@ -2800,6 +2800,10 @@ SDValue DAGCombiner::visitSUBSAT(SDNode
   if (N0.isUndef() || N1.isUndef())
     return DAG.getConstant(0, DL, VT);
 
+  // fold (sub_sat x, x) -> 0
+  if (N0 == N1)
+    return DAG.getConstant(0, DL, VT);
+
   if (DAG.isConstantIntBuildVectorOrConstantInt(N0) &&
       DAG.isConstantIntBuildVectorOrConstantInt(N1)) {
     // fold (sub_sat c1, c2) -> c3

Modified: llvm/trunk/test/CodeGen/X86/combine-sub-ssat.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/combine-sub-ssat.ll?rev=351073&r1=351072&r2=351073&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/combine-sub-ssat.ll (original)
+++ llvm/trunk/test/CodeGen/X86/combine-sub-ssat.ll Mon Jan 14 07:43:34 2019
@@ -96,12 +96,6 @@ define i32 @combine_self_i32(i32 %a0) {
 ; CHECK-LABEL: combine_self_i32:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    xorl %eax, %eax
-; CHECK-NEXT:    movl %edi, %ecx
-; CHECK-NEXT:    subl %edi, %ecx
-; CHECK-NEXT:    setns %al
-; CHECK-NEXT:    addl $2147483647, %eax # imm = 0x7FFFFFFF
-; CHECK-NEXT:    subl %edi, %edi
-; CHECK-NEXT:    cmovnol %edi, %eax
 ; CHECK-NEXT:    retq
   %1 = call i32 @llvm.ssub.sat.i32(i32 %a0, i32 %a0)
   ret i32 %1
@@ -110,12 +104,12 @@ define i32 @combine_self_i32(i32 %a0) {
 define <8 x i16> @combine_self_v8i16(<8 x i16> %a0) {
 ; SSE-LABEL: combine_self_v8i16:
 ; SSE:       # %bb.0:
-; SSE-NEXT:    psubsw %xmm0, %xmm0
+; SSE-NEXT:    xorps %xmm0, %xmm0
 ; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: combine_self_v8i16:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vpsubsw %xmm0, %xmm0, %xmm0
+; AVX-NEXT:    vxorps %xmm0, %xmm0, %xmm0
 ; AVX-NEXT:    retq
   %1 = call <8 x i16> @llvm.ssub.sat.v8i16(<8 x i16> %a0, <8 x i16> %a0)
   ret <8 x i16> %1

Modified: llvm/trunk/test/CodeGen/X86/combine-sub-usat.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/combine-sub-usat.ll?rev=351073&r1=351072&r2=351073&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/combine-sub-usat.ll (original)
+++ llvm/trunk/test/CodeGen/X86/combine-sub-usat.ll Mon Jan 14 07:43:34 2019
@@ -96,8 +96,6 @@ define i32 @combine_self_i32(i32 %a0) {
 ; CHECK-LABEL: combine_self_i32:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    xorl %eax, %eax
-; CHECK-NEXT:    subl %edi, %edi
-; CHECK-NEXT:    cmovael %edi, %eax
 ; CHECK-NEXT:    retq
   %1 = call i32 @llvm.usub.sat.i32(i32 %a0, i32 %a0)
   ret i32 %1
@@ -106,12 +104,12 @@ define i32 @combine_self_i32(i32 %a0) {
 define <8 x i16> @combine_self_v8i16(<8 x i16> %a0) {
 ; SSE-LABEL: combine_self_v8i16:
 ; SSE:       # %bb.0:
-; SSE-NEXT:    psubusw %xmm0, %xmm0
+; SSE-NEXT:    xorps %xmm0, %xmm0
 ; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: combine_self_v8i16:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vpsubusw %xmm0, %xmm0, %xmm0
+; AVX-NEXT:    vxorps %xmm0, %xmm0, %xmm0
 ; AVX-NEXT:    retq
   %1 = call <8 x i16> @llvm.usub.sat.v8i16(<8 x i16> %a0, <8 x i16> %a0)
   ret <8 x i16> %1