[PATCH] D56281: [DAGCombiner] reduce buildvec of zexted extracted element to shuffle

[Sanjay Patel via Phabricator via llvm-commits]

spatel created this revision.
spatel added reviewers: craig.topper, RKSimon, andreadb.
Herald added a subscriber: mcrosier.

The motivating case for this is shown in the first regression test. We are transferring to scalar and back rather than just zero-extending with 'vpmovzxdq'.

That's a special-case for a more general pattern as shown here. In all tests, we're avoiding the vector-scalar-vector moves in favor of vector ops.

I suspect that we aren't producing optimal shuffle code in some cases though, so we may want to limit this patch and/or account for those patterns first. But I figured it was worth posting the larger test diffs, so we can see what's happening and make sure the logic is correct.

If we want to limit this patch but still get that 1st motivating case, I see 2 possibilities:

1. Don't handle patterns where we require translating the source element to a different location in the result.
2. Don't handle patterns with zero elements in the build vector (only deal with undefs there).


https://reviews.llvm.org/D56281

Files:
  lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  test/CodeGen/X86/buildvec-extract.ll

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