[llvm] r350277 - [tblgen][disasm] Emit record names again when decoder conflicts occur.

Daniel Sanders via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 2 16:14:33 PST 2019


Author: dsanders
Date: Wed Jan  2 16:14:33 2019
New Revision: 350277

URL: http://llvm.org/viewvc/llvm-project?rev=350277&view=rev
Log:
[tblgen][disasm] Emit record names again when decoder conflicts occur.

And add a test for it.

Added:
    llvm/trunk/test/TableGen/FixedLenDecoderEmitter/
    llvm/trunk/test/TableGen/FixedLenDecoderEmitter/conflict.td
Modified:
    llvm/trunk/utils/TableGen/FixedLenDecoderEmitter.cpp

Added: llvm/trunk/test/TableGen/FixedLenDecoderEmitter/conflict.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/TableGen/FixedLenDecoderEmitter/conflict.td?rev=350277&view=auto
==============================================================================
--- llvm/trunk/test/TableGen/FixedLenDecoderEmitter/conflict.td (added)
+++ llvm/trunk/test/TableGen/FixedLenDecoderEmitter/conflict.td Wed Jan  2 16:14:33 2019
@@ -0,0 +1,35 @@
+// RUN: llvm-tblgen -gen-disassembler -I %p/../../../include %s -o - 2>%t
+// RUN: FileCheck %s < %t
+
+include "llvm/Target/Target.td"
+
+def MyTargetISA : InstrInfo;
+def MyTarget : Target { let InstructionSet = MyTargetISA; }
+
+def R0 : Register<"r0"> { let Namespace = "MyTarget"; }
+def GPR32 : RegisterClass<"MyTarget", [i32], 32, (add R0)>;
+
+class I<dag OOps, dag IOps, list<dag> Pat>
+  : Instruction {
+  let Namespace = "MyTarget";
+  let OutOperandList = OOps;
+  let InOperandList = IOps;
+  let Pattern = Pat;
+  bits<32> Inst;
+  bits<32> SoftFail;
+}
+
+def A : I<(outs GPR32:$dst), (ins GPR32:$src1), []> {
+  let Size = 4;
+  let Inst{31-0} = 0;
+}
+def B : I<(outs GPR32:$dst), (ins GPR32:$src1), []> {
+  let Size = 4;
+  let Inst{31-0} = 0;
+}
+
+// CHECK: Decoding Conflict:
+// CHECK:   00000000000000000000000000000000
+// CHECK:   ................................
+// CHECK: A 00000000000000000000000000000000
+// CHECK: B 00000000000000000000000000000000

Modified: llvm/trunk/utils/TableGen/FixedLenDecoderEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/FixedLenDecoderEmitter.cpp?rev=350277&r1=350276&r2=350277&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/FixedLenDecoderEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/FixedLenDecoderEmitter.cpp Wed Jan  2 16:14:33 2019
@@ -1717,7 +1717,7 @@ void FilterChooser::emitTableEntries(Dec
   dumpStack(errs(), "\t\t");
 
   for (unsigned i = 0; i < Opcodes.size(); ++i) {
-    errs() << '\t' << Opcodes[i] << " ";
+    errs() << '\t' << AllInstructions[Opcodes[i]] << " ";
     dumpBits(errs(),
              getBitsField(*AllInstructions[Opcodes[i]].EncodingDef, "Inst"));
     errs() << '\n';




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