[PATCH] D56175: [PowerPC] Exploit store instructions that store a single vector element

Nemanja Ivanovic via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 31 12:09:24 PST 2018


nemanjai marked an inline comment as done.
nemanjai added inline comments.


================
Comment at: test/CodeGen/PowerPC/extract-and-store.ll:118
+; CHECK-NEXT:    addi r3, r7, 12
+; CHECK-NEXT:    stfiwx f0, 0, r3
 ; CHECK-NEXT:    blr
----------------
One of the unanswered comments from the original patch was along the lines of:
"The `stfs` instruction performs a conversion from 8-byte single precision (that PPC uses for single precision representation in registers) to 4-byte single precision (the in-memory single precision representation). The updated code no longer involves such a conversion, is that semantically correct?"

The short answer is yes. The reason we don't need this conversion is that single precision vector elements are represented the same way in registers and memory. If you inspect the original code sequence carefully, you'll see that it does the following
- `xxsldwi` to line up the element into the correct location in the register
- `xscvspdpn` to convert vector single precision to scalar single precision
- `stfs` to implicitly convert the value back and store it
The new sequence just skips all conversion and stores the single-precision vector element as a 4-byte single-precision value.


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D56175/new/

https://reviews.llvm.org/D56175





More information about the llvm-commits mailing list