[llvm] r349391 - [SDAG] Clarify the origin of chain in REG_SEQUENCE in comment, NFC

[Krzysztof Parzyszek via llvm-commits]

Author: kparzysz
Date: Mon Dec 17 12:30:20 2018
New Revision: 349391

URL: http://llvm.org/viewvc/llvm-project?rev=349391&view=rev
Log:
[SDAG] Clarify the origin of chain in REG_SEQUENCE in comment, NFC

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp?rev=349391&r1=349390&r2=349391&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp Mon Dec 17 12:30:20 2018
@@ -652,7 +652,9 @@ void InstrEmitter::EmitRegSequence(SDNod
   const MCInstrDesc &II = TII->get(TargetOpcode::REG_SEQUENCE);
   MachineInstrBuilder MIB = BuildMI(*MF, Node->getDebugLoc(), II, NewVReg);
   unsigned NumOps = Node->getNumOperands();
-  // REG_SEQUENCE can "inherit" a chain from a subnode.
+  // If the input pattern has a chain, then the root of the corresponding
+  // output pattern will get a chain as well. This can happen to be a
+  // REG_SEQUENCE (which is not "guarded" by countOperands/CountResults).
   if (NumOps && Node->getOperand(NumOps-1).getValueType() == MVT::Other)
     --NumOps; // Ignore chain if it exists.