[PATCH] D55373: [LSR] Generate formulae to enable more post-incs

Gil Rapaport via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Dec 16 05:57:48 PST 2018


gilr added inline comments.


================
Comment at: lib/Transforms/Scalar/LoopStrengthReduce.cpp:1258
+        if (isa<SCEVConstant>(AR->getOperand(1))) {
+          if (auto *Start = GetConstantStart(AR)) {
+            const APInt &StartInt = Start->getAPInt();
----------------
- The existing `{LI, +, C}` pattern seems to already match this case (i.e. `{(-C + %a + ...), +, C}`) and the more general case `{(Offset - C2) + %a + ...), +, C2}`, where Offset =/= 0. So IIUC matching this pattern here is only needed if the new TTI flag is set but the existing one is reset, right?
- Won't this also match something like `{3, +, 5, +, %x}`?



================
Comment at: lib/Transforms/Scalar/LoopStrengthReduce.cpp:1384
         !isAMCompletelyFolded(TTI, LSRUse::Address, LU.AccessTy, F.BaseGV,
-                              Offset, F.HasBaseReg, F.Scale, Fixup.UserInst))
+                              Offset, F.HasBaseReg, F.Scale, Fixup.UserInst)) {
       C.NumBaseAdds++;
----------------
IIRC single-statement clauses shouldn't get curly braces.


================
Comment at: lib/Transforms/Scalar/LoopStrengthReduce.cpp:3802
+  // the pointer for itself in the next iteration.
+  if (TTI.shouldFavorCrossIterationPostInc() && LU.Kind == LSRUse::Address) {
+    if (auto *GAddRec = dyn_cast<SCEVAddRecExpr>(G)) {
----------------
The new TTI API relates to the same HW feature, right? Why not use a cl::opt in LSR to turn this optimization off?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D55373/new/

https://reviews.llvm.org/D55373





More information about the llvm-commits mailing list