[PATCH] D55506: [RFC v2] Allow target to handle STRICT floating-point nodes

[Cameron McInally via Phabricator via llvm-commits]

cameron.mcinally added a comment.

I like this implementation a lot. Some targets control the FPEnv through a register, not through memory. Modeling instructions with register side-effects through MachineMemOperand wasn't intuitive.

Also, the pattern changes seem concise. This is really good.

This patch does seem FP exception centric and rounding mode agnostic though. Should `FPExcept` and friends be named something more general to cover both? To be clear, I'm okay with the current naming scheme, so just playing Devil's advocate.



================
Comment at: include/llvm/CodeGen/SelectionDAGNodes.h:378
+  bool NoExcept : 1;
+
 public:
----------------
Nit-picking: the first sentence was a little hard to parse. One alternative:

> We assume by default that instructions are considered to not raise

Or maybe a rewrite would be cleaner:

>  We assume instructions do not raise floating-point exceptions by default, and only those marked explicitly may do so.

Just thinking aloud...


Repository:
  rL LLVM

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  https://reviews.llvm.org/D55506/new/

https://reviews.llvm.org/D55506