[llvm] r349081 - AMDGPU/GlobalISel: Legalize/regbankselect block_addr

[Matt Arsenault via llvm-commits]

Author: arsenm
Date: Thu Dec 13 12:34:15 2018
New Revision: 349081

URL: http://llvm.org/viewvc/llvm-project?rev=349081&view=rev
Log:
AMDGPU/GlobalISel: Legalize/regbankselect block_addr

Added:
    llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-block-addr.mir
    llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect-block-addr.mir
Modified:
    llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp

Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp?rev=349081&r1=349080&r2=349081&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp Thu Dec 13 12:34:15 2018
@@ -45,6 +45,8 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo
   const LLT FlatPtr = GetAddrSpacePtr(AMDGPUAS::FLAT_ADDRESS);
   const LLT PrivatePtr = GetAddrSpacePtr(AMDGPUAS::PRIVATE_ADDRESS);
 
+  const LLT CodePtr = FlatPtr;
+
   const LLT AddrSpaces[] = {
     GlobalPtr,
     ConstantPtr,
@@ -120,6 +122,8 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo
     setAction({G_GEP, 1, IdxTy}, Legal);
   }
 
+  setAction({G_BLOCK_ADDR, CodePtr}, Legal);
+
   setAction({G_ICMP, S1}, Legal);
   setAction({G_ICMP, 1, S32}, Legal);
 

Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp?rev=349081&r1=349080&r2=349081&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp Thu Dec 13 12:34:15 2018
@@ -364,7 +364,8 @@ AMDGPURegisterBankInfo::getInstrMapping(
     break;
   }
   case AMDGPU::G_FCONSTANT:
-  case AMDGPU::G_CONSTANT: {
+  case AMDGPU::G_CONSTANT:
+  case AMDGPU::G_BLOCK_ADDR: {
     unsigned Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits();
     OpdsMapping[0] = AMDGPU::getValueMapping(AMDGPU::SGPRRegBankID, Size);
     break;

Added: llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-block-addr.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-block-addr.mir?rev=349081&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-block-addr.mir (added)
+++ llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-block-addr.mir Thu Dec 13 12:34:15 2018
@@ -0,0 +1,28 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -O0 -run-pass=legalizer %s -o - | FileCheck %s
+--- |
+
+  @addr = global i8* null
+
+  define void @test_blockaddress() {
+    store i8* blockaddress(@test_blockaddress, %block), i8** @addr
+    indirectbr i8* blockaddress(@test_blockaddress, %block), [label %block]
+
+  block:
+    ret void
+  }
+
+...
+---
+name:            test_blockaddress
+alignment:       4
+tracksRegLiveness: true
+body:             |
+  bb.1 (%ir-block.0):
+    ; CHECK-LABEL: name: test_blockaddress
+    ; CHECK: [[BLOCK_ADDR:%[0-9]+]]:_(p0) = G_BLOCK_ADDR blockaddress(@test_blockaddress, %ir-block.block)
+    ; CHECK: S_ENDPGM implicit [[BLOCK_ADDR]](p0)
+    %0:_(p0) = G_BLOCK_ADDR blockaddress(@test_blockaddress, %ir-block.block)
+    S_ENDPGM implicit %0
+
+...

Added: llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect-block-addr.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect-block-addr.mir?rev=349081&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect-block-addr.mir (added)
+++ llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect-block-addr.mir Thu Dec 13 12:34:15 2018
@@ -0,0 +1,29 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -O0 -march amdgcn -mcpu=fiji -run-pass=regbankselect %s -o - | FileCheck %s
+
+--- |
+
+  @addr = global i8* null
+
+  define void @test_blockaddress() {
+    store i8* blockaddress(@test_blockaddress, %block), i8** @addr
+    indirectbr i8* blockaddress(@test_blockaddress, %block), [label %block]
+
+  block:                                            ; preds = %0
+    ret void
+  }
+
+...
+---
+name:            test_blockaddress
+alignment:       4
+legalized: true
+body:             |
+  bb.1 (%ir-block.0):
+    ; CHECK-LABEL: name: test_blockaddress
+    ; CHECK: [[BLOCK_ADDR:%[0-9]+]]:sgpr(p0) = G_BLOCK_ADDR blockaddress(@test_blockaddress, %ir-block.block)
+    ; CHECK: S_ENDPGM implicit [[BLOCK_ADDR]](p0)
+    %0:_(p0) = G_BLOCK_ADDR blockaddress(@test_blockaddress, %ir-block.block)
+    S_ENDPGM implicit %0
+
+...