[llvm] r349007 - [X86] Remove assert leftover from when i1 was a legal type. Add more accurate assert. NFC

[Craig Topper via llvm-commits]

Author: ctopper
Date: Wed Dec 12 22:14:25 2018
New Revision: 349007

URL: http://llvm.org/viewvc/llvm-project?rev=349007&view=rev
Log:
[X86] Remove assert leftover from when i1 was a legal type. Add more accurate assert. NFC

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=349007&r1=349006&r2=349007&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Dec 12 22:14:25 2018
@@ -18815,9 +18815,6 @@ SDValue X86TargetLowering::EmitCmp(SDVal
   if (isNullConstant(Op1))
     return EmitTest(Op0, X86CC, dl, DAG);
 
-  assert(!(isa<ConstantSDNode>(Op1) && Op0.getValueType() == MVT::i1) &&
-         "Unexpected comparison operation for MVT::i1 operands");
-
   if ((Op0.getValueType() == MVT::i8 || Op0.getValueType() == MVT::i16 ||
        Op0.getValueType() == MVT::i32 || Op0.getValueType() == MVT::i64)) {
     // Only promote the compare up to I32 if it is a 16 bit operation
@@ -18839,6 +18836,7 @@ SDValue X86TargetLowering::EmitCmp(SDVal
     SDValue Sub = DAG.getNode(X86ISD::SUB, dl, VTs, Op0, Op1);
     return SDValue(Sub.getNode(), 1);
   }
+  assert(Op0.getValueType().isFloatingPoint() && "Unexpected VT!");
   return DAG.getNode(X86ISD::CMP, dl, MVT::i32, Op0, Op1);
 }