[PATCH] D55639: GlobalISel: Allow shift amount to be a different type

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Dec 12 19:15:29 PST 2018


arsenm created this revision.
arsenm added reviewers: igorb, aivchenk, dsanders, ahmedasadi, t.p.northover, qcolombet, aditya_nandakumar, tstellar.
Herald added subscribers: atanasyan, tpr, javed.absar, kristof.beyls, rovka, nhaehnle, wdng, jvesely, sdardis.

For AMDGPU the shift amount is never 64-bit, and
this needs to use a 32-bit shift.

      

An equivalent of getShiftAmountTy is necessary for the combiner, but
I'm not sure where to put it.

      

I'm sort of guessing on the x86 changes. Currently
in SelectionDAG the shift amount is i8. The global
isel selector seems to have been using some kind of
hack to get the 8-bit subregister, which breaks with
this change. The copy it was inserting was invalid
because it ended up being a copy from a super-register
to its own subregister.


https://reviews.llvm.org/D55639

Files:
  include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h
  include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
  include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
  include/llvm/Target/GenericOpcodes.td
  lib/CodeGen/GlobalISel/LegalizerHelper.cpp
  lib/Target/AArch64/AArch64LegalizerInfo.cpp
  lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
  lib/Target/ARM/ARMLegalizerInfo.cpp
  lib/Target/Mips/MipsLegalizerInfo.cpp
  lib/Target/X86/X86InstructionSelector.cpp
  lib/Target/X86/X86LegalizerInfo.cpp
  lib/Target/X86/X86RegisterBankInfo.cpp
  test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
  test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
  test/CodeGen/X86/GlobalISel/ashr-scalar.ll
  test/CodeGen/X86/GlobalISel/ext-x86-64.ll
  test/CodeGen/X86/GlobalISel/ext.ll
  test/CodeGen/X86/GlobalISel/gep.ll
  test/CodeGen/X86/GlobalISel/legalize-ext-x86-64.mir
  test/CodeGen/X86/GlobalISel/lshr-scalar.ll
  test/CodeGen/X86/GlobalISel/select-ashr-scalar.mir
  test/CodeGen/X86/GlobalISel/select-lshr-scalar.mir
  test/CodeGen/X86/GlobalISel/select-shl-scalar.mir
  test/CodeGen/X86/GlobalISel/shl-scalar.ll
  test/CodeGen/X86/GlobalISel/x86_64-legalize-sitofp.mir

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