[PATCH] D55633: AMDGPU/GlobalISel: Legalize f64 fadd/fmul

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added reviewers: tstellar, rampitec.
Herald added subscribers: t-tye, tpr, dstuttard, kristof.beyls, rovka, yaxunl, nhaehnle, wdng, jvesely, kzhuravl.

https://reviews.llvm.org/D55633

Files:
  lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
  test/CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir


Index: test/CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir
===================================================================
--- test/CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir
+++ test/CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir
@@ -2,7 +2,7 @@
 # RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer %s -o - | FileCheck %s
 
 ---
-name:            test_fmul
+name: test_fmul_f32
 body: |
   bb.0:
     liveins: $vgpr0, $vgpr1
@@ -16,3 +16,18 @@
     %2:_(s32) = G_FMUL %0, %1
     $vgpr0 = COPY %2
 ...
+---
+name: test_fmul_f64
+body: |
+  bb.0:
+    liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
+
+    ; CHECK-LABEL: name: test_fmul
+    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
+    ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr3
+    ; CHECK: [[FMUL:%[0-9]+]]:_(s64) = G_FMUL [[COPY]], [[COPY1]]
+    %0:_(s64) = COPY $vgpr0_vgpr1
+    %1:_(s64) = COPY $vgpr2_vgpr3
+    %2:_(s64) = G_FMUL %0, %1
+    $vgpr0_vgpr1 = COPY %2
+...
Index: test/CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir
===================================================================
--- test/CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir
+++ test/CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir
@@ -1,7 +1,7 @@
 # RUN: llc -mtriple=amdgcn-mesa-mesa3d -run-pass=legalizer %s -o - | FileCheck %s
 
 ---
-name:            test_fadd
+name: test_fadd_f32
 body: |
   bb.0.entry:
     liveins: $vgpr0, $vgpr1
@@ -13,3 +13,14 @@
     %2:_(s32) = G_FADD %0, %1
     $vgpr0 = COPY %2
 ...
+---
+name: test_fadd_f64
+body: |
+  bb.0.entry:
+    liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
+
+    %0:_(s64) = COPY $vgpr0_vgpr1
+    %1:_(s64) = COPY $vgpr2_vgpr3
+    %2:_(s64) = G_FADD %0, %1
+    $vgpr0_vgpr1 = COPY %2
+...
Index: lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
===================================================================
--- lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+++ lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
@@ -88,14 +88,14 @@
   // between these two scenarios.
   setAction({G_CONSTANT, S1}, Legal);
 
-  setAction({G_FADD, S32}, Legal);
+  getActionDefinitionsBuilder(
+    { G_FADD, G_FMUL })
+    .legalFor({S32, S64});
 
   setAction({G_FCMP, S1}, Legal);
   setAction({G_FCMP, 1, S32}, Legal);
   setAction({G_FCMP, 1, S64}, Legal);
 
-  setAction({G_FMUL, S32}, Legal);
-
   setAction({G_ZEXT, S64}, Legal);
   setAction({G_ZEXT, 1, S32}, Legal);
 


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