[PATCH] D55494: [x86] allow 8-bit adds to be promoted by convertToThreeAddress() to form LEA

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: lib/Target/X86/X86InstrInfo.cpp:810
   unsigned Opc, leaInReg;
   if (Subtarget.is64Bit()) {
     Opc = X86::LEA64_32r;
----------------
spatel wrote:
> craig.topper wrote:
> > Is this ever called with a 32-bit subtarget? It looks like your new 8-bit calls are all only in 64 bit mode which is good since leaOutReg's regclass would be wrong otherwise.
> No - it's always guarded with the Subtarget.is64Bit() check in the calls below here. So I just copied that existing code for the 8-bit enhancement. That seemed weird to me, but I wasn't sure how this code would break on 32-bit.
For the 8-bit case in 32-bit mode you would need to use GR32_ABCD as the leaout register class. But GR32 would be fine for 16-bit in either mode.

The comment when the 64-bit mode qualification was added for 16 bit mentioned partial register stalls. That was in 2009 so I'm not sure what CPUs it was considering. That wouldn't have been 32-bit mode specific other than 64-bit mode doesn't use AH/BH/CH/DH. Most of the 16 bit code has no code coverage today due to 16-bit op promotion in lowering. And the DisableLEA16 flag is always true, we should nuke it and all the unreachable code.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D55494/new/

https://reviews.llvm.org/D55494