[llvm] r348771 - [AMDGPU] Change the l1 flush instruction for AMDPAL/MESA3D.
Neil Henning via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 10 08:35:53 PST 2018
Author: sheredom
Date: Mon Dec 10 08:35:53 2018
New Revision: 348771
URL: http://llvm.org/viewvc/llvm-project?rev=348771&view=rev
Log:
[AMDGPU] Change the l1 flush instruction for AMDPAL/MESA3D.
This commit changes which l1 flush instruction is used for AMDPAL and
MESA3d workloads to flush the entire l1 cache instead of just the
volatile lines.
Differential Revision: https://reviews.llvm.org/D55367
Added:
llvm/trunk/test/CodeGen/AMDGPU/memory-legalizer-amdpal.ll
llvm/trunk/test/CodeGen/AMDGPU/memory-legalizer-mesa3d.ll
Modified:
llvm/trunk/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
Modified: llvm/trunk/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SIMemoryLegalizer.cpp?rev=348771&r1=348770&r2=348771&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIMemoryLegalizer.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/SIMemoryLegalizer.cpp Mon Dec 10 08:35:53 2018
@@ -812,6 +812,12 @@ bool SIGfx7CacheControl::insertCacheInva
MachineBasicBlock &MBB = *MI->getParent();
DebugLoc DL = MI->getDebugLoc();
+ const GCNSubtarget &STM = MBB.getParent()->getSubtarget<GCNSubtarget>();
+
+ const unsigned Flush = STM.isAmdPalOS() || STM.isMesa3DOS()
+ ? AMDGPU::BUFFER_WBINVL1
+ : AMDGPU::BUFFER_WBINVL1_VOL;
+
if (Pos == Position::AFTER)
++MI;
@@ -819,7 +825,7 @@ bool SIGfx7CacheControl::insertCacheInva
switch (Scope) {
case SIAtomicScope::SYSTEM:
case SIAtomicScope::AGENT:
- BuildMI(MBB, MI, DL, TII->get(AMDGPU::BUFFER_WBINVL1_VOL));
+ BuildMI(MBB, MI, DL, TII->get(Flush));
Changed = true;
break;
case SIAtomicScope::WORKGROUP:
Added: llvm/trunk/test/CodeGen/AMDGPU/memory-legalizer-amdpal.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/memory-legalizer-amdpal.ll?rev=348771&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/memory-legalizer-amdpal.ll (added)
+++ llvm/trunk/test/CodeGen/AMDGPU/memory-legalizer-amdpal.ll Mon Dec 10 08:35:53 2018
@@ -0,0 +1,222 @@
+; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx600 -verify-machineinstrs < %s | FileCheck -check-prefixes=FUNC,GCN %s
+; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx700 -verify-machineinstrs < %s | FileCheck -check-prefixes=FUNC,GCN %s
+; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx800 -verify-machineinstrs < %s | FileCheck -check-prefixes=FUNC,GCN %s
+; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefixes=FUNC,GCN %s
+
+; FUNC-LABEL: {{^}}system_acquire:
+; GCN: %bb.0
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_waitcnt vmcnt(0){{$}}
+; GCN-NEXT: buffer_wbinvl1{{$}}
+; GCN: s_endpgm
+define amdgpu_kernel void @system_acquire() {
+entry:
+ fence acquire
+ ret void
+}
+
+; FUNC-LABEL: {{^}}system_release:
+; GCN: %bb.0
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_waitcnt vmcnt(0){{$}}
+; GCN: s_endpgm
+define amdgpu_kernel void @system_release() {
+entry:
+ fence release
+ ret void
+}
+
+; FUNC-LABEL: {{^}}system_acq_rel:
+; GCN: %bb.0
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_waitcnt vmcnt(0){{$}}
+; GCN: buffer_wbinvl1{{$}}
+; GCN: s_endpgm
+define amdgpu_kernel void @system_acq_rel() {
+entry:
+ fence acq_rel
+ ret void
+}
+
+; FUNC-LABEL: {{^}}system_seq_cst:
+; GCN: %bb.0
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_waitcnt vmcnt(0){{$}}
+; GCN: buffer_wbinvl1{{$}}
+; GCN: s_endpgm
+define amdgpu_kernel void @system_seq_cst() {
+entry:
+ fence seq_cst
+ ret void
+}
+
+; FUNC-LABEL: {{^}}singlethread_acquire:
+; GCN: %bb.0
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_endpgm
+define amdgpu_kernel void @singlethread_acquire() {
+entry:
+ fence syncscope("singlethread") acquire
+ ret void
+}
+
+; FUNC-LABEL: {{^}}singlethread_release:
+; GCN: %bb.0
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_endpgm
+define amdgpu_kernel void @singlethread_release() {
+entry:
+ fence syncscope("singlethread") release
+ ret void
+}
+
+; FUNC-LABEL: {{^}}singlethread_acq_rel:
+; GCN: %bb.0
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_endpgm
+define amdgpu_kernel void @singlethread_acq_rel() {
+entry:
+ fence syncscope("singlethread") acq_rel
+ ret void
+}
+
+; FUNC-LABEL: {{^}}singlethread_seq_cst:
+; GCN: %bb.0
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_endpgm
+define amdgpu_kernel void @singlethread_seq_cst() {
+entry:
+ fence syncscope("singlethread") seq_cst
+ ret void
+}
+
+; FUNC-LABEL: {{^}}agent_acquire:
+; GCN: %bb.0
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_waitcnt vmcnt(0){{$}}
+; GCN-NEXT: buffer_wbinvl1{{$}}
+; GCN: s_endpgm
+define amdgpu_kernel void @agent_acquire() {
+entry:
+ fence syncscope("agent") acquire
+ ret void
+}
+
+; FUNC-LABEL: {{^}}agent_release:
+; GCN: %bb.0
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_waitcnt vmcnt(0){{$}}
+; GCN: s_endpgm
+define amdgpu_kernel void @agent_release() {
+entry:
+ fence syncscope("agent") release
+ ret void
+}
+
+; FUNC-LABEL: {{^}}agent_acq_rel:
+; GCN: %bb.0
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_waitcnt vmcnt(0){{$}}
+; GCN: buffer_wbinvl1{{$}}
+; GCN: s_endpgm
+define amdgpu_kernel void @agent_acq_rel() {
+entry:
+ fence syncscope("agent") acq_rel
+ ret void
+}
+
+; FUNC-LABEL: {{^}}agent_seq_cst:
+; GCN: %bb.0
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_waitcnt vmcnt(0){{$}}
+; GCN: buffer_wbinvl1{{$}}
+; GCN: s_endpgm
+define amdgpu_kernel void @agent_seq_cst() {
+entry:
+ fence syncscope("agent") seq_cst
+ ret void
+}
+
+; FUNC-LABEL: {{^}}workgroup_acquire:
+; GCN: %bb.0
+; GCN-NOT: s_waitcnt vmcnt(0){{$}}
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_endpgm
+define amdgpu_kernel void @workgroup_acquire() {
+entry:
+ fence syncscope("workgroup") acquire
+ ret void
+}
+
+; FUNC-LABEL: {{^}}workgroup_release:
+; GCN: %bb.0
+; GCN-NOT: s_waitcnt vmcnt(0){{$}}
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_endpgm
+define amdgpu_kernel void @workgroup_release() {
+entry:
+ fence syncscope("workgroup") release
+ ret void
+}
+
+; FUNC-LABEL: {{^}}workgroup_acq_rel:
+; GCN: %bb.0
+; GCN-NOT: s_waitcnt vmcnt(0){{$}}
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_endpgm
+define amdgpu_kernel void @workgroup_acq_rel() {
+entry:
+ fence syncscope("workgroup") acq_rel
+ ret void
+}
+
+; FUNC-LABEL: {{^}}workgroup_seq_cst:
+; GCN: %bb.0
+; GCN-NOT: s_waitcnt vmcnt(0){{$}}
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_endpgm
+define amdgpu_kernel void @workgroup_seq_cst() {
+entry:
+ fence syncscope("workgroup") seq_cst
+ ret void
+}
+
+; FUNC-LABEL: {{^}}wavefront_acquire:
+; GCN: %bb.0
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_endpgm
+define amdgpu_kernel void @wavefront_acquire() {
+entry:
+ fence syncscope("wavefront") acquire
+ ret void
+}
+
+; FUNC-LABEL: {{^}}wavefront_release:
+; GCN: %bb.0
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_endpgm
+define amdgpu_kernel void @wavefront_release() {
+entry:
+ fence syncscope("wavefront") release
+ ret void
+}
+
+; FUNC-LABEL: {{^}}wavefront_acq_rel:
+; GCN: %bb.0
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_endpgm
+define amdgpu_kernel void @wavefront_acq_rel() {
+entry:
+ fence syncscope("wavefront") acq_rel
+ ret void
+}
+
+; FUNC-LABEL: {{^}}wavefront_seq_cst:
+; GCN: %bb.0
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_endpgm
+define amdgpu_kernel void @wavefront_seq_cst() {
+entry:
+ fence syncscope("wavefront") seq_cst
+ ret void
+}
Added: llvm/trunk/test/CodeGen/AMDGPU/memory-legalizer-mesa3d.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/memory-legalizer-mesa3d.ll?rev=348771&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/memory-legalizer-mesa3d.ll (added)
+++ llvm/trunk/test/CodeGen/AMDGPU/memory-legalizer-mesa3d.ll Mon Dec 10 08:35:53 2018
@@ -0,0 +1,222 @@
+; RUN: llc -mtriple=amdgcn--mesa3d -mcpu=gfx600 -verify-machineinstrs < %s | FileCheck -check-prefixes=FUNC,GCN %s
+; RUN: llc -mtriple=amdgcn--mesa3d -mcpu=gfx700 -verify-machineinstrs < %s | FileCheck -check-prefixes=FUNC,GCN %s
+; RUN: llc -mtriple=amdgcn--mesa3d -mcpu=gfx800 -verify-machineinstrs < %s | FileCheck -check-prefixes=FUNC,GCN %s
+; RUN: llc -mtriple=amdgcn--mesa3d -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefixes=FUNC,GCN %s
+
+; FUNC-LABEL: {{^}}system_acquire:
+; GCN: %bb.0
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_waitcnt vmcnt(0){{$}}
+; GCN-NEXT: buffer_wbinvl1{{$}}
+; GCN: s_endpgm
+define amdgpu_kernel void @system_acquire() {
+entry:
+ fence acquire
+ ret void
+}
+
+; FUNC-LABEL: {{^}}system_release:
+; GCN: %bb.0
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_waitcnt vmcnt(0){{$}}
+; GCN: s_endpgm
+define amdgpu_kernel void @system_release() {
+entry:
+ fence release
+ ret void
+}
+
+; FUNC-LABEL: {{^}}system_acq_rel:
+; GCN: %bb.0
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_waitcnt vmcnt(0){{$}}
+; GCN: buffer_wbinvl1{{$}}
+; GCN: s_endpgm
+define amdgpu_kernel void @system_acq_rel() {
+entry:
+ fence acq_rel
+ ret void
+}
+
+; FUNC-LABEL: {{^}}system_seq_cst:
+; GCN: %bb.0
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_waitcnt vmcnt(0){{$}}
+; GCN: buffer_wbinvl1{{$}}
+; GCN: s_endpgm
+define amdgpu_kernel void @system_seq_cst() {
+entry:
+ fence seq_cst
+ ret void
+}
+
+; FUNC-LABEL: {{^}}singlethread_acquire:
+; GCN: %bb.0
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_endpgm
+define amdgpu_kernel void @singlethread_acquire() {
+entry:
+ fence syncscope("singlethread") acquire
+ ret void
+}
+
+; FUNC-LABEL: {{^}}singlethread_release:
+; GCN: %bb.0
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_endpgm
+define amdgpu_kernel void @singlethread_release() {
+entry:
+ fence syncscope("singlethread") release
+ ret void
+}
+
+; FUNC-LABEL: {{^}}singlethread_acq_rel:
+; GCN: %bb.0
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_endpgm
+define amdgpu_kernel void @singlethread_acq_rel() {
+entry:
+ fence syncscope("singlethread") acq_rel
+ ret void
+}
+
+; FUNC-LABEL: {{^}}singlethread_seq_cst:
+; GCN: %bb.0
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_endpgm
+define amdgpu_kernel void @singlethread_seq_cst() {
+entry:
+ fence syncscope("singlethread") seq_cst
+ ret void
+}
+
+; FUNC-LABEL: {{^}}agent_acquire:
+; GCN: %bb.0
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_waitcnt vmcnt(0){{$}}
+; GCN-NEXT: buffer_wbinvl1{{$}}
+; GCN: s_endpgm
+define amdgpu_kernel void @agent_acquire() {
+entry:
+ fence syncscope("agent") acquire
+ ret void
+}
+
+; FUNC-LABEL: {{^}}agent_release:
+; GCN: %bb.0
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_waitcnt vmcnt(0){{$}}
+; GCN: s_endpgm
+define amdgpu_kernel void @agent_release() {
+entry:
+ fence syncscope("agent") release
+ ret void
+}
+
+; FUNC-LABEL: {{^}}agent_acq_rel:
+; GCN: %bb.0
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_waitcnt vmcnt(0){{$}}
+; GCN: buffer_wbinvl1{{$}}
+; GCN: s_endpgm
+define amdgpu_kernel void @agent_acq_rel() {
+entry:
+ fence syncscope("agent") acq_rel
+ ret void
+}
+
+; FUNC-LABEL: {{^}}agent_seq_cst:
+; GCN: %bb.0
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_waitcnt vmcnt(0){{$}}
+; GCN: buffer_wbinvl1{{$}}
+; GCN: s_endpgm
+define amdgpu_kernel void @agent_seq_cst() {
+entry:
+ fence syncscope("agent") seq_cst
+ ret void
+}
+
+; FUNC-LABEL: {{^}}workgroup_acquire:
+; GCN: %bb.0
+; GCN-NOT: s_waitcnt vmcnt(0){{$}}
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_endpgm
+define amdgpu_kernel void @workgroup_acquire() {
+entry:
+ fence syncscope("workgroup") acquire
+ ret void
+}
+
+; FUNC-LABEL: {{^}}workgroup_release:
+; GCN: %bb.0
+; GCN-NOT: s_waitcnt vmcnt(0){{$}}
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_endpgm
+define amdgpu_kernel void @workgroup_release() {
+entry:
+ fence syncscope("workgroup") release
+ ret void
+}
+
+; FUNC-LABEL: {{^}}workgroup_acq_rel:
+; GCN: %bb.0
+; GCN-NOT: s_waitcnt vmcnt(0){{$}}
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_endpgm
+define amdgpu_kernel void @workgroup_acq_rel() {
+entry:
+ fence syncscope("workgroup") acq_rel
+ ret void
+}
+
+; FUNC-LABEL: {{^}}workgroup_seq_cst:
+; GCN: %bb.0
+; GCN-NOT: s_waitcnt vmcnt(0){{$}}
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_endpgm
+define amdgpu_kernel void @workgroup_seq_cst() {
+entry:
+ fence syncscope("workgroup") seq_cst
+ ret void
+}
+
+; FUNC-LABEL: {{^}}wavefront_acquire:
+; GCN: %bb.0
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_endpgm
+define amdgpu_kernel void @wavefront_acquire() {
+entry:
+ fence syncscope("wavefront") acquire
+ ret void
+}
+
+; FUNC-LABEL: {{^}}wavefront_release:
+; GCN: %bb.0
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_endpgm
+define amdgpu_kernel void @wavefront_release() {
+entry:
+ fence syncscope("wavefront") release
+ ret void
+}
+
+; FUNC-LABEL: {{^}}wavefront_acq_rel:
+; GCN: %bb.0
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_endpgm
+define amdgpu_kernel void @wavefront_acq_rel() {
+entry:
+ fence syncscope("wavefront") acq_rel
+ ret void
+}
+
+; FUNC-LABEL: {{^}}wavefront_seq_cst:
+; GCN: %bb.0
+; GCN-NOT: ATOMIC_FENCE
+; GCN: s_endpgm
+define amdgpu_kernel void @wavefront_seq_cst() {
+entry:
+ fence syncscope("wavefront") seq_cst
+ ret void
+}
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