[PATCH] D54278: [SelectionDAG] Teach getNode to constant fold SIGN/ZERO/ANY_EXTEND_VECTOR_INREG

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added a comment.

In D54278#1303494 <https://reviews.llvm.org/D54278#1303494>, @craig.topper wrote:

> Removing any of the constant folding code in X86 requires committing D54276 <https://reviews.llvm.org/D54276> first so that we can still see constant MULH inputs as build_vectors and DAG combine them that way. With MULH lowering happening during DAG legalization we don't get a chance to constant fold until they have been turned into constant pool entries and that requires target specific constant folding.


D54276 <https://reviews.llvm.org/D54276> landed - can the X86 folding now be removed as part of this?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D54278/new/

https://reviews.llvm.org/D54278