[PATCH] D55365: [CodeGen] Allow mempcy/memset to generate small overlapping stores.

Sanjay Patel via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sat Dec 8 08:50:28 PST 2018


spatel accepted this revision.
spatel added a comment.
This revision is now accepted and ready to land.

LGTM - the code change itself is just removing a hack.

If some target does see a perf regression from this, they should be able to adjust their target hooks to compensate (although they may ask to revert this patch while fixing).

It would be nice to file a bug for the load/store ordering that Peter noted. I filed something similar here:
https://bugs.llvm.org/show_bug.cgi?id=27143



================
Comment at: lib/CodeGen/SelectionDAG/SelectionDAG.cpp:5402
       if (NumMemOps && AllowOverlap &&
-          VTSize >= 8 && NewVTSize < Size &&
+          NewVTSize < Size &&
           TLI.allowsMisalignedMemoryAccesses(VT, DstAS, DstAlign, &Fast) && Fast)
----------------
clang-format should move that onto the previous line?


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D55365/new/

https://reviews.llvm.org/D55365





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