[llvm] r348566 - [PowerPC] Fix assert from machine verify pass that missing undef register flag
Zi Xuan Wu via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 6 21:25:16 PST 2018
Author: wuzish
Date: Thu Dec 6 21:25:16 2018
New Revision: 348566
URL: http://llvm.org/viewvc/llvm-project?rev=348566&view=rev
Log:
[PowerPC] Fix assert from machine verify pass that missing undef register flag
Fix assert about using an undefined physical register in machine instruction verify pass.
The reason is that register flag undef is missing when doing transformation from If Conversion Pass.
```
Bad machine code: Using an undefined physical register
- function: func_65
- basic block: %bb.0 entry (0x10024740738)
- instruction: BCLR killed $cr5lt, implicit $lr8, implicit $rm, implicit undef $x3
- operand 0: killed $cr5lt
LLVM ERROR: Found 1 machine code errors.
```
There are also other existing testcases with same issue. So I add -verify-machineinstrs option to open verifying.
Differential Revision: https://reviews.llvm.org/D55408
Modified:
llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp
llvm/trunk/test/CodeGen/PowerPC/aantidep-inline-asm-use.ll
llvm/trunk/test/CodeGen/PowerPC/cr-spills.ll
llvm/trunk/test/CodeGen/PowerPC/ctr-cleanup.ll
llvm/trunk/test/CodeGen/PowerPC/ctrloop-large-ec.ll
llvm/trunk/test/CodeGen/PowerPC/ctrloop-udivti3.ll
llvm/trunk/test/CodeGen/PowerPC/early-ret2.ll
llvm/trunk/test/CodeGen/PowerPC/ifcvt-forked-bug-2016-08-08.ll
llvm/trunk/test/CodeGen/PowerPC/merge-st-chain-op.ll
llvm/trunk/test/CodeGen/PowerPC/negctr.ll
llvm/trunk/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll
llvm/trunk/test/CodeGen/PowerPC/ppc-vaarg-agg.ll
llvm/trunk/test/CodeGen/PowerPC/pr16556.ll
llvm/trunk/test/CodeGen/PowerPC/pr25157-peephole.ll
llvm/trunk/test/CodeGen/PowerPC/pr25157.ll
llvm/trunk/test/CodeGen/PowerPC/stwu-sched.ll
llvm/trunk/test/CodeGen/PowerPC/stwux.ll
llvm/trunk/test/CodeGen/PowerPC/vsel-prom.ll
llvm/trunk/test/CodeGen/PowerPC/vsx-fma-mutate-undef.ll
llvm/trunk/test/CodeGen/PowerPC/xray-ret-is-terminator.ll
llvm/trunk/test/CodeGen/PowerPC/xvcmpeqdp-v2f64.ll
Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp?rev=348566&r1=348565&r2=348566&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp Thu Dec 6 21:25:16 2018
@@ -1429,17 +1429,15 @@ bool PPCInstrInfo::PredicateInstruction(
: (isPPC64 ? PPC::BDZLR8 : PPC::BDZLR)));
} else if (Pred[0].getImm() == PPC::PRED_BIT_SET) {
MI.setDesc(get(PPC::BCLR));
- MachineInstrBuilder(*MI.getParent()->getParent(), MI)
- .addReg(Pred[1].getReg());
+ MachineInstrBuilder(*MI.getParent()->getParent(), MI).add(Pred[1]);
} else if (Pred[0].getImm() == PPC::PRED_BIT_UNSET) {
MI.setDesc(get(PPC::BCLRn));
- MachineInstrBuilder(*MI.getParent()->getParent(), MI)
- .addReg(Pred[1].getReg());
+ MachineInstrBuilder(*MI.getParent()->getParent(), MI).add(Pred[1]);
} else {
MI.setDesc(get(PPC::BCCLR));
MachineInstrBuilder(*MI.getParent()->getParent(), MI)
.addImm(Pred[0].getImm())
- .addReg(Pred[1].getReg());
+ .add(Pred[1]);
}
return true;
@@ -1454,7 +1452,7 @@ bool PPCInstrInfo::PredicateInstruction(
MI.setDesc(get(PPC::BC));
MachineInstrBuilder(*MI.getParent()->getParent(), MI)
- .addReg(Pred[1].getReg())
+ .add(Pred[1])
.addMBB(MBB);
} else if (Pred[0].getImm() == PPC::PRED_BIT_UNSET) {
MachineBasicBlock *MBB = MI.getOperand(0).getMBB();
@@ -1462,7 +1460,7 @@ bool PPCInstrInfo::PredicateInstruction(
MI.setDesc(get(PPC::BCn));
MachineInstrBuilder(*MI.getParent()->getParent(), MI)
- .addReg(Pred[1].getReg())
+ .add(Pred[1])
.addMBB(MBB);
} else {
MachineBasicBlock *MBB = MI.getOperand(0).getMBB();
@@ -1471,13 +1469,13 @@ bool PPCInstrInfo::PredicateInstruction(
MI.setDesc(get(PPC::BCC));
MachineInstrBuilder(*MI.getParent()->getParent(), MI)
.addImm(Pred[0].getImm())
- .addReg(Pred[1].getReg())
+ .add(Pred[1])
.addMBB(MBB);
}
return true;
- } else if (OpC == PPC::BCTR || OpC == PPC::BCTR8 ||
- OpC == PPC::BCTRL || OpC == PPC::BCTRL8) {
+ } else if (OpC == PPC::BCTR || OpC == PPC::BCTR8 || OpC == PPC::BCTRL ||
+ OpC == PPC::BCTRL8) {
if (Pred[1].getReg() == PPC::CTR8 || Pred[1].getReg() == PPC::CTR)
llvm_unreachable("Cannot predicate bctr[l] on the ctr register");
@@ -1487,14 +1485,12 @@ bool PPCInstrInfo::PredicateInstruction(
if (Pred[0].getImm() == PPC::PRED_BIT_SET) {
MI.setDesc(get(isPPC64 ? (setLR ? PPC::BCCTRL8 : PPC::BCCTR8)
: (setLR ? PPC::BCCTRL : PPC::BCCTR)));
- MachineInstrBuilder(*MI.getParent()->getParent(), MI)
- .addReg(Pred[1].getReg());
+ MachineInstrBuilder(*MI.getParent()->getParent(), MI).add(Pred[1]);
return true;
} else if (Pred[0].getImm() == PPC::PRED_BIT_UNSET) {
MI.setDesc(get(isPPC64 ? (setLR ? PPC::BCCTRL8n : PPC::BCCTR8n)
: (setLR ? PPC::BCCTRLn : PPC::BCCTRn)));
- MachineInstrBuilder(*MI.getParent()->getParent(), MI)
- .addReg(Pred[1].getReg());
+ MachineInstrBuilder(*MI.getParent()->getParent(), MI).add(Pred[1]);
return true;
}
@@ -1502,7 +1498,7 @@ bool PPCInstrInfo::PredicateInstruction(
: (setLR ? PPC::BCCCTRL : PPC::BCCCTR)));
MachineInstrBuilder(*MI.getParent()->getParent(), MI)
.addImm(Pred[0].getImm())
- .addReg(Pred[1].getReg());
+ .add(Pred[1]);
return true;
}
Modified: llvm/trunk/test/CodeGen/PowerPC/aantidep-inline-asm-use.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/aantidep-inline-asm-use.ll?rev=348566&r1=348565&r2=348566&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/aantidep-inline-asm-use.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/aantidep-inline-asm-use.ll Thu Dec 6 21:25:16 2018
@@ -1,4 +1,4 @@
-; RUN: llc -O2 < %s | FileCheck %s
+; RUN: llc -O2 -verify-machineinstrs < %s | FileCheck %s
; ModuleID = 'bugpoint-reduced-simplified.bc'
target datalayout = "e-m:e-i64:64-n32:64"
target triple = "powerpc64le-grtev4-linux-gnu"
Modified: llvm/trunk/test/CodeGen/PowerPC/cr-spills.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/cr-spills.ll?rev=348566&r1=348565&r2=348566&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/cr-spills.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/cr-spills.ll Thu Dec 6 21:25:16 2018
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7
+; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
target triple = "powerpc64-unknown-linux-gnu"
Modified: llvm/trunk/test/CodeGen/PowerPC/ctr-cleanup.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/ctr-cleanup.ll?rev=348566&r1=348565&r2=348566&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/ctr-cleanup.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/ctr-cleanup.ll Thu Dec 6 21:25:16 2018
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=a2 | FileCheck %s
+; RUN: llc -verify-machineinstrs < %s -mcpu=a2 | FileCheck %s
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
target triple = "powerpc64-unknown-linux-gnu"
Modified: llvm/trunk/test/CodeGen/PowerPC/ctrloop-large-ec.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/ctrloop-large-ec.ll?rev=348566&r1=348565&r2=348566&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/ctrloop-large-ec.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/ctrloop-large-ec.ll Thu Dec 6 21:25:16 2018
@@ -1,4 +1,4 @@
-; RUN: llc -mcpu=ppc32 < %s | FileCheck %s
+; RUN: llc -mcpu=ppc32 -verify-machineinstrs < %s | FileCheck %s
target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"
target triple = "powerpc-unknown-linux-gnu"
Modified: llvm/trunk/test/CodeGen/PowerPC/ctrloop-udivti3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/ctrloop-udivti3.ll?rev=348566&r1=348565&r2=348566&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/ctrloop-udivti3.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/ctrloop-udivti3.ll Thu Dec 6 21:25:16 2018
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs < %s | FileCheck %s
target datalayout = "E-m:e-i64:64-n32:64"
target triple = "powerpc64-unknown-linux-gnu"
Modified: llvm/trunk/test/CodeGen/PowerPC/early-ret2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/early-ret2.ll?rev=348566&r1=348565&r2=348566&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/early-ret2.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/early-ret2.ll Thu Dec 6 21:25:16 2018
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-crbits | FileCheck %s
-; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s -check-prefix=CHECK-CRB
+; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-crbits | FileCheck %s
+; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s -check-prefix=CHECK-CRB
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
target triple = "powerpc64-unknown-linux-gnu"
Modified: llvm/trunk/test/CodeGen/PowerPC/ifcvt-forked-bug-2016-08-08.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/ifcvt-forked-bug-2016-08-08.ll?rev=348566&r1=348565&r2=348566&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/ifcvt-forked-bug-2016-08-08.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/ifcvt-forked-bug-2016-08-08.ll Thu Dec 6 21:25:16 2018
@@ -1,5 +1,5 @@
; ModuleID = 'bugpoint-reduced-instructions.bc'
-; RUN: llc -O2 -o - %s | FileCheck %s
+; RUN: llc -O2 -o - %s -verify-machineinstrs | FileCheck %s
source_filename = "bugpoint-output-9ad75f8.bc"
target datalayout = "e-m:e-i64:64-n32:64"
target triple = "powerpc64le-unknown-linux-gnu"
Modified: llvm/trunk/test/CodeGen/PowerPC/merge-st-chain-op.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/merge-st-chain-op.ll?rev=348566&r1=348565&r2=348566&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/merge-st-chain-op.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/merge-st-chain-op.ll Thu Dec 6 21:25:16 2018
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs < %s | FileCheck %s
target datalayout = "E-m:e-i64:64-n32:64"
target triple = "powerpc64-unknown-linux-gnu"
Modified: llvm/trunk/test/CodeGen/PowerPC/negctr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/negctr.ll?rev=348566&r1=348565&r2=348566&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/negctr.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/negctr.ll Thu Dec 6 21:25:16 2018
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mcpu=a2 | FileCheck %s
-; RUN: llc < %s -mcpu=a2 -disable-lsr | FileCheck -check-prefix=NOLSR %s
+; RUN: llc < %s -mcpu=a2 -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -mcpu=a2 -disable-lsr -verify-machineinstrs | FileCheck -check-prefix=NOLSR %s
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
target triple = "powerpc64-unknown-linux-gnu"
Modified: llvm/trunk/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll?rev=348566&r1=348565&r2=348566&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll Thu Dec 6 21:25:16 2018
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=ENABLE
-; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu %s -o - -enable-shrink-wrap=false | FileCheck %s --check-prefix=CHECK --check-prefix=DISABLE
+; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 %s -o - -verify-machineinstrs | FileCheck %s --check-prefix=CHECK --check-prefix=ENABLE
+; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu %s -o - -enable-shrink-wrap=false -verify-machineinstrs | FileCheck %s --check-prefix=CHECK --check-prefix=DISABLE
;
; Note: Lots of tests use inline asm instead of regular calls.
; This allows to have a better control on what the allocation will do.
Modified: llvm/trunk/test/CodeGen/PowerPC/ppc-vaarg-agg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/ppc-vaarg-agg.ll?rev=348566&r1=348565&r2=348566&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/ppc-vaarg-agg.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/ppc-vaarg-agg.ll Thu Dec 6 21:25:16 2018
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs < %s | FileCheck %s
target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"
target triple = "powerpc-montavista-linux-gnuspe"
Modified: llvm/trunk/test/CodeGen/PowerPC/pr16556.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/pr16556.ll?rev=348566&r1=348565&r2=348566&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/pr16556.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/pr16556.ll Thu Dec 6 21:25:16 2018
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -verify-machineinstrs < %s
; This test formerly failed due to no handling for a ppc_fp128 undef.
Modified: llvm/trunk/test/CodeGen/PowerPC/pr25157-peephole.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/pr25157-peephole.ll?rev=348566&r1=348565&r2=348566&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/pr25157-peephole.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/pr25157-peephole.ll Thu Dec 6 21:25:16 2018
@@ -1,5 +1,5 @@
-; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
-; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck \
+; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-linux-gnu < %s -verify-machineinstrs | FileCheck %s
+; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-linux-gnu < %s -verify-machineinstrs | FileCheck \
; RUN: %s --check-prefix=CHECK-P9
; Verify peephole simplification of splats and swaps. Bugpoint-reduced
Modified: llvm/trunk/test/CodeGen/PowerPC/pr25157.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/pr25157.ll?rev=348566&r1=348565&r2=348566&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/pr25157.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/pr25157.ll Thu Dec 6 21:25:16 2018
@@ -1,5 +1,5 @@
-; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
-; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck \
+; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-linux-gnu < %s -verify-machineinstrs | FileCheck %s
+; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-linux-gnu < %s -verify-machineinstrs | FileCheck \
; RUN: --check-prefix=CHECK-P9 %s
; Verify correct generation of an lxsspx rather than an invalid optimization
Modified: llvm/trunk/test/CodeGen/PowerPC/stwu-sched.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/stwu-sched.ll?rev=348566&r1=348565&r2=348566&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/stwu-sched.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/stwu-sched.ll Thu Dec 6 21:25:16 2018
@@ -1,8 +1,8 @@
-; RUN: llc -mcpu=pwr9 -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s
-; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
-; RUN: llc -mcpu=pwr8 -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s \
+; RUN: llc -mcpu=pwr9 -mtriple=powerpc64-unknown-linux-gnu < %s -verify-machineinstrs | FileCheck %s
+; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-linux-gnu < %s -verify-machineinstrs | FileCheck %s
+; RUN: llc -mcpu=pwr8 -mtriple=powerpc64-unknown-linux-gnu < %s -verify-machineinstrs | FileCheck %s \
; RUN: --check-prefix=CHECK-ITIN
-; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s \
+; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-linux-gnu < %s -verify-machineinstrs | FileCheck %s \
; RUN: --check-prefix=CHECK-ITIN
Modified: llvm/trunk/test/CodeGen/PowerPC/stwux.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/stwux.ll?rev=348566&r1=348565&r2=348566&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/stwux.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/stwux.ll Thu Dec 6 21:25:16 2018
@@ -1,6 +1,6 @@
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
target triple = "powerpc64-unknown-linux-gnu"
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs < %s | FileCheck %s
@multvec_i = external unnamed_addr global [100 x i32], align 4
Modified: llvm/trunk/test/CodeGen/PowerPC/vsel-prom.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/vsel-prom.ll?rev=348566&r1=348565&r2=348566&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/vsel-prom.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/vsel-prom.ll Thu Dec 6 21:25:16 2018
@@ -1,4 +1,4 @@
-; RUN: llc -mcpu=pwr7 < %s | FileCheck %s
+; RUN: llc -mcpu=pwr7 < %s -verify-machineinstrs | FileCheck %s
target datalayout = "E-m:e-i64:64-n32:64"
target triple = "powerpc64-unknown-linux-gnu"
Modified: llvm/trunk/test/CodeGen/PowerPC/vsx-fma-mutate-undef.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/vsx-fma-mutate-undef.ll?rev=348566&r1=348565&r2=348566&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/vsx-fma-mutate-undef.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/vsx-fma-mutate-undef.ll Thu Dec 6 21:25:16 2018
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc < %s -verify-machineinstrs | FileCheck %s
target datalayout = "e-m:e-i64:64-n32:64"
target triple = "powerpc64le-unknown-linux-gnu"
Modified: llvm/trunk/test/CodeGen/PowerPC/xray-ret-is-terminator.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/xray-ret-is-terminator.ll?rev=348566&r1=348565&r2=348566&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/xray-ret-is-terminator.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/xray-ret-is-terminator.ll Thu Dec 6 21:25:16 2018
@@ -1,4 +1,4 @@
-; RUN: llc -o - -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -o - -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
define void @ILLBeBack() #0 {
; CHECK-LABEL @ILLBeBack
Modified: llvm/trunk/test/CodeGen/PowerPC/xvcmpeqdp-v2f64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/xvcmpeqdp-v2f64.ll?rev=348566&r1=348565&r2=348566&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/xvcmpeqdp-v2f64.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/xvcmpeqdp-v2f64.ll Thu Dec 6 21:25:16 2018
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc < %s -verify-machineinstrs | FileCheck %s
target datalayout = "e-m:e-i64:64-n32:64"
target triple = "powerpc64le-unknown-linux-gnu"
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