[PATCH] D54143: [WIP, RISCV] Generate address sequences suitable for mcmodel=medium

[James Clarke via Phabricator via llvm-commits]

jrtc27 added a comment.

In D54143#1319494 <https://reviews.llvm.org/D54143#1319494>, @lewis-revill wrote:

> I've tried re-using PseudoLLA, but I just cannot get around the problem of expanding it in the MC layer. If I try expanding it in `RISCVMCCodeEmitter` there is no way to get/create an appropriate expression to use for the `%pcrel_lo` relocation. It would be nice if it was possible to create a `<.text+offset>` expression for the AUIPC instruction but I just don't know how. Otherwise I have also tried splitting up the instruction earlier, but the AUIPC/ADDI get split up too often to make it feasible. Also there's no real benefit because `RISCVMergeBaseOffset` cannot work on the `%pcrel_lo` base symbols without a great deal of modification. @rogfer01 what do you do differently to this patch for the PC-relative case?


Why can't it be expanded in `RISCVExpandPseudo`? If it works for a new `PseudoAddrPCRel`, it works if you instead use `PseudoLLA`. All you need is a find/replace of `PseudoAddrPCRel` with `PseudoLLA` (and of course removing all the definitions of `PseudoAddrPCRel`).


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https://reviews.llvm.org/D54143