[PATCH] D54143: [WIP, RISCV] Generate address sequences suitable for mcmodel=medium

[Lewis Revill via Phabricator via llvm-commits]

lewis-revill added a comment.

I've tried re-using PseudoLLA, but I just cannot get around the problem of expanding it in the MC layer. If I try expanding it in `RISCVMCCodeEmitter` there is no way to get/create an appropriate expression to use for the `%pcrel_lo` relocation. It would be nice if it was possible to create a `<.text+offset>` expression for the AUIPC instruction but I just don't know how. Otherwise I have also tried splitting up the instruction earlier, but the AUIPC/ADDI get split up too often to make it feasible. Also there's no real benefit because `RISCVMergeBaseOffset` cannot work on the `%pcrel_lo` base symbols without a great deal of modification. @rogfer01 what do you do differently to this patch for the PC-relative case?


Repository:
  rL LLVM

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  https://reviews.llvm.org/D54143/new/

https://reviews.llvm.org/D54143