[PATCH] D54822: [AArch64] Refactor the scheduling predicates (3/3) (NFC)

[Andrea Di Biagio via Phabricator via llvm-commits]

andreadb added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64SchedPredicates.td:78-83
+// Identify arithmetic instructions with an extended register.
+def RegExtendedBody : CheckAll<[IsArithExtPred,
+                                CheckNot<CheckZeroOperand<3>>]>;
+def RegExtendedPred : MCSchedPredicate<RegExtendedBody>;
+def RegExtendedFn   : TIIPredicate<"hasExtendedReg",
+                                   MCReturnStatement<RegExtendedBody>>;
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You should just use a MCOpcodeSwitchStatement.


Repository:
  rL LLVM

https://reviews.llvm.org/D54822