[PATCH] D53485: [ScheduleDAGRRList] Do not preschedule the node has ADJCALLSTACKDOWN parent

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

I don't really want to merge this without any test coverage.

If you really can't figure out any way to trigger this DAG structure from IR for an in-tree target, maybe you could write a unittest which artificially constructs an appropriate DAG?  We currently don't use unittests much for SelectionDAG/ScheduleDAG, but there are some existing tests in /unittest/CodeGen/AArch64SelectionDAGTest.cpp .


Repository:
  rL LLVM

https://reviews.llvm.org/D53485