[llvm] r347401 - [x86] add test for FP select with constant; NFC

[Sanjay Patel via llvm-commits]

Author: spatel
Date: Wed Nov 21 09:47:18 2018
New Revision: 347401

URL: http://llvm.org/viewvc/llvm-project?rev=347401&view=rev
Log:
[x86] add test for FP select with constant; NFC

Modified:
    llvm/trunk/test/CodeGen/X86/vselect-zero.ll

Modified: llvm/trunk/test/CodeGen/X86/vselect-zero.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vselect-zero.ll?rev=347401&r1=347400&r2=347401&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vselect-zero.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vselect-zero.ll Wed Nov 21 09:47:18 2018
@@ -41,19 +41,83 @@ define <4 x i32> @test2(<4 x float> %a,
   ret <4 x i32> %r
 }
 
-define float @fsel(float %a, float %b, float %x) {
-; SSE-LABEL: fsel:
+define float @fsel_zero_false_val(float %a, float %b, float %x) {
+; SSE-LABEL: fsel_zero_false_val:
+; SSE:       # %bb.0:
+; SSE-NEXT:    cmpeqss %xmm1, %xmm0
+; SSE-NEXT:    andps %xmm2, %xmm0
+; SSE-NEXT:    retq
+;
+; AVX-LABEL: fsel_zero_false_val:
+; AVX:       # %bb.0:
+; AVX-NEXT:    vcmpeqss %xmm1, %xmm0, %xmm0
+; AVX-NEXT:    vandps %xmm2, %xmm0, %xmm0
+; AVX-NEXT:    retq
+  %cond = fcmp oeq float %a, %b
+  %r = select i1 %cond, float %x, float 0.0
+  ret float %r
+}
+
+define float @fsel_zero_true_val(float %a, float %b, float %x) {
+; SSE-LABEL: fsel_zero_true_val:
 ; SSE:       # %bb.0:
 ; SSE-NEXT:    cmpeqss %xmm1, %xmm0
 ; SSE-NEXT:    andnps %xmm2, %xmm0
 ; SSE-NEXT:    retq
 ;
-; AVX-LABEL: fsel:
+; AVX-LABEL: fsel_zero_true_val:
 ; AVX:       # %bb.0:
 ; AVX-NEXT:    vcmpeqss %xmm1, %xmm0, %xmm0
 ; AVX-NEXT:    vandnps %xmm2, %xmm0, %xmm0
 ; AVX-NEXT:    retq
   %cond = fcmp oeq float %a, %b
-  %sel = select i1 %cond, float 0.0, float %x
-  ret float %sel
+  %r = select i1 %cond, float 0.0, float %x
+  ret float %r
 }
+
+define double @fsel_nonzero_false_val(double %x, double %y, double %z) {
+; SSE-LABEL: fsel_nonzero_false_val:
+; SSE:       # %bb.0:
+; SSE-NEXT:    cmpeqsd %xmm1, %xmm0
+; SSE-NEXT:    andpd %xmm0, %xmm2
+; SSE-NEXT:    movsd {{.*#+}} xmm1 = mem[0],zero
+; SSE-NEXT:    andnpd %xmm1, %xmm0
+; SSE-NEXT:    orpd %xmm2, %xmm0
+; SSE-NEXT:    retq
+;
+; AVX-LABEL: fsel_nonzero_false_val:
+; AVX:       # %bb.0:
+; AVX-NEXT:    vcmpeqsd %xmm1, %xmm0, %xmm0
+; AVX-NEXT:    vandpd %xmm2, %xmm0, %xmm1
+; AVX-NEXT:    vmovsd {{.*#+}} xmm2 = mem[0],zero
+; AVX-NEXT:    vandnpd %xmm2, %xmm0, %xmm0
+; AVX-NEXT:    vorpd %xmm1, %xmm0, %xmm0
+; AVX-NEXT:    retq
+  %cond = fcmp oeq double %x, %y
+  %r = select i1 %cond, double %z, double 42.0
+  ret double %r
+}
+
+define double @fsel_nonzero_true_val(double %x, double %y, double %z) {
+; SSE-LABEL: fsel_nonzero_true_val:
+; SSE:       # %bb.0:
+; SSE-NEXT:    cmpeqsd %xmm1, %xmm0
+; SSE-NEXT:    movsd {{.*#+}} xmm1 = mem[0],zero
+; SSE-NEXT:    andpd %xmm0, %xmm1
+; SSE-NEXT:    andnpd %xmm2, %xmm0
+; SSE-NEXT:    orpd %xmm1, %xmm0
+; SSE-NEXT:    retq
+;
+; AVX-LABEL: fsel_nonzero_true_val:
+; AVX:       # %bb.0:
+; AVX-NEXT:    vcmpeqsd %xmm1, %xmm0, %xmm0
+; AVX-NEXT:    vmovsd {{.*#+}} xmm1 = mem[0],zero
+; AVX-NEXT:    vandpd %xmm1, %xmm0, %xmm1
+; AVX-NEXT:    vandnpd %xmm2, %xmm0, %xmm0
+; AVX-NEXT:    vorpd %xmm1, %xmm0, %xmm0
+; AVX-NEXT:    retq
+  %cond = fcmp oeq double %x, %y
+  %r = select i1 %cond, double 42.0, double %z
+  ret double %r
+}
+