[llvm] r347165 - [Hexagon] make tests immune to improvements in undef simplification

[Sanjay Patel via llvm-commits]

Author: spatel
Date: Sun Nov 18 08:50:16 2018
New Revision: 347165

URL: http://llvm.org/viewvc/llvm-project?rev=347165&view=rev
Log:
[Hexagon] make tests immune to improvements in undef simplification

Modified:
    llvm/trunk/test/CodeGen/Hexagon/expand-condsets-pred-undef2.ll
    llvm/trunk/test/CodeGen/Hexagon/isel-global-offset-alignment.ll
    llvm/trunk/test/CodeGen/Hexagon/swp-const-tc1.ll

Modified: llvm/trunk/test/CodeGen/Hexagon/expand-condsets-pred-undef2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/expand-condsets-pred-undef2.ll?rev=347165&r1=347164&r2=347165&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Hexagon/expand-condsets-pred-undef2.ll (original)
+++ llvm/trunk/test/CodeGen/Hexagon/expand-condsets-pred-undef2.ll Sun Nov 18 08:50:16 2018
@@ -3,11 +3,11 @@
 ; CHECK: if{{.*}}sub
 
 ; Function Attrs: nounwind
-define i32 @f0(i32 %a0, i32 %a1, i32 %a2) #0 {
+define i32 @f0(i32 %a0, i32 %a1, i32 %a2, i1 %x) #0 {
 b0:
   %v0 = add i32 %a0, %a2
   %v1 = sub i32 %a1, %a2
-  %v2 = select i1 undef, i32 %v0, i32 %v1
+  %v2 = select i1 %x, i32 %v0, i32 %v1
   ret i32 %v2
 }
 

Modified: llvm/trunk/test/CodeGen/Hexagon/isel-global-offset-alignment.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/isel-global-offset-alignment.ll?rev=347165&r1=347164&r2=347165&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Hexagon/isel-global-offset-alignment.ll (original)
+++ llvm/trunk/test/CodeGen/Hexagon/isel-global-offset-alignment.ll Sun Nov 18 08:50:16 2018
@@ -3,17 +3,17 @@
 ; This should compile without errors, and the offsets with respect to the
 ; beginning of the global "array" don't need to be multiples of 8.
 ;
-; CHECK-DAG: memd(r0+##array+174)
-; CHECK-DAG: memd(r0+##array+182)
+; CHECK-DAG: memd(r2+##array+174)
+; CHECK-DAG: memd(r2+##array+182)
 
 target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
 target triple = "hexagon"
 
 @array = external global [1000000 x i16], align 8
 
-define void @fred() #0 {
+define void @fred(i1 %x) #0 {
 b0:
-  br i1 undef, label %b3, label %b1
+  br i1 %x, label %b3, label %b1
 
 b1:                                               ; preds = %b0
   %v2 = add i32 0, 512

Modified: llvm/trunk/test/CodeGen/Hexagon/swp-const-tc1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/swp-const-tc1.ll?rev=347165&r1=347164&r2=347165&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Hexagon/swp-const-tc1.ll (original)
+++ llvm/trunk/test/CodeGen/Hexagon/swp-const-tc1.ll Sun Nov 18 08:50:16 2018
@@ -13,7 +13,7 @@
 ; CHECK: memb(r{{[0-9]+}}+#0) =
 
 ; Function Attrs: nounwind optsize
-define void @f0() #0 {
+define void @f0(i1 %x) #0 {
 b0:
   br label %b1
 
@@ -34,7 +34,7 @@ b3:
   %v7 = add i32 %v6, undef
   %v8 = icmp slt i32 undef, %v7
   %v9 = add nsw i32 %v7, 1
-  %v10 = select i1 undef, i32 1, i32 %v9
+  %v10 = select i1 %x, i32 1, i32 %v9
   %v11 = add i32 %v10, 0
   %v12 = getelementptr inbounds i8, i8* null, i32 %v11
   %v13 = load i8, i8* %v12, align 1, !tbaa !4