[PATCH] D54640: [DAGCombiner] narrow truncated binops

[Sanjay Patel via Phabricator via llvm-commits]

spatel created this revision.
spatel added reviewers: craig.topper, RKSimon, arsenm.
Herald added subscribers: javed.absar, tpr, nhaehnle, wdng, jvesely, mcrosier.

The motivating case for this is shown in:
https://bugs.llvm.org/show_bug.cgi?id=32023
and the corresponding rot16.ll regression tests.

Because x86 scalar shift amounts are i8 values, we can end up with trunc-binop-trunc sequences that don't get folded in IR.

As the TODO comments suggest, there will be regressions if we extend this (for x86, we mostly seem to be missing LEA opportunities, but there are likely vector folds missing too). I think those should be considered existing bugs because this is the same transform that we do as an IR canonicalization in instcombine. We just need more tests to make those visible independent of this patch.

test-shrink.ll has what appears to be a regression even with this limited patch. I'm not sure about the AMDGPU diffs.


https://reviews.llvm.org/D54640

Files:
  lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
  test/CodeGen/X86/2008-09-11-CoalescerBug2.ll
  test/CodeGen/X86/2010-08-04-MaskedSignedCompare.ll
  test/CodeGen/X86/add-sub-nsw-nuw.ll
  test/CodeGen/X86/bool-math.ll
  test/CodeGen/X86/bt.ll
  test/CodeGen/X86/clear-lowbits.ll
  test/CodeGen/X86/cmov.ll
  test/CodeGen/X86/extract-bits.ll
  test/CodeGen/X86/extract-lowbits.ll
  test/CodeGen/X86/funnel-shift-rot.ll
  test/CodeGen/X86/funnel-shift.ll
  test/CodeGen/X86/pr32284.ll
  test/CodeGen/X86/pr37879.ll
  test/CodeGen/X86/rot16.ll
  test/CodeGen/X86/rotate.ll
  test/CodeGen/X86/rotate4.ll
  test/CodeGen/X86/schedule-x86-64-shld.ll
  test/CodeGen/X86/scheduler-backtracking.ll
  test/CodeGen/X86/test-shrink.ll
  test/CodeGen/X86/xchg-nofold.ll

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